From: Viken Dadhaniya Date: Wed, 29 Apr 2026 17:01:42 +0000 (+0530) Subject: arm64: dts: qcom: sc7180: Add QSPI memory interconnect path X-Git-Url: http://git.ipfire.org/gitweb/index.cgi?a=commitdiff_plain;h=8289feadbcbc1b0458a9e81d0eca42f97b28bbe3;p=thirdparty%2Flinux.git arm64: dts: qcom: sc7180: Add QSPI memory interconnect path Add the missing QSPI-to-memory interconnect path alongside the existing configuration path. Without this path, the interconnect framework cannot correctly vote for the bandwidth required by QSPI DMA data transfers. Reviewed-by: Konrad Dybcio Signed-off-by: Viken Dadhaniya Link: https://lore.kernel.org/r/20260429-spi-nor-v5-7-993016c9711e@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index a4b17564469ee..8341a7c4a4c6b 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2866,9 +2866,12 @@ clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>, <&gcc GCC_QSPI_CORE_CLK>; clock-names = "iface", "core"; - interconnects = <&gem_noc MASTER_APPSS_PROC 0 - &config_noc SLAVE_QSPI_0 0>; - interconnect-names = "qspi-config"; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_QSPI_0 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&aggre1_noc MASTER_QSPI QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "qspi-config", + "qspi-memory"; power-domains = <&rpmhpd SC7180_CX>; operating-points-v2 = <&qspi_opp_table>; status = "disabled";