From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Tue, 31 Mar 2026 15:42:51 +0000 (+0300)
Subject: drm/i915/mchbar: WARN when accessing non-MCHBAR registers via intel_mchbar_read*()
X-Git-Tag: v7.2-rc1~141^2~25^2~129
X-Git-Url: http://git.ipfire.org/gitweb/index.cgi?a=commitdiff_plain;h=84b0366809193fc6238e37c9839cd4b24db5e909;p=thirdparty%2Flinux.git

drm/i915/mchbar: WARN when accessing non-MCHBAR registers via intel_mchbar_read*()

The intel_mchbar_read*() functions should only be used for
accessing MCHBAR registers. Warn if someone tries to use
them for other registers.

I suppose we could even have a dedicated type for MCHBAR
registers. But that is true for many other special register
types as well, and so far we haven't bothered adding any
special types apart from i915_mcr_reg_t.

v2: Print the register offset (Jani)
    Mention i915_mcr_reg_t (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260331154259.24600-5-ville.syrjala@linux.intel.com
---

diff --git a/drivers/gpu/drm/i915/display/intel_mchbar.c b/drivers/gpu/drm/i915/display/intel_mchbar.c
index 2636fe60ef379..a404fa38c9bdb 100644
--- a/drivers/gpu/drm/i915/display/intel_mchbar.c
+++ b/drivers/gpu/drm/i915/display/intel_mchbar.c
@@ -3,14 +3,66 @@
  * Copyright © 2026 Intel Corporation
  */
 
+#include <linux/minmax.h>
+
+#include <drm/drm_print.h>
+
 #include "intel_display_core.h"
 #include "intel_mchbar.h"
+#include "intel_mchbar_regs.h"
 #include "intel_uncore.h"
 
+static bool has_mchbar_mirror(struct intel_display *display)
+{
+	return DISPLAY_VER(display) < 14;
+}
+
+static u32 mchbar_mirror_base(struct intel_display *display)
+{
+	if (DISPLAY_VER(display) >= 6)
+		return MCHBAR_MIRROR_BASE_SNB;
+	else
+		return MCHBAR_MIRROR_BASE;
+}
+
+static u32 mchbar_mirror_end(struct intel_display *display)
+{
+	if (DISPLAY_VER(display) >= 12 && !display->platform.rocketlake)
+		return MCHBAR_MIRROR_END_TGL;
+	else if (DISPLAY_VER(display) >= 11)
+		return MCHBAR_MIRROR_END_ICL_RKL;
+	else if (DISPLAY_VER(display) >= 6)
+		return MCHBAR_MIRROR_END_SNB;
+	else
+		return MCHBAR_MIRROR_END;
+}
+
+static u32 mchbar_mirror_len(struct intel_display *display)
+{
+	return mchbar_mirror_end(display) - mchbar_mirror_base(display) + 1;
+}
+
+static bool is_mchbar_reg(struct intel_display *display, i915_reg_t reg)
+{
+	return has_mchbar_mirror(display) &&
+		in_range32(i915_mmio_reg_offset(reg),
+			   mchbar_mirror_base(display),
+			   mchbar_mirror_len(display));
+}
+
+static void assert_is_mchbar_reg(struct intel_display *display, i915_reg_t reg)
+{
+	drm_WARN(display->drm, !is_mchbar_reg(display, reg),
+		 "Reading non-MCHBAR register 0x%x\n",
+		 i915_mmio_reg_offset(reg));
+}
+
 u16 intel_mchbar_read16(struct intel_display *display, i915_reg_t reg)
 {
 	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 
+	assert_is_mchbar_reg(display, reg);
+
 	return intel_uncore_read16(uncore, reg);
 }
 
@@ -18,6 +70,8 @@ u32 intel_mchbar_read(struct intel_display *display, i915_reg_t reg)
 {
 	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 
+	assert_is_mchbar_reg(display, reg);
+
 	return intel_uncore_read(uncore, reg);
 }
 
@@ -26,5 +80,7 @@ u64 intel_mchbar_read64_2x32(struct intel_display *display, i915_reg_t reg)
 	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	i915_reg_t upper_reg = _MMIO(i915_mmio_reg_offset(reg) + 4);
 
+	assert_is_mchbar_reg(display, reg);
+
 	return intel_uncore_read64_2x32(uncore, reg, upper_reg);
 }