From: Timur Kristóf Date: Sat, 18 Apr 2026 21:49:32 +0000 (+0200) Subject: Documentation/gpu: Add TCC, update TCP in amdgpu glossary X-Git-Tag: v7.2-rc1~141^2~24^2~116 X-Git-Url: http://git.ipfire.org/gitweb/index.cgi?a=commitdiff_plain;h=85f284b5aece41d3d8242e3c266774d543a2f8be;p=thirdparty%2Fkernel%2Flinux.git Documentation/gpu: Add TCC, update TCP in amdgpu glossary These are the L2 and L1 cache on some AMD GPU architectures. Add them to the glossary, keeping existing alphabetical order. Signed-off-by: Timur Kristóf Reviewed-by: Christian König Signed-off-by: Alex Deucher --- diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst b/Documentation/gpu/amdgpu/amdgpu-glossary.rst index 033167025fcca..d553dd599c966 100644 --- a/Documentation/gpu/amdgpu/amdgpu-glossary.rst +++ b/Documentation/gpu/amdgpu/amdgpu-glossary.rst @@ -233,8 +233,15 @@ we have a dedicated glossary for Display Core at TC Texture Cache + TCC + Texture Cache per Channel - L2 cache attached to the memory channels. + May be used when shader cores are accessing memory. + Despite "Texture" in the name, this is used by any kind of memory access. + TCCs may be mapped to TCPs, depending on the architecture. + TCP (AMDGPU) - Texture Cache per Pipe. Even though the name "Texture" is part of this + Texture Cache per Pipe - L1 cache attached to each CU. + Even though the name "Texture" is part of this acronym, the TCP represents the path to memory shaders; i.e., it is not related to texture. The name is a leftover from older designs where shader stages had different cache designs; it refers to the L1 cache in older