From: Moshe Shemesh Date: Thu, 21 May 2026 11:08:38 +0000 (+0300) Subject: net/mlx5: Map SF controller to pfnum for satellite PFs X-Git-Url: http://git.ipfire.org/gitweb/index.cgi?a=commitdiff_plain;h=90a6aabb74a4451cd72243a28f322dc28f158294;p=thirdparty%2Flinux.git net/mlx5: Map SF controller to pfnum for satellite PFs SF devlink port creation and registration used the ECPF's PCI function as pfnum. Extend this to support satellite PF controllers by introducing mlx5_esw_sf_controller_to_pfnum() that maps a controller number to the corresponding PF number, and use it in SF port attribute setup and SF creation validation. Reorder the checks in mlx5_devlink_sf_port_new() so that mlx5_sf_table_supported() runs before attribute validation, since the new helper requires the eswitch to be initialized. Signed-off-by: Moshe Shemesh Signed-off-by: Tariq Toukan Link: https://patch.msgid.link/20260521110843.367329-8-tariqt@nvidia.com Signed-off-by: Jakub Kicinski --- diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c index d5f0101aa966..fddb108bcbff 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c @@ -125,7 +125,7 @@ static void mlx5_esw_offloads_sf_devlink_port_attrs_set(struct mlx5_eswitch *esw struct netdev_phys_item_id ppid = {}; u16 pfnum; - pfnum = PCI_FUNC(dev->pdev->devfn); + pfnum = mlx5_esw_sf_controller_to_pfnum(dev, controller); mlx5_esw_get_port_parent_id(dev, &ppid); memcpy(dl_port->attrs.switch_id.id, &ppid.id[0], ppid.id_len); dl_port->attrs.switch_id.id_len = ppid.id_len; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c index aa6984c3b933..e1cdb4736452 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c @@ -2150,6 +2150,23 @@ u16 mlx5_esw_get_hpf_pf_num(struct mlx5_core_dev *dev) return PCI_FUNC(dev->pdev->devfn); } +u16 mlx5_esw_sf_controller_to_pfnum(struct mlx5_core_dev *dev, u32 controller) +{ + struct mlx5_eswitch *esw = dev->priv.eswitch; + struct mlx5_esw_functions *esw_funcs; + int i; + + if (!controller) + return PCI_FUNC(dev->pdev->devfn); + + esw_funcs = &esw->esw_funcs; + for (i = 0; i < esw_funcs->num_spfs; i++) + if (controller == esw_funcs->spfs[i].host_number + 1) + return esw_funcs->spfs[i].pf_num; + + return mlx5_esw_get_hpf_pf_num(dev); +} + bool mlx5_esw_has_spf_sfs(struct mlx5_core_dev *dev) { struct mlx5_eswitch *esw = dev->priv.eswitch; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h index 435696d11e64..2b29b4e974c0 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h @@ -892,6 +892,7 @@ int mlx5_esw_spf_get_host_number(struct mlx5_core_dev *dev, int spf_idx, u16 *host_number); u16 mlx5_esw_get_hpf_host_number(struct mlx5_core_dev *dev); u16 mlx5_esw_get_hpf_pf_num(struct mlx5_core_dev *dev); +u16 mlx5_esw_sf_controller_to_pfnum(struct mlx5_core_dev *dev, u32 controller); bool mlx5_esw_has_spf_sfs(struct mlx5_core_dev *dev); int mlx5_esw_vport_vhca_id_map(struct mlx5_eswitch *esw, diff --git a/drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c b/drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c index 2fc69897e35b..b6cecbcc392d 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c @@ -265,6 +265,8 @@ static int mlx5_sf_new_check_attr(struct mlx5_core_dev *dev, const struct devlink_port_new_attrs *new_attr, struct netlink_ext_ack *extack) { + u32 controller; + if (new_attr->flavour != DEVLINK_PORT_FLAVOUR_PCI_SF) { NL_SET_ERR_MSG_MOD(extack, "Driver supports only SF port addition"); return -EOPNOTSUPP; @@ -284,7 +286,9 @@ mlx5_sf_new_check_attr(struct mlx5_core_dev *dev, const struct devlink_port_new_ NL_SET_ERR_MSG_MOD(extack, "External controller is unsupported"); return -EOPNOTSUPP; } - if (new_attr->pfnum != PCI_FUNC(dev->pdev->devfn)) { + controller = new_attr->controller_valid ? new_attr->controller : 0; + if (new_attr->pfnum != + mlx5_esw_sf_controller_to_pfnum(dev, controller)) { NL_SET_ERR_MSG_MOD(extack, "Invalid pfnum supplied"); return -EOPNOTSUPP; } @@ -306,10 +310,6 @@ int mlx5_devlink_sf_port_new(struct devlink *devlink, struct mlx5_sf_table *table = dev->priv.sf_table; int err; - err = mlx5_sf_new_check_attr(dev, new_attr, extack); - if (err) - return err; - if (!mlx5_sf_table_supported(dev)) { NL_SET_ERR_MSG_MOD(extack, "SF ports are not supported."); return -EOPNOTSUPP; @@ -321,6 +321,10 @@ int mlx5_devlink_sf_port_new(struct devlink *devlink, return -EOPNOTSUPP; } + err = mlx5_sf_new_check_attr(dev, new_attr, extack); + if (err) + return err; + return mlx5_sf_add(dev, table, new_attr, extack, dl_port); }