From: Dixiao-L Date: Tue, 2 Jun 2026 13:17:54 +0000 (+0800) Subject: ramips: fix Phicomm K2G WAN by enabling rgmii1 X-Git-Url: http://git.ipfire.org/gitweb/index.cgi?a=commitdiff_plain;h=b3e14884b7f1e448e3b60e570262f27a5cc1a704;p=thirdparty%2Fopenwrt.git ramips: fix Phicomm K2G WAN by enabling rgmii1 The K2G's WAN port is an external RTL8211F gigabit PHY on switch port 5, reached over the SoC's rgmii1 pins. The device tree only requests rgmii2_pins though, so nothing ever claims rgmii1 and the pins keep whatever the bootloader left them as. When rgmii1 is muxed to GPIO the WAN port comes up but receives nothing: port 5 RxGPC stays at 0 and wan never gets a DHCP lease. rgmii1 vs GPIO is GPIOMODE (SYSC + 0x60) bit 9. Requesting rgmii1_pins makes the pinmux driver clear it, which is enough to get the WAN RX path working again. The rgmii1 pads (GPIO 24-35) aren't used for anything else on this board. Tested on a K2G: WAN gets a DHCP lease and passes traffic. Signed-off-by: Dixiao-L Link: https://github.com/openwrt/openwrt/pull/23629 Signed-off-by: Robert Marko --- diff --git a/target/linux/ramips/dts/mt7620a_phicomm_k2g.dts b/target/linux/ramips/dts/mt7620a_phicomm_k2g.dts index bc934d70584..e57db6721b1 100644 --- a/target/linux/ramips/dts/mt7620a_phicomm_k2g.dts +++ b/target/linux/ramips/dts/mt7620a_phicomm_k2g.dts @@ -21,7 +21,7 @@ ðernet { pinctrl-names = "default"; - pinctrl-0 = <&rgmii2_pins &mdio_pins>; + pinctrl-0 = <&rgmii1_pins &mdio_pins>; mediatek,portmap = "llllw";