From: Perry Yuan <perry.yuan@amd.com>
Date: Mon, 23 Feb 2026 15:20:50 +0000 (+0800)
Subject: drm/amdgpu: add SPI idle check for GC 9.4.4 in gfx_v9_4_3_is_idle()
X-Git-Url: http://git.ipfire.org/gitweb/index.cgi?a=commitdiff_plain;h=caefb4bc93e45ec4702bc6cfec8b74b34c978e13;p=thirdparty%2Fkernel%2Flinux.git

drm/amdgpu: add SPI idle check for GC 9.4.4 in gfx_v9_4_3_is_idle()

GC 9.4.4 uses SPI busy status for idle detection instead of GRBM GUI_ACTIVE.
Add version check to use SPI_BUSY for 9.4.4 while keeping GRBM_STATUS
GUI_ACTIVE check for other GC versions.

v2: move this check into amdgpu_ptl_perf_monitor_ctrl(Lijo)

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index ad76074d54aa..5f8f0026483b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -1276,8 +1276,9 @@ static int psp_ptl_invoke(struct psp_context *psp, u32 req_code,
 	 */
 	if (cmd->resp.status) {
 		dev_err(psp->adev->dev,
-				"PTL command 0x%x failed, PSP response status: 0x%X\n",
-				req_code, cmd->resp.status);
+				"PTL command 0x%x failed, PSP response status: 0x%X fw resp=0x%X\n",
+				req_code, cmd->resp.status,
+				cmd->resp.uresp.perf_hw_info.resp);
 		ret = -EIO;
 		goto out;
 	}
@@ -1310,6 +1311,7 @@ int amdgpu_ptl_perf_monitor_ctrl(struct amdgpu_device *adev, u32 req_code,
 	uint32_t ptl_fmt1, ptl_fmt2;
 	struct psp_context *psp;
 	struct amdgpu_ptl *ptl;
+	int ret;
 
 	if (!adev || !ptl_state || !fmt1 || !fmt2)
 		return -EINVAL;
@@ -1356,6 +1358,16 @@ int amdgpu_ptl_perf_monitor_ctrl(struct amdgpu_device *adev, u32 req_code,
 		}
 	}
 
+	/* Wait for GFX engine idle before PTL state transition */
+	if (req_code == PSP_PTL_PERF_MON_SET) {
+		ret = amdgpu_device_ip_wait_for_idle(adev,
+				AMD_IP_BLOCK_TYPE_GFX);
+		if (ret) {
+			dev_err(adev->dev, "GFX not idle before PTL operation (%d)\n", ret);
+			return ret;
+		}
+	}
+
 	return psp_ptl_invoke(psp, req_code, ptl_state, &ptl_fmt1, &ptl_fmt2);
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index ed087e915296..5781a3934b6e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -2465,12 +2465,21 @@ static bool gfx_v9_4_3_is_idle(struct amdgpu_ip_block *ip_block)
 {
 	struct amdgpu_device *adev = ip_block->adev;
 	int i, num_xcc;
+	u32 gc_ip_version;
 
 	num_xcc = NUM_XCC(adev->gfx.xcc_mask);
+	gc_ip_version = amdgpu_ip_version(adev, GC_HWIP, 0);
+
 	for (i = 0; i < num_xcc; i++) {
-		if (REG_GET_FIELD(RREG32_SOC15(GC, GET_INST(GC, i), regGRBM_STATUS),
-					GRBM_STATUS, GUI_ACTIVE))
-			return false;
+		if (gc_ip_version == IP_VERSION(9, 4, 4)) {
+			if (REG_GET_FIELD(RREG32_SOC15(GC, GET_INST(GC, i), regGRBM_STATUS),
+					  GRBM_STATUS, SPI_BUSY))
+				return false;
+		} else {
+			if (REG_GET_FIELD(RREG32_SOC15(GC, GET_INST(GC, i), regGRBM_STATUS),
+					  GRBM_STATUS, GUI_ACTIVE))
+				return false;
+		}
 	}
 	return true;
 }
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
index a719399bcdd5..5bea583732cb 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
@@ -1792,11 +1792,6 @@ static int kfd_ptl_control(struct kfd_process_device *pdd, bool enable)
 	if (adev->kfd.init_complete)
 		amdgpu_amdkfd_stop_sched(adev, pdd->dev->node_id);
 
-	/* Wait for GFX to be idle before PTL operation */
-	ret = amdgpu_device_ip_wait_for_idle(adev, AMD_IP_BLOCK_TYPE_GFX);
-	if (ret)
-		return -ETIMEDOUT;
-
 	ret = pdd->dev->kfd2kgd->ptl_ctrl(adev, PSP_PTL_PERF_MON_SET,
 					  &ptl_state,
 					  &pref_format1,