From: Suraj Kandpal Date: Wed, 29 Apr 2026 04:26:50 +0000 (+0530) Subject: drm/i915/display: Avoid stale PIPE_SCANLINE values after crtc_enable X-Git-Url: http://git.ipfire.org/gitweb/index.cgi?a=commitdiff_plain;h=d08e46efae16b607f13d95a4cd5b84a958b7e995;p=thirdparty%2Flinux.git drm/i915/display: Avoid stale PIPE_SCANLINE values after crtc_enable When a CRTC is moved to a different transcoder (e.g. on DP-MST stream allocation), PIPE_SCANLINE and PIPE_FRMCNT can return values latched from the previous transcoder/mode for up to one vblank period after the new pipe is enabled. The vblank evasion code in intel_pipe_update_start()/end() then samples a stale or boundary scanline and the frame counter ticks during the critical section, producing diagnostic errors of the form: [243.348405] xe 0000:00:02.0: [drm] *ERROR* Atomic update failure on pipe B (start=300 end=301) time 61 us, min 2128, max 2161, scanline start 1200, end 2165 [248.536260] xe 0000:00:02.0: [drm] *ERROR* Atomic update failure on pipe B (start=561 end=562) time 61 us, min 2128, max 2161, scanline start 2162, end 2167 Here "scanline start 1200" is the vblank_start of a previously programmed mode on a different transcoder, while "2162" is the current mode's vblank_start sampled before any real frame has been emitted. Both indicate a stale read rather than a real evasion miss. Wait for one vblank after crtc_enable() to give the new transcoder a chance to start producing live PIPE_SCANLINE/FRMCNT values before any subsequent atomic commit enters the vblank evasion section. This adds at most one frame of latency on modeset, which is invisible to users. Reproduced with igt@kms_rotation_crc@sprite-rotation-180 on a DP-MST sink; with this patch the failures no longer occur. Signed-off-by: Suraj Kandpal Reviewed-by: Pranay Samala Link: https://patch.msgid.link/20260429042650.3335718-1-suraj.kandpal@intel.com --- diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 674a4ece6d0f..8ebd0df25c11 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -6741,6 +6741,8 @@ static void intel_enable_crtc(struct intel_atomic_state *state, display->funcs.display->crtc_enable(state, crtc); + intel_crtc_wait_for_next_vblank(crtc); + /* vblanks work again, re-enable pipe CRC. */ intel_crtc_enable_pipe_crc(crtc); }