From: Ian Chen Date: Wed, 15 Apr 2026 03:25:22 +0000 (+0800) Subject: drm/amd/display: Skip HDR metadata update when Smart Power OLED enabled X-Git-Url: http://git.ipfire.org/gitweb/index.cgi?a=commitdiff_plain;h=ebb884dbb04785e8828400a8f373dd3043d6f4ae;p=thirdparty%2Fkernel%2Flinux.git drm/amd/display: Skip HDR metadata update when Smart Power OLED enabled [Why & How] While smart power oled is enabled, the infopacket contents are tied to the frame histogram, so it does not need driver side to update the hdr metadata. Reviewed-by: Aric Cyr Reviewed-by: Anthony Koo Signed-off-by: Ian Chen Signed-off-by: James Lin Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index dbce5291109ad..77bbaf414082c 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -6533,6 +6533,10 @@ bool dc_smart_power_oled_enable(const struct dc_link *link, bool enable, uint16_ // send cmd status = dc_wake_and_execute_dmub_cmd(dc->ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT); + // Update firmware_controlled_hdr_info_packet state on successful command execution + if (status && pipe_ctx) + pipe_ctx->stream->firmware_controlled_hdr_info_packet = enable; + return status; } diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h index 25552f21faf3a..32f7c7c076c85 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_stream.h +++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h @@ -304,6 +304,7 @@ struct dc_stream_state { enum dc_drr_trigger_mode drr_trigger_mode; struct dc_update_scratch_space *update_scratch; + bool firmware_controlled_hdr_info_packet; }; #define ABM_LEVEL_IMMEDIATE_DISABLE 255 diff --git a/drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c index e93be7b6d9b03..c14fb51c26116 100644 --- a/drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c @@ -470,7 +470,11 @@ void enc3_stream_encoder_update_dp_info_packets( &info_frame->spd, true); } - if (info_frame->hdrsmd.valid) { + /* While smart power oled is enabled DMUB is scanning the contents of each frame + * and updating the HDR infopacket contents. Therefore we transition the infopacket + * programming control to DMUB while Smart Power OLED is enabled. + */ + if (info_frame->hdrsmd.valid && !info_frame->firmware_controlled_hdr_info_packet) { enc->vpg->funcs->update_generic_info_packet( enc->vpg, 3, /* packetIndex */ diff --git a/drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c index 92ed130aeaec9..79d6ab8ed71c4 100644 --- a/drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c @@ -468,7 +468,7 @@ static void dcn31_hpo_dp_stream_enc_update_dp_info_packets( &info_frame->spd, true); - if (info_frame->hdrsmd.valid) + if (info_frame->hdrsmd.valid && !info_frame->firmware_controlled_hdr_info_packet) enc->vpg->funcs->update_generic_info_packet( enc->vpg, 3, /* packetIndex */ diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c index b4afb2bc44934..5a90ff83b65ce 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c @@ -399,6 +399,9 @@ void dcn31_update_info_frame(struct pipe_ctx *pipe_ctx) pipe_ctx->stream_res.hpo_dp_stream_enc, &pipe_ctx->stream_res.encoder_info_frame); + pipe_ctx->stream_res.encoder_info_frame.firmware_controlled_hdr_info_packet + = pipe_ctx->stream->firmware_controlled_hdr_info_packet; + pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->update_dp_info_packets( pipe_ctx->stream_res.hpo_dp_stream_enc, &pipe_ctx->stream_res.encoder_info_frame); @@ -409,6 +412,9 @@ void dcn31_update_info_frame(struct pipe_ctx *pipe_ctx) pipe_ctx->stream_res.stream_enc, &pipe_ctx->stream_res.encoder_info_frame); + pipe_ctx->stream_res.encoder_info_frame.firmware_controlled_hdr_info_packet + = pipe_ctx->stream->firmware_controlled_hdr_info_packet; + pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets( pipe_ctx->stream_res.stream_enc, &pipe_ctx->stream_res.encoder_info_frame); diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h index 27f950ae45ee5..a9bf960dacbce 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h @@ -93,6 +93,7 @@ struct encoder_info_frame { /* Adaptive Sync SDP*/ struct dc_info_packet adaptive_sync; struct enc_sdp_line_num sdp_line_num; + bool firmware_controlled_hdr_info_packet; }; struct encoder_unblank_param {