From: Ping-Ke Shih Date: Fri, 15 May 2026 01:44:30 +0000 (+0800) Subject: wifi: rtw89: 8922d: change naming number and update values for WDE/PLE quota X-Git-Url: http://git.ipfire.org/gitweb/index.cgi?a=commitdiff_plain;h=f98b4684930f631d878bdcf412196fa570692f32;p=thirdparty%2Fkernel%2Flinux.git wifi: rtw89: 8922d: change naming number and update values for WDE/PLE quota The WDE/PLE quota are to configure memory size for TX/RX. Some quota are renamed, and some values are changed. Update them accordingly. Signed-off-by: Ping-Ke Shih Link: https://patch.msgid.link/20260515014433.16168-11-pkshih@realtek.com --- diff --git a/drivers/net/wireless/realtek/rtw89/mac.c b/drivers/net/wireless/realtek/rtw89/mac.c index 6153162ad9b0..8df1b9af719d 100644 --- a/drivers/net/wireless/realtek/rtw89/mac.c +++ b/drivers/net/wireless/realtek/rtw89/mac.c @@ -1847,18 +1847,19 @@ const struct rtw89_mac_size_set rtw89_mac_size = { .ple_qt28 = {1040, 0, 32, 48, 43, 13, 208, 0, 62, 14, 24, 0,}, /* USB 52C USB3.0 */ .ple_qt42 = {1068, 0, 16, 48, 4, 13, 178, 0, 16, 1, 8, 16, 0,}, - .ple_qt42_v2 = {91, 91, 32, 16, 19, 13, 91, 91, 44, 18, 1, 4, 0, 0,}, /* USB 52C USB3.0 */ .ple_qt43 = {3068, 0, 32, 48, 4, 13, 178, 0, 16, 1, 8, 16, 0,}, - .ple_qt43_v2 = {645, 645, 32, 16, 2062, 2056, 2134, 2134, 2087, 2061, 1, 2047, 0, 0,}, /* DLFW 52C */ .ple_qt44 = {0, 0, 16, 256, 0, 0, 0, 0, 0, 0, 0, 0,}, + .ple_qt44_v2 = {91, 91, 32, 16, 19, 13, 91, 91, 44, 18, 1, 4, 0, 0,}, /* DLFW 52C */ .ple_qt45 = {0, 0, 32, 256, 0, 0, 0, 0, 0, 0, 0, 0,}, + .ple_qt45_v2 = {645, 645, 32, 2055, 2058, 2052, 2132, 2132, 2083, 2057, 1, 2043, 0, 0,}, /* 8852C PCIE SCC */ .ple_qt46 = {525, 0, 16, 20, 13, 13, 178, 0, 32, 62, 8, 16,}, /* 8852C PCIE SCC */ .ple_qt47 = {525, 0, 32, 20, 1034, 13, 1199, 0, 1053, 62, 160, 1037,}, + .ple_qt47_v2 = {0, 0, 32, 2703, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,}, .ple_qt57 = {147, 0, 16, 20, 13, 13, 178, 0, 32, 14, 8, 0,}, /* PCIE 64 */ .ple_qt58 = {147, 0, 16, 20, 157, 13, 229, 0, 172, 14, 24, 0,}, @@ -1889,7 +1890,7 @@ const struct rtw89_mac_size_set rtw89_mac_size = { .rsvd1_size0 = {587776, 2048,}, .rsvd1_size2 = {391168, 2048,}, .dle_input3 = {0, 0, 0, 16384, 0, 2048, 0, 0,}, - .dle_input18 = {128, 128, 11454, 2048, 0, 2048, 24, 24,}, + .dle_input20 = {128, 128, 11454, 2048, 0, 2048, 24, 24,}, }; EXPORT_SYMBOL(rtw89_mac_size); diff --git a/drivers/net/wireless/realtek/rtw89/mac.h b/drivers/net/wireless/realtek/rtw89/mac.h index 69f8d7d818a0..3d57f0acfba1 100644 --- a/drivers/net/wireless/realtek/rtw89/mac.h +++ b/drivers/net/wireless/realtek/rtw89/mac.h @@ -1007,13 +1007,14 @@ struct rtw89_mac_size_set { const struct rtw89_ple_quota ple_qt27; const struct rtw89_ple_quota ple_qt28; const struct rtw89_ple_quota ple_qt42; - const struct rtw89_ple_quota ple_qt42_v2; const struct rtw89_ple_quota ple_qt43; - const struct rtw89_ple_quota ple_qt43_v2; const struct rtw89_ple_quota ple_qt44; + const struct rtw89_ple_quota ple_qt44_v2; const struct rtw89_ple_quota ple_qt45; + const struct rtw89_ple_quota ple_qt45_v2; const struct rtw89_ple_quota ple_qt46; const struct rtw89_ple_quota ple_qt47; + const struct rtw89_ple_quota ple_qt47_v2; const struct rtw89_ple_quota ple_qt57; const struct rtw89_ple_quota ple_qt58; const struct rtw89_ple_quota ple_qt59; @@ -1037,7 +1038,7 @@ struct rtw89_mac_size_set { const struct rtw89_dle_rsvd_size rsvd1_size0; const struct rtw89_dle_rsvd_size rsvd1_size2; const struct rtw89_dle_input dle_input3; - const struct rtw89_dle_input dle_input18; + const struct rtw89_dle_input dle_input20; }; extern const struct rtw89_mac_size_set rtw89_mac_size; diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922d.c b/drivers/net/wireless/realtek/rtw89/rtw8922d.c index c6c37e25e4c8..c1ce507a250a 100644 --- a/drivers/net/wireless/realtek/rtw89/rtw8922d.c +++ b/drivers/net/wireless/realtek/rtw89/rtw8922d.c @@ -37,9 +37,7 @@ static const struct rtw89_hfc_ch_cfg rtw8922d_hfc_chcfg_pcie[] = { {0, 601, 0}, /* B0HIQ */ {2, 603, 0}, /* B1MGQ */ {0, 601, 0}, /* B1HIQ */ - {0, 0, 0}, /* FWCMDQ */ - {0, 0, 0}, /* BMC */ - {0, 0, 0}, /* H2D */ + {0, 0, 0}, /* GCQ */ }; static const struct rtw89_hfc_pub_cfg rtw8922d_hfc_pubcfg_pcie = { @@ -62,20 +60,20 @@ static const struct rtw89_hfc_param_ini rtw8922d_hfc_param_ini_pcie[] = { static const struct rtw89_dle_mem rtw8922d_dle_mem_pcie[] = { [RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size16_v1, &rtw89_mac_size.ple_size20_v1, &rtw89_mac_size.wde_qt19_v1, - &rtw89_mac_size.wde_qt19_v1, &rtw89_mac_size.ple_qt42_v2, - &rtw89_mac_size.ple_qt43_v2, &rtw89_mac_size.ple_rsvd_qt9, + &rtw89_mac_size.wde_qt19_v1, &rtw89_mac_size.ple_qt44_v2, + &rtw89_mac_size.ple_qt45_v2, &rtw89_mac_size.ple_rsvd_qt9, &rtw89_mac_size.rsvd0_size6, &rtw89_mac_size.rsvd1_size2, - &rtw89_mac_size.dle_input18}, + &rtw89_mac_size.dle_input20}, [RTW89_QTA_DBCC] = {RTW89_QTA_DBCC, &rtw89_mac_size.wde_size16_v1, &rtw89_mac_size.ple_size20_v1, &rtw89_mac_size.wde_qt19_v1, - &rtw89_mac_size.wde_qt19_v1, &rtw89_mac_size.ple_qt42_v2, - &rtw89_mac_size.ple_qt43_v2, &rtw89_mac_size.ple_rsvd_qt9, + &rtw89_mac_size.wde_qt19_v1, &rtw89_mac_size.ple_qt44_v2, + &rtw89_mac_size.ple_qt45_v2, &rtw89_mac_size.ple_rsvd_qt9, &rtw89_mac_size.rsvd0_size6, &rtw89_mac_size.rsvd1_size2, - &rtw89_mac_size.dle_input18}, + &rtw89_mac_size.dle_input20}, [RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size18_v1, &rtw89_mac_size.ple_size22_v1, &rtw89_mac_size.wde_qt3, &rtw89_mac_size.wde_qt3, &rtw89_mac_size.ple_qt5_v2, - &rtw89_mac_size.ple_qt5_v2, &rtw89_mac_size.ple_rsvd_qt1, + &rtw89_mac_size.ple_qt47_v2, &rtw89_mac_size.ple_rsvd_qt1, &rtw89_mac_size.rsvd0_size6, &rtw89_mac_size.rsvd1_size2, &rtw89_mac_size.dle_input3}, [RTW89_QTA_INVALID] = {RTW89_QTA_INVALID, NULL, NULL, NULL, NULL, NULL,