Update DPC tests/cap-dpc

This adds an ECAM dump from an AMD Bergamo root port that contains
exemplary DPC RP PIO register contents. Note that I chose to replace the
existing file rather than adding a new one. This is because the hex dump
in the existing file didn't include ECAM data at all, so it wasn't
actually useful to verify DPC decoding behavior.

Signed-off-by: Mattias Nissler <mnissler@meta.com>

diff --git a/tests/cap-dpc b/tests/cap-dpc
index abf37b52d53b7dabd8a71f6d1752e36cc8b29860..d600efd9b08f10dc5e1b433d73a024d83c77e4ff 100644 (file)
--- a/tests/cap-dpc
+++ b/tests/cap-dpc
@@ -1,91 +1,380 @@
-05:01.0 Class 0604: Device 10b5:9716 (rev aa)
-       Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
+00:01.1 Class 0604: Device 1022:14ab (rev 01)
+       Subsystem: Device 1022:1453
+       Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

-       Latency: 0, Cache Line Size: 32 bytes
-       Interrupt: pin A routed to IRQ 46
-       NUMA node: 0
-       Bus: primary=05, secondary=06, subordinate=06, sec-latency=0
-       I/O behind bridge: 0000f000-00000fff
-       Memory behind bridge: c6c00000-c6ffffff
-       Prefetchable memory behind bridge: 0000383ff9c00000-0000383ff9ffffff
+       Latency: 0, Cache Line Size: 64 bytes
+       Bus: primary=00, secondary=01, subordinate=0c, sec-latency=0
+       I/O behind bridge: 0000f000-00000fff [disabled] [32-bit]
+       Memory behind bridge: f7000000-f7dfffff [size=14M] [32-bit]
+       Prefetchable memory behind bridge: 0000180000000000-00001960042fffff [size=1441859M] [64-bit]

        Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
        Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-

-       BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
+       BridgeCtl: Parity- SERR+ NoISA- VGA- VGA16+ MAbort- >Reset- FastB2B-

                PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
                PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

-       Capabilities: [40] Power Management version 3
+       Capabilities: [48] Vendor Specific Information: Len=08 <?>
+       Capabilities: [50] Power Management version 3

                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

-               Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
-       Capabilities: [48] MSI: Enable+ Count=1/8 Maskable+ 64bit+
-               Address: 00000000fee004d8  Data: 0000
-               Masking: 000000fe  Pending: 00000000
-       Capabilities: [68] Express (v2) Downstream Port (Slot+), MSI 00
-               DevCap: MaxPayload 1024 bytes, PhantFunc 0
-                       ExtTag- RBE+
-               DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
-                       RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
-                       MaxPayload 128 bytes, MaxReadReq 128 bytes
-               DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
-               LnkCap: Port #1, Speed 8GT/s, Width x4, ASPM L1, Exit Latency L0s <4us, L1 <4us
+               Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
+       Capabilities: [58] Express (v2) Root Port (Slot+), IntMsgNum 0
+               DevCap: MaxPayload 512 bytes, PhantFunc 0
+                       ExtTag+ RBE+ TEE-IO-
+               DevCtl: CorrErr+ NonFatalErr+ FatalErr+ UnsupReq-
+                       RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
+                       MaxPayload 512 bytes, MaxReadReq 4096 bytes
+               DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend-
+               LnkCap: Port #0, Speed 32GT/s, Width x16, ASPM L1, Exit Latency L1 <64us

                        ClockPM- Surprise+ LLActRep+ BwNot+ ASPMOptComp+
                        ClockPM- Surprise+ LLActRep+ BwNot+ ASPMOptComp+

-               LnkCtl: ASPM Disabled; Disabled- CommClk-
-                       ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
-               LnkSta: Speed 8GT/s, Width x4, TrErr- Train- SlotClk- DLActive+ BWMgmt+ ABWMgmt-
-               SltCap: AttnBtn- PwrCtrl+ MRL- AttnInd+ PwrInd+ HotPlug+ Surprise+
-                       Slot #1, PowerLimit 25.000W; Interlock- NoCompl-
-               SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg+
+               LnkCtl: ASPM Disabled; RCB 64 bytes, LnkDisable- CommClk+
+                       ExtSynch- ClockPM- AutWidDis- BWInt+ AutBWInt+ FltModeDis-
+               LnkSta: Speed 32GT/s, Width x16
+                       TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
+               SltCap: AttnBtn+ PwrCtrl+ MRL- AttnInd+ PwrInd+ HotPlug+ Surprise-
+                       Slot #327, PowerLimit 75W; Interlock+ NoCompl-
+               SltCtl: Enable: AttnBtn+ PwrFlt- MRL- PresDet- CmdCplt+ HPIrq+ LinkChg+

                        Control: AttnInd Off, PwrInd On, Power- Interlock-
                SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
                        Changed: MRL- PresDet- LinkState-
                        Control: AttnInd Off, PwrInd On, Power- Interlock-
                SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
                        Changed: MRL- PresDet- LinkState-

-               DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR+, OBFF Via message ARIFwd+
-               DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd+
-               LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
+               RootCap: CRSVisible+
+               RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible+
+               RootSta: PME ReqID 0000, PMEStatus- PMEPending-
+               DevCap2: Completion Timeout: Range ABCD, TimeoutDis+ NROPrPrP- LTR+
+                        10BitTagComp+ 10BitTagReq+ OBFF Via message/WAKE#, ExtFmt+ EETLPPrefix+, MaxEETLPPrefixes 1
+                        EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
+                        FRS- LN System CLS Not Supported, TPHComp+ ExtTPHComp- ARIFwd+
+                        AtomicOpsCap: Routing+ 32bit+ 64bit+ 128bitCAS-
+               DevCtl2: Completion Timeout: 65ms to 210ms, TimeoutDis- ARIFwd-
+                        AtomicOpsCtl: ReqEn- EgressBlck-
+                        IDOReq+ IDOCompl+ LTR- EmergencyPowerReductionReq-
+                        10BitTagReq- OBFF Disabled, EETLPPrefixBlk-
+               LnkCap2: Supported Link Speeds: 2.5-32GT/s, Crosslink- Retimer+ 2Retimers+ DRS-
+               LnkCtl2: Target Link Speed: 32GT/s, EnterCompliance- SpeedDis-

                         Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
                         Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

-                        Compliance De-emphasis: -6dB
-               LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete+, EqualizationPhase1+
-                        EqualizationPhase2+, EqualizationPhase3+, LinkEqualizationRequest-
-       Capabilities: [a4] Subsystem: Device 10b5:9716
-       Capabilities: [100 v1] Device Serial Number 00-0e-df-10-b5-97-00-aa
-       Capabilities: [fb4 v1] Advanced Error Reporting
-               UESta:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
-               UEMsk:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
-               UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
-               CESta:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
-               CEMsk:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
-               AERCap: First Error Pointer: 1f, GenCap+ CGenEn- ChkCap+ ChkEn-
-       Capabilities: [138 v1] Power Budgeting <?>
-       Capabilities: [10c v1] #19
-       Capabilities: [148 v1] Virtual Channel
-               Caps:   LPEVC=0 RefClk=100ns PATEntryBits=1
-               Arb:    Fixed- WRR32- WRR64- WRR128-
-               Ctrl:   ArbSelect=Fixed
-               Status: InProgress-
-               VC0:    Caps:   PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
-                       Arb:    Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
-                       Ctrl:   Enable+ ID=0 ArbSelect=Fixed TC/VC=01
-                       Status: NegoPending- InProgress-
-       Capabilities: [f24 v1] Access Control Services
-               ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl+ DirectTrans+
-               ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl- DirectTrans-
-       Capabilities: [b70 v1] Vendor Specific Information: ID=0001 Rev=0 Len=010 <?>
-       Capabilities: [b60 v1] Downstream Port Containment
-               DpcCap: INT Msg #0, RPExt- PoisonedTLP+ SwTrigger+ RP PIO Log 0, DL_ActiveErr+
-               DpcCtl: Trigger:2 Cmpl+ INT+ ErrCor- PoisonedTLP- SwTrigger- DL_ActiveErr-
-               DpcSta: Trigger- Reason:00 INT- RPBusy- TriggerExt:00 RP PIO ErrPtr:00
+                        Compliance Preset/De-emphasis: -6dB de-emphasis, 0dB preshoot
+               LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete+ EqualizationPhase1+
+                        EqualizationPhase2+ EqualizationPhase3+ LinkEqualizationRequest-
+                        Retimer+ 2Retimers- CrosslinkRes: unsupported, FltMode-
+       Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+
+               Address: 00000000fee00000  Data: 0000
+       Capabilities: [c0] Subsystem: Device 1022:1453
+       Capabilities: [c8] HyperTransport: MSI Mapping Enable+ Fixed+
+       Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?>
+       Capabilities: [150 v2] Advanced Error Reporting
+               UESta:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP-
+                       ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
+                       PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
+               UEMsk:  DLP- SDES+ TLP- FCP- CmpltTO+ CmpltAbrt- UnxCmplt- RxOF- MalfTLP-
+                       ECRC- UnsupReq+ ACSViol- UncorrIntErr- BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
+                       PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
+               UESvrt: DLP+ SDES+ TLP+ FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+
+                       ECRC+ UnsupReq- ACSViol- UncorrIntErr+ BlockedTLP- AtomicOpBlocked- TLPBlockedErr+
+                       PoisonTLPBlocked+ DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
+               CESta:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr- CorrIntErr- HeaderOF-
+               CEMsk:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+ CorrIntErr- HeaderOF-
+               AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn+
+                       MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
+               HeaderLog: 00000000 00000000 00000000 00000000
+               RootCmd: CERptEn- NFERptEn- FERptEn-
+               RootSta: CERcvd- MultCERcvd- UERcvd- MultUERcvd-
+                        FirstFatal- NonFatalMsg- FatalMsg- IntMsgNum 0
+               ErrorSrc: ERR_COR: 0009 ERR_FATAL/NONFATAL: 0000
+       Capabilities: [270 v1] Secondary PCI Express
+               LnkCtl3: LnkEquIntrruptEn- PerformEqu-
+               LaneErrStat: 0
+       Capabilities: [2a0 v1] Access Control Services
+               ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
+               ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
+       Capabilities: [380 v1] Downstream Port Containment
+               DpcCap: IntMsgNum 0, RPExt+ PoisonedTLP+ SwTrigger+ RP PIO Log 6, DL_ActiveErr+
+               DpcCtl: Trigger:0 Cmpl+ INT+ ErrCor+ PoisonedTLP- SwTrigger- DL_ActiveErr-
+               DpcSta: Trigger- Reason:00 INT- RPBusy- TriggerExt:00 RP PIO ErrPtr:11

                Source: 0000
                Source: 0000

-       Kernel driver in use: pcieport
-00: b5 10 16 97 07 05 10 00 aa 00 04 06 08 00 01 00
-10: 00 00 00 00 00 00 00 00 05 06 06 00 f1 01 00 00
-20: c0 c6 f0 c6 c1 f9 f1 f9 3f 38 00 00 3f 38 00 00
-30: 00 00 00 00 40 00 00 00 00 00 00 00 0a 01 12 00
-40: 01 48 03 c8 08 00 00 00 05 68 87 01 d8 04 e0 fe
-50: 00 00 00 00 00 00 00 00 fe 00 00 00 00 00 00 00
-60: 00 00 00 00 00 00 00 00 10 a4 62 01 03 80 00 00
-70: 00 08 09 00 43 68 79 01 00 00 43 60 fa 0c 08 00
-80: f8 11 40 00 00 00 00 00 00 00 00 00 60 08 04 00
-90: 20 00 00 00 0e 0f 00 00 03 00 1e 00 00 00 00 00
-a0: 00 00 00 00 0d 00 00 00 b5 10 16 97 00 00 00 00
+               RP PIO:
+                       Sta: CfgUR+ CfgCA- CfgCTO- IOUR- IOCA- IOCTO- MemUR- MemCA+ MemCTO-
+                       Msk: CfgUR+ CfgCA+ CfgCTO+ IOUR+ IOCA+ IOCTO+ MemUR- MemCA- MemCTO-
+                       Sev: CfgUR- CfgCA- CfgCTO- IOUR- IOCA- IOCTO- MemUR- MemCA- MemCTO-
+                       Err: CfgUR- CfgCA- CfgCTO- IOUR- IOCA- IOCTO- MemUR- MemCA- MemCTO-
+                       Exc: CfgUR- CfgCA- CfgCTO- IOUR- IOCA- IOCTO- MemUR- MemCA- MemCTO-
+                       HeaderLog: 00001001 0000230f f7801100 00000000
+                       ImpSpecLog: 00000000
+                       TLPPrefixLog: 00000000
+       Capabilities: [400 v1] Data Link Feature <?>
+       Capabilities: [410 v1] Physical Layer 16.0 GT/s
+               Phy16Sta: EquComplete+ EquPhase1+ EquPhase2+ EquPhase3+ LinkEquRequest-
+       Capabilities: [440 v1] Lane Margining at the Receiver
+               PortCap: Uses Driver-
+               PortSta: MargReady+ MargSoftReady-
+       Capabilities: [4d0 v1] Native PCIe Enclosure Management <?>
+       Capabilities: [500 v1] Physical Layer 32.0 GT/s
+               Phy32Cap: EqualizationBypass+ NoEqualizationNeeded-
+                         ModTsMode0+ ModTsMode1- ModTsMode2+
+               Phy32Ctl: EqualizationBypassDis+ NoEqualizationNeededDis-
+                         Modified TS Usage Mode: Alternate Protocol Negotiation
+               Phy32Sta: EquComplete+ EquPhase1+ EquPhase2+ EquPhase3+ LinkEquRequest-
+                         Received Enhanced Link Behavior Control: Full Equalization required
+                         ModTsRecv- TxPrecodeOn- TxPrecodeReq- NoEqualizationNeededRecv-
+       Capabilities: [530 v1] Extended Capability ID 0x2b
+       Capabilities: [57c v1] Designated Vendor-Specific: Vendor=1e98 ID=0007 Rev=0 Len=16: CXL
+               PCIe DVSEC for Flex Bus Port
+               FBCap:  Cache+ IO+ Mem+ 68BFlit- MltLogDev-
+               FBCtl:  Cache+ IO+ Mem+ SynHdrByp- DrftBuf- 68BFlit- MltLogDev- RCD- Retimer1- Retimer2-
+               FBSta:  Cache- IO- Mem- SynHdrByp- DrftBuf- 68BFlit- MltLogDev-
+       Capabilities: [5f4 v1] Designated Vendor-Specific: Vendor=1e98 ID=0004 Rev=0 Len=16: CXL
+               GPF DVSEC for CXL Ports
+               GPF Phase 1 Timeout: 0us
+               GPF Phase 2 Timeout: 0us
+00: 22 10 ab 14 07 04 10 00 01 00 04 06 10 00 81 00
+10: 00 00 00 00 00 00 00 00 00 01 0c 00 f1 01 00 00
+20: 00 f7 d0 f7 01 00 21 04 00 18 00 00 60 19 00 00
+30: 00 00 00 00 48 00 00 00 00 00 00 00 ff 00 12 00
+40: 00 00 00 00 00 00 00 00 09 50 08 00 22 10 53 14
+50: 01 58 03 c8 00 00 00 00 10 a0 42 01 22 80 00 00
+60: 57 59 00 00 05 79 7b 00 40 0c 05 31 db 25 3a 0a
+70: f1 11 40 00 10 00 01 00 00 00 00 00 ff 19 7f 00
+80: 06 03 00 00 3e 00 80 01 05 00 5e 00 01 00 00 00
+90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+a0: 05 c0 81 00 00 00 e0 fe 00 00 00 00 00 00 00 00

 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

-c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+c0: 0d c8 00 00 22 10 53 14 08 00 03 a8 00 00 00 00

 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

+100: 0b 00 01 15 01 00 01 01 00 00 00 00 00 00 00 00
+110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+150: 01 00 02 27 00 00 00 00 20 40 10 00 30 30 4e 06
+160: 00 00 00 00 00 20 00 00 a0 01 00 00 00 00 00 00
+170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+180: 00 00 00 00 09 00 00 00 00 00 00 00 00 00 00 00
+190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+1a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+1b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+1c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+1d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+1e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+1f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+200: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+210: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+220: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+230: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+240: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+250: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+260: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+270: 19 00 01 2a 00 00 00 00 00 00 00 00 37 34 37 34
+280: 37 34 37 34 37 34 37 34 37 34 37 34 37 34 37 34
+290: 37 34 37 34 37 34 37 34 37 34 37 34 00 00 00 00
+2a0: 0d 00 01 38 5f 00 1d 00 00 00 00 00 00 00 00 00
+2b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+2c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+2d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+2e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+2f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+300: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+310: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+320: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+330: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+340: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+350: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+360: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+370: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+380: 1d 00 01 40 e0 16 1c 00 00 11 00 00 01 00 02 00
+390: 07 07 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+3a0: 01 10 00 00 0f 23 00 00 00 11 80 f7 00 00 00 00
+3b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+3c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+3d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+3e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+3f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+400: 25 00 01 41 01 00 00 80 01 00 00 80 00 00 00 00
+410: 26 00 01 44 00 00 00 00 00 00 00 00 0f 00 00 00
+420: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+430: 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47
+440: 27 00 01 4d 00 00 01 00 0a 8f 0a 00 0a 8f 0a 00
+450: 0a 8f 0a 00 0a 8f 0a 00 0a 8f 0a 00 0a 8f 0a 00
+460: 0a 8f 0a 00 0a 8f 0a 00 0a 8f 0a 00 0a 8f 0a 00
+470: 0a 8f 0a 00 0a 8f 0a 00 0a 8f 0a 00 0a 8f 0a 00
+480: 0a 8f 0a 00 0a 8f 0a 00 00 00 00 00 00 00 00 00
+490: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+4a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+4b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+4c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+4d0: 29 00 01 50 00 00 00 00 00 00 00 00 00 00 00 00
+4e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+4f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+500: 2a 00 01 53 01 05 00 00 01 02 00 00 0f 00 00 00
+510: 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 01
+520: 87 87 87 87 87 87 87 87 87 87 87 87 87 87 87 87
+530: 2b 00 c1 57 02 01 00 00 00 01 00 00 00 00 00 00
+540: 00 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00
+550: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+560: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+570: 00 00 00 00 00 00 00 00 00 00 00 00 23 00 41 5f
+580: 98 1e 00 01 07 00 07 00 07 00 00 00 00 00 00 00
+590: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+5a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+5b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+5c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+5d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+5e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+5f0: 00 00 00 00 23 00 01 00 98 1e 00 01 04 00 00 00
+600: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+610: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+620: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+630: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+640: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+650: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+660: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+670: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+680: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+690: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+6a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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