perf arm_spe: Improve SIMD flags setting

Fill in ASE and SME operations for the SIMD arch field.

Also set the predicate flags for SVE and SME, but differences between
them: SME does not have a predicate flag, so the setting is based on
events. SVE provides a predicate flag to indicate whether the predicate
is disabled, which allows it to be distinguished into four cases: full
predicates, empty predicates, fully predicated, and disabled predicates.

After:

    perf report -s +simd
    ...
    0.06%     0.06%  sve-test  sve-test               [.] setz                                        [p] SVE
    0.06%     0.06%  sve-test  [kernel.kallsyms]      [k] do_raw_spin_lock
    0.06%     0.06%  sve-test  sve-test               [.] getz                                        [p] SVE
    0.06%     0.06%  sve-test  [kernel.kallsyms]      [k] timekeeping_advance
    0.06%     0.06%  sve-test  sve-test               [.] getz                                        [d] SVE
    0.06%     0.06%  sve-test  [kernel.kallsyms]      [k] update_load_avg
    0.06%     0.06%  sve-test  sve-test               [.] getz                                        [e] SVE
    0.05%     0.05%  sve-test  sve-test               [.] setz                                        [e] SVE
    0.05%     0.05%  sve-test  [kernel.kallsyms]      [k] update_curr
    0.05%     0.05%  sve-test  sve-test               [.] setz                                        [d] SVE
    0.05%     0.05%  sve-test  [kernel.kallsyms]      [k] do_raw_spin_unlock
    0.05%     0.05%  sve-test  [kernel.kallsyms]      [k] timekeeping_update_from_shadow.constprop.0
    0.05%     0.05%  sve-test  sve-test               [.] getz                                        [f] SVE
    0.05%     0.05%  sve-test  sve-test               [.] setz                                        [f] SVE

Reviewed-by: James Clark <james.clark@linaro.org>
Reviewed-by: Ian Rogers <irogers@google.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>

diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c
index 70dd9bee47c755f19a51b80c6df3499180de9540..e5835042acdf7685f95e19665cd45f97ed868275 100644 (file)
--- a/tools/perf/util/arm-spe.c
+++ b/tools/perf/util/arm-spe.c
@@ -353,12 +353,26 @@ static struct simd_flags arm_spe__synth_simd_flags(const struct arm_spe_record *
 
        if (record->op & ARM_SPE_OP_SVE)
                simd_flags.arch |= SIMD_OP_FLAGS_ARCH_SVE;
-
-       if (record->type & ARM_SPE_SVE_PARTIAL_PRED)
-               simd_flags.pred |= SIMD_OP_FLAGS_PRED_PARTIAL;
-
-       if (record->type & ARM_SPE_SVE_EMPTY_PRED)
-               simd_flags.pred |= SIMD_OP_FLAGS_PRED_EMPTY;
+       else if (record->op & ARM_SPE_OP_SME)
+               simd_flags.arch |= SIMD_OP_FLAGS_ARCH_SME;
+       else if (record->op & (ARM_SPE_OP_ASE | ARM_SPE_OP_SIMD_FP))
+               simd_flags.arch |= SIMD_OP_FLAGS_ARCH_ASE;
+
+       if (record->op & ARM_SPE_OP_SVE) {
+               if (!(record->op & ARM_SPE_OP_PRED))
+                       simd_flags.pred = SIMD_OP_FLAGS_PRED_DISABLED;
+               else if (record->type & ARM_SPE_SVE_PARTIAL_PRED)
+                       simd_flags.pred = SIMD_OP_FLAGS_PRED_PARTIAL;
+               else if (record->type & ARM_SPE_SVE_EMPTY_PRED)
+                       simd_flags.pred = SIMD_OP_FLAGS_PRED_EMPTY;
+               else
+                       simd_flags.pred = SIMD_OP_FLAGS_PRED_FULL;
+       } else {
+               if (record->type & ARM_SPE_SVE_PARTIAL_PRED)
+                       simd_flags.pred = SIMD_OP_FLAGS_PRED_PARTIAL;
+               else if (record->type & ARM_SPE_SVE_EMPTY_PRED)
+                       simd_flags.pred = SIMD_OP_FLAGS_PRED_EMPTY;
+       }
 
        return simd_flags;
 }