]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
clk: qcom: rpmh: Add support for Nord rpmh clocks
authorPrasanna Tolety <quic_ptolety@quicinc.com>
Fri, 3 Apr 2026 14:10:53 +0000 (16:10 +0200)
committerBjorn Andersson <andersson@kernel.org>
Thu, 9 Apr 2026 01:57:51 +0000 (20:57 -0500)
Add RPMH clock support for the Nord SoC to allow enable/disable of the
clocks.

Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260403-nord-clks-v1-5-018af14979fd@oss.qualcomm.com
[bjorn: sorted clk_rpmh_match_table[] addition]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
drivers/clk/qcom/clk-rpmh.c

index 6a54481cc6ae175b8238117eefb4f38af0ec40a4..339a6bbcdc4c74c5fd949d7aa3ce85a711643889 100644 (file)
@@ -349,6 +349,10 @@ DEFINE_CLK_RPMH_ARC(bi_tcxo, "xo.lvl", 0x3, 2);
 DEFINE_CLK_RPMH_ARC(bi_tcxo, "xo.lvl", 0x3, 4);
 DEFINE_CLK_RPMH_ARC(qlink, "qphy.lvl", 0x1, 4);
 
+DEFINE_CLK_RPMH_VRM(ln_bb_clk1, _a1, "lnbclka1", 1);
+DEFINE_CLK_RPMH_VRM(ln_bb_clk2, _a1, "lnbclka2", 1);
+DEFINE_CLK_RPMH_VRM(ln_bb_clk3, _a1, "lnbclka3", 1);
+
 DEFINE_CLK_RPMH_VRM(ln_bb_clk1, _a2, "lnbclka1", 2);
 DEFINE_CLK_RPMH_VRM(ln_bb_clk2, _a2, "lnbclka2", 2);
 DEFINE_CLK_RPMH_VRM(ln_bb_clk3, _a2, "lnbclka3", 2);
@@ -965,6 +969,21 @@ static const struct clk_rpmh_desc clk_rpmh_eliza = {
        .num_clks = ARRAY_SIZE(eliza_rpmh_clocks),
 };
 
+static struct clk_hw *nord_rpmh_clocks[] = {
+       [RPMH_CXO_CLK]          = &clk_rpmh_bi_tcxo_div1.hw,
+       [RPMH_CXO_CLK_A]        = &clk_rpmh_bi_tcxo_div1_ao.hw,
+       [RPMH_LN_BB_CLK2]       = &clk_rpmh_ln_bb_clk2_a1.hw,
+       [RPMH_LN_BB_CLK2_A]     = &clk_rpmh_ln_bb_clk2_a1_ao.hw,
+       [RPMH_LN_BB_CLK3]       = &clk_rpmh_ln_bb_clk3_a1.hw,
+       [RPMH_LN_BB_CLK3_A]     = &clk_rpmh_ln_bb_clk3_a1_ao.hw,
+       [RPMH_IPA_CLK]          = &clk_rpmh_ipa.hw,
+};
+
+static const struct clk_rpmh_desc clk_rpmh_nord = {
+       .clks = nord_rpmh_clocks,
+       .num_clks = ARRAY_SIZE(nord_rpmh_clocks),
+};
+
 static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec,
                                         void *data)
 {
@@ -1058,6 +1077,7 @@ static const struct of_device_id clk_rpmh_match_table[] = {
        { .compatible = "qcom,glymur-rpmh-clk", .data = &clk_rpmh_glymur},
        { .compatible = "qcom,kaanapali-rpmh-clk", .data = &clk_rpmh_kaanapali},
        { .compatible = "qcom,milos-rpmh-clk", .data = &clk_rpmh_milos},
+       { .compatible = "qcom,nord-rpmh-clk", .data = &clk_rpmh_nord},
        { .compatible = "qcom,qcs615-rpmh-clk", .data = &clk_rpmh_qcs615},
        { .compatible = "qcom,qdu1000-rpmh-clk", .data = &clk_rpmh_qdu1000},
        { .compatible = "qcom,sa8775p-rpmh-clk", .data = &clk_rpmh_sa8775p},