6.18-stable patches

added patches:
	dma-debug-allow-multiple-invocations-of-overlapping-entries.patch
	dma-mapping-handle-dma_attr_cpu_cache_clean-in-trace-output.patch

diff --git a/queue-6.18/dma-debug-allow-multiple-invocations-of-overlapping-entries.patch b/queue-6.18/dma-debug-allow-multiple-invocations-of-overlapping-entries.patch
new file mode 100644 (file)
index 0000000..97f4df1
--- /dev/null
+++ b/queue-6.18/dma-debug-allow-multiple-invocations-of-overlapping-entries.patch
@@ -0,0 +1,97 @@
+From eca58535b154e6951327319afda94ac80eae7dc3 Mon Sep 17 00:00:00 2001
+From: Leon Romanovsky <leonro@nvidia.com>
+Date: Mon, 16 Mar 2026 21:06:45 +0200
+Subject: dma-debug: Allow multiple invocations of overlapping entries
+
+From: Leon Romanovsky <leonro@nvidia.com>
+
+commit eca58535b154e6951327319afda94ac80eae7dc3 upstream.
+
+Repeated DMA mappings with DMA_ATTR_CPU_CACHE_CLEAN trigger the
+following splat. This prevents using the attribute in cases where a DMA
+region is shared and reused more than seven times.
+
+ ------------[ cut here ]------------
+ DMA-API: exceeded 7 overlapping mappings of cacheline 0x000000000438c440
+ WARNING: kernel/dma/debug.c:467 at add_dma_entry+0x219/0x280, CPU#4: ibv_rc_pingpong/1644
+ Modules linked in: xt_conntrack xt_MASQUERADE nf_conntrack_netlink nfnetlink iptable_nat nf_nat xt_addrtype br_netfilter rpcsec_gss_krb5 auth_rpcgss oid_registry overlay mlx5_fwctl zram zsmalloc mlx5_ib fuse rpcrdma rdma_ucm ib_uverbs ib_iser libiscsi scsi_transport_iscsi ib_umad rdma_cm ib_ipoib iw_cm ib_cm mlx5_core ib_core
+ CPU: 4 UID: 2733 PID: 1644 Comm: ibv_rc_pingpong Not tainted 6.19.0+ #129 PREEMPT
+ Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS rel-1.13.0-0-gf21b5a4aeb02-prebuilt.qemu.org 04/01/2014
+ RIP: 0010:add_dma_entry+0x221/0x280
+ Code: c0 0f 84 f2 fe ff ff 83 e8 01 89 05 6d 99 11 01 e9 e4 fe ff ff 0f 8e 1f ff ff ff 48 8d 3d 07 ef 2d 01 be 07 00 00 00 48 89 e2 <67> 48 0f b9 3a e9 06 ff ff ff 48 c7 c7 98 05 2b 82 c6 05 72 92 28
+ RSP: 0018:ff1100010e657970 EFLAGS: 00010002
+ RAX: 0000000000000007 RBX: ff1100010234eb00 RCX: 0000000000000000
+ RDX: ff1100010e657970 RSI: 0000000000000007 RDI: ffffffff82678660
+ RBP: 000000000438c440 R08: 0000000000000228 R09: 0000000000000000
+ R10: 00000000000001be R11: 000000000000089d R12: 0000000000000800
+ R13: 00000000ffffffef R14: 0000000000000202 R15: ff1100010234eb00
+ FS:  00007fb15f3f6740(0000) GS:ff110008dcc19000(0000) knlGS:0000000000000000
+ CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
+ CR2: 00007fb15f32d3a0 CR3: 0000000116f59001 CR4: 0000000000373eb0
+ Call Trace:
+  <TASK>
+  debug_dma_map_sg+0x1b4/0x390
+  __dma_map_sg_attrs+0x6d/0x1a0
+  dma_map_sgtable+0x19/0x30
+  ib_umem_get+0x284/0x3b0 [ib_uverbs]
+  mlx5_ib_reg_user_mr+0x68/0x2a0 [mlx5_ib]
+  ib_uverbs_reg_mr+0x17f/0x2a0 [ib_uverbs]
+  ib_uverbs_handler_UVERBS_METHOD_INVOKE_WRITE+0xc2/0x130 [ib_uverbs]
+  ib_uverbs_cmd_verbs+0xa0b/0xae0 [ib_uverbs]
+  ? ib_uverbs_handler_UVERBS_METHOD_QUERY_PORT_SPEED+0xe0/0xe0 [ib_uverbs]
+  ? mmap_region+0x7a/0xb0
+  ? do_mmap+0x3b8/0x5c0
+  ib_uverbs_ioctl+0xa7/0x110 [ib_uverbs]
+  __x64_sys_ioctl+0x14f/0x8b0
+  ? ksys_mmap_pgoff+0xc5/0x190
+  do_syscall_64+0x8c/0xbf0
+  entry_SYSCALL_64_after_hwframe+0x4b/0x53
+ RIP: 0033:0x7fb15f5e4eed
+ Code: 04 25 28 00 00 00 48 89 45 c8 31 c0 48 8d 45 10 c7 45 b0 10 00 00 00 48 89 45 b8 48 8d 45 d0 48 89 45 c0 b8 10 00 00 00 0f 05 <89> c2 3d 00 f0 ff ff 77 1a 48 8b 45 c8 64 48 2b 04 25 28 00 00 00
+ RSP: 002b:00007ffe09a5c540 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
+ RAX: ffffffffffffffda RBX: 00007ffe09a5c5d0 RCX: 00007fb15f5e4eed
+ RDX: 00007ffe09a5c5f0 RSI: 00000000c0181b01 RDI: 0000000000000003
+ RBP: 00007ffe09a5c590 R08: 0000000000000028 R09: 00007ffe09a5c794
+ R10: 0000000000000001 R11: 0000000000000246 R12: 00007ffe09a5c794
+ R13: 000000000000000c R14: 0000000025a49170 R15: 000000000000000c
+  </TASK>
+ ---[ end trace 0000000000000000 ]---
+
+Fixes: 61868dc55a11 ("dma-mapping: add DMA_ATTR_CPU_CACHE_CLEAN")
+Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
+Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
+Link: https://lore.kernel.org/r/20260316-dma-debug-overlap-v3-1-1dde90a7f08b@nvidia.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ kernel/dma/debug.c |    6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/kernel/dma/debug.c
++++ b/kernel/dma/debug.c
+@@ -453,7 +453,7 @@ static int active_cacheline_set_overlap(
+       return overlap;
+ }
+ 
+-static void active_cacheline_inc_overlap(phys_addr_t cln)
++static void active_cacheline_inc_overlap(phys_addr_t cln, bool is_cache_clean)
+ {
+       int overlap = active_cacheline_read_overlap(cln);
+ 
+@@ -462,7 +462,7 @@ static void active_cacheline_inc_overlap
+       /* If we overflowed the overlap counter then we're potentially
+        * leaking dma-mappings.
+        */
+-      WARN_ONCE(overlap > ACTIVE_CACHELINE_MAX_OVERLAP,
++      WARN_ONCE(!is_cache_clean && overlap > ACTIVE_CACHELINE_MAX_OVERLAP,
+                 pr_fmt("exceeded %d overlapping mappings of cacheline %pa\n"),
+                 ACTIVE_CACHELINE_MAX_OVERLAP, &cln);
+ }
+@@ -495,7 +495,7 @@ static int active_cacheline_insert(struc
+       if (rc == -EEXIST) {
+               struct dma_debug_entry *existing;
+ 
+-              active_cacheline_inc_overlap(cln);
++              active_cacheline_inc_overlap(cln, entry->is_cache_clean);
+               existing = radix_tree_lookup(&dma_active_cacheline, cln);
+               /* A lookup failure here after we got -EEXIST is unexpected. */
+               WARN_ON(!existing);

diff --git a/queue-6.18/dma-mapping-handle-dma_attr_cpu_cache_clean-in-trace-output.patch b/queue-6.18/dma-mapping-handle-dma_attr_cpu_cache_clean-in-trace-output.patch
new file mode 100644 (file)
index 0000000..fe99f15
--- /dev/null
+++ b/queue-6.18/dma-mapping-handle-dma_attr_cpu_cache_clean-in-trace-output.patch
@@ -0,0 +1,34 @@
+From 6f45b1604cf43945ef472ae4ef30354025307c19 Mon Sep 17 00:00:00 2001
+From: Leon Romanovsky <leonro@nvidia.com>
+Date: Mon, 16 Mar 2026 21:06:46 +0200
+Subject: dma-mapping: handle DMA_ATTR_CPU_CACHE_CLEAN in trace output
+
+From: Leon Romanovsky <leonro@nvidia.com>
+
+commit 6f45b1604cf43945ef472ae4ef30354025307c19 upstream.
+
+Tracing prints decoded DMA attribute flags, but it does not yet
+include the recently added DMA_ATTR_CPU_CACHE_CLEAN. Add support
+for decoding and displaying this attribute in the trace output.
+
+Fixes: 61868dc55a11 ("dma-mapping: add DMA_ATTR_CPU_CACHE_CLEAN")
+Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
+Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
+Link: https://lore.kernel.org/r/20260316-dma-debug-overlap-v3-2-1dde90a7f08b@nvidia.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ include/trace/events/dma.h |    3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/include/trace/events/dma.h
++++ b/include/trace/events/dma.h
+@@ -32,7 +32,8 @@ TRACE_DEFINE_ENUM(DMA_NONE);
+               { DMA_ATTR_ALLOC_SINGLE_PAGES, "ALLOC_SINGLE_PAGES" }, \
+               { DMA_ATTR_NO_WARN, "NO_WARN" }, \
+               { DMA_ATTR_PRIVILEGED, "PRIVILEGED" }, \
+-              { DMA_ATTR_MMIO, "MMIO" })
++              { DMA_ATTR_MMIO, "MMIO" }, \
++              { DMA_ATTR_CPU_CACHE_CLEAN, "CACHE_CLEAN" })
+ 
+ DECLARE_EVENT_CLASS(dma_map,
+       TP_PROTO(struct device *dev, phys_addr_t phys_addr, dma_addr_t dma_addr,

diff --git a/queue-6.18/series b/queue-6.18/series
index d07c0d88e91b2484678d68aadf3e0b65a0a56575..6ed3079f421d230663683a79a3b69f77392a8c71 100644 (file)
--- a/queue-6.18/series
+++ b/queue-6.18/series
@@ -194,3 +194,5 @@ nilfs2-fix-null-i_assoc_inode-dereference-in-nilfs_mdt_save_to_shadow_map.patch
 media-vidtv-fix-pass-by-value-structs-causing-msan-warnings.patch
 media-hackrf-fix-to-not-free-memory-after-the-device-is-registered-in-hackrf_probe.patch
 mm-userfaultfd-fix-hugetlb-fault-mutex-hash-calculation.patch
+dma-debug-allow-multiple-invocations-of-overlapping-entries.patch
+dma-mapping-handle-dma_attr_cpu_cache_clean-in-trace-output.patch