Merge branch kvm-arm64/vgic-v5-ppi into kvmarm-master/next

* kvm-arm64/vgic-v5-ppi: (40 commits)
  : .
  : Add initial GICv5 support for KVM guests, only adding PPI support
  : for the time being. Patches courtesy of Sascha Bischoff.
  :
  : From the cover letter:
  :
  : "This is v7 of the patch series to add the virtual GICv5 [1] device
  : (vgic_v5). Only PPIs are supported by this initial series, and the
  : vgic_v5 implementation is restricted to the CPU interface,
  : only. Further patch series are to follow in due course, and will add
  : support for SPIs, LPIs, the GICv5 IRS, and the GICv5 ITS."
  : .
  KVM: arm64: selftests: Add no-vgic-v5 selftest
  KVM: arm64: selftests: Introduce a minimal GICv5 PPI selftest
  KVM: arm64: gic-v5: Communicate userspace-driveable PPIs via a UAPI
  Documentation: KVM: Introduce documentation for VGICv5
  KVM: arm64: gic-v5: Probe for GICv5 device
  KVM: arm64: gic-v5: Set ICH_VCTLR_EL2.En on boot
  KVM: arm64: gic-v5: Introduce kvm_arm_vgic_v5_ops and register them
  KVM: arm64: gic-v5: Hide FEAT_GCIE from NV GICv5 guests
  KVM: arm64: gic: Hide GICv5 for protected guests
  KVM: arm64: gic-v5: Mandate architected PPI for PMU emulation on GICv5
  KVM: arm64: gic-v5: Enlighten arch timer for GICv5
  irqchip/gic-v5: Introduce minimal irq_set_type() for PPIs
  KVM: arm64: gic-v5: Initialise ID and priority bits when resetting vcpu
  KVM: arm64: gic-v5: Create and initialise vgic_v5
  KVM: arm64: gic-v5: Support GICv5 interrupts with KVM_IRQ_LINE
  KVM: arm64: gic-v5: Implement direct injection of PPIs
  KVM: arm64: Introduce set_direct_injection irq_op
  KVM: arm64: gic-v5: Trap and mask guest ICC_PPI_ENABLERx_EL1 writes
  KVM: arm64: gic-v5: Check for pending PPIs
  KVM: arm64: gic-v5: Clear TWI if single task running
  ...

Signed-off-by: Marc Zyngier <maz@kernel.org>

diff --cc arch/arm64/include/asm/kvm_asm.h
index c8eb992d3ac8e4d2e1774b380e92318bdc6ebe36,44e4696ca113ea0d4f8e268a64cc46f3386b7731..724319298e71f7d627bfaff063562fff82bd3cd9
--- 1/arch/arm64/include/asm/kvm_asm.h
--- 2/arch/arm64/include/asm/kvm_asm.h
+++ b/arch/arm64/include/asm/kvm_asm.h
@@@ -81,6 -81,6 +81,8 @@@ enum __kvm_host_smccc_func 
        __KVM_HOST_SMCCC_FUNC___kvm_timer_set_cntvoff,
        __KVM_HOST_SMCCC_FUNC___vgic_v3_save_aprs,
        __KVM_HOST_SMCCC_FUNC___vgic_v3_restore_vmcr_aprs,
++      __KVM_HOST_SMCCC_FUNC___vgic_v5_save_apr,
++      __KVM_HOST_SMCCC_FUNC___vgic_v5_restore_vmcr_apr,
        __KVM_HOST_SMCCC_FUNC___pkvm_reserve_vm,
        __KVM_HOST_SMCCC_FUNC___pkvm_unreserve_vm,
        __KVM_HOST_SMCCC_FUNC___pkvm_init_vm,

diff --cc arch/arm64/include/asm/kvm_host.h
Simple merge

diff --cc arch/arm64/include/asm/kvm_hyp.h
Simple merge

diff --cc arch/arm64/kvm/arm.c
Simple merge

diff --cc arch/arm64/kvm/hyp/nvhe/Makefile
index 3d33fbefdfc12dd9d062b7780cf27f16009580c0,84a3bf96def6bc494c66912d558ddbe0f5acc366..62cdfbff75625c578a21c016798bbce569228f9e
--- 1/arch/arm64/kvm/hyp/nvhe/Makefile
--- 2/arch/arm64/kvm/hyp/nvhe/Makefile
+++ b/arch/arm64/kvm/hyp/nvhe/Makefile
@@@ -26,15 -26,11 +26,15 @@@ hyp-obj-y := timer-sr.o sysreg-sr.o deb
         hyp-main.o hyp-smp.o psci-relay.o early_alloc.o page_alloc.o \
         cache.o setup.o mm.o mem_protect.o sys_regs.o pkvm.o stacktrace.o ffa.o
  hyp-obj-y += ../vgic-v3-sr.o ../aarch32.o ../vgic-v2-cpuif-proxy.o ../entry.o \
-        ../fpsimd.o ../hyp-entry.o ../exception.o ../pgtable.o
+        ../fpsimd.o ../hyp-entry.o ../exception.o ../pgtable.o ../vgic-v5-sr.o
  hyp-obj-y += ../../../kernel/smccc-call.o
  hyp-obj-$(CONFIG_LIST_HARDENED) += list_debug.o
 +hyp-obj-$(CONFIG_NVHE_EL2_TRACING) += clock.o trace.o events.o
  hyp-obj-y += $(lib-objs)
  
 +# Path to simple_ring_buffer.c
 +CFLAGS_trace.nvhe.o += -I$(srctree)/kernel/trace/
 +
  ##
  ## Build rules for compiling nVHE hyp code
  ## Output of this folder is `kvm_nvhe.o`, a partially linked object

diff --cc arch/arm64/kvm/hyp/nvhe/hyp-main.c
index eff9cb20862757703e8266bdf5cf3c68a98ae3a5,007fc993f2319f4e1544952649a567af6457d9a0..31f080307d959422f66f2d96a657518c8441f510
--- 1/arch/arm64/kvm/hyp/nvhe/hyp-main.c
--- 2/arch/arm64/kvm/hyp/nvhe/hyp-main.c
+++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c
@@@ -591,65 -589,20 +591,79 @@@ static void handle___pkvm_teardown_vm(s
        cpu_reg(host_ctxt, 1) = __pkvm_teardown_vm(handle);
  }
  
 +static void handle___tracing_load(struct kvm_cpu_context *host_ctxt)
 +{
 +      DECLARE_REG(unsigned long, desc_hva, host_ctxt, 1);
 +      DECLARE_REG(size_t, desc_size, host_ctxt, 2);
 +
 +      cpu_reg(host_ctxt, 1) = __tracing_load(desc_hva, desc_size);
 +}
 +
 +static void handle___tracing_unload(struct kvm_cpu_context *host_ctxt)
 +{
 +      __tracing_unload();
 +}
 +
 +static void handle___tracing_enable(struct kvm_cpu_context *host_ctxt)
 +{
 +      DECLARE_REG(bool, enable, host_ctxt, 1);
 +
 +      cpu_reg(host_ctxt, 1) = __tracing_enable(enable);
 +}
 +
 +static void handle___tracing_swap_reader(struct kvm_cpu_context *host_ctxt)
 +{
 +      DECLARE_REG(unsigned int, cpu, host_ctxt, 1);
 +
 +      cpu_reg(host_ctxt, 1) = __tracing_swap_reader(cpu);
 +}
 +
 +static void handle___tracing_update_clock(struct kvm_cpu_context *host_ctxt)
 +{
 +      DECLARE_REG(u32, mult, host_ctxt, 1);
 +      DECLARE_REG(u32, shift, host_ctxt, 2);
 +      DECLARE_REG(u64, epoch_ns, host_ctxt, 3);
 +      DECLARE_REG(u64, epoch_cyc, host_ctxt, 4);
 +
 +      __tracing_update_clock(mult, shift, epoch_ns, epoch_cyc);
 +}
 +
 +static void handle___tracing_reset(struct kvm_cpu_context *host_ctxt)
 +{
 +      DECLARE_REG(unsigned int, cpu, host_ctxt, 1);
 +
 +      cpu_reg(host_ctxt, 1) = __tracing_reset(cpu);
 +}
 +
 +static void handle___tracing_enable_event(struct kvm_cpu_context *host_ctxt)
 +{
 +      DECLARE_REG(unsigned short, id, host_ctxt, 1);
 +      DECLARE_REG(bool, enable, host_ctxt, 2);
 +
 +      cpu_reg(host_ctxt, 1) = __tracing_enable_event(id, enable);
 +}
 +
 +static void handle___tracing_write_event(struct kvm_cpu_context *host_ctxt)
 +{
 +      DECLARE_REG(u64, id, host_ctxt, 1);
 +
 +      trace_selftest(id);
 +}
 +
+ static void handle___vgic_v5_save_apr(struct kvm_cpu_context *host_ctxt)
+ {
+       DECLARE_REG(struct vgic_v5_cpu_if *, cpu_if, host_ctxt, 1);
+ 
+       __vgic_v5_save_apr(kern_hyp_va(cpu_if));
+ }
+ 
+ static void handle___vgic_v5_restore_vmcr_apr(struct kvm_cpu_context *host_ctxt)
+ {
+       DECLARE_REG(struct vgic_v5_cpu_if *, cpu_if, host_ctxt, 1);
+ 
+       __vgic_v5_restore_vmcr_apr(kern_hyp_va(cpu_if));
+ }
+ 
  typedef void (*hcall_t)(struct kvm_cpu_context *);
  
  #define HANDLE_FUNC(x)        [__KVM_HOST_SMCCC_FUNC_##x] = (hcall_t)handle_##x
@@@ -683,6 -636,6 +697,8 @@@ static const hcall_t host_hcall[] = 
        HANDLE_FUNC(__kvm_timer_set_cntvoff),
        HANDLE_FUNC(__vgic_v3_save_aprs),
        HANDLE_FUNC(__vgic_v3_restore_vmcr_aprs),
++      HANDLE_FUNC(__vgic_v5_save_apr),
++      HANDLE_FUNC(__vgic_v5_restore_vmcr_apr),
        HANDLE_FUNC(__pkvm_reserve_vm),
        HANDLE_FUNC(__pkvm_unreserve_vm),
        HANDLE_FUNC(__pkvm_init_vm),

diff --cc arch/arm64/kvm/hyp/nvhe/switch.c
Simple merge