From: Marek Vasut Date: Thu, 9 Apr 2026 00:29:04 +0000 (+0200) Subject: dt-bindings: clock: fsl-sai: Document clock-cells = <1> support X-Git-Url: http://git.ipfire.org/index.cgi?a=commitdiff_plain;h=f293f885c4b2f0aa7a9c405c807dff60ec9905f5;p=thirdparty%2Fkernel%2Flinux.git dt-bindings: clock: fsl-sai: Document clock-cells = <1> support The driver now supports generation of both BCLK and MCLK, document support for #clock-cells = <0> for legacy case and #clock-cells = <1> for the new case which can differentiate between BCLK and MCLK. Acked-by: Conor Dooley Signed-off-by: Marek Vasut Signed-off-by: Stephen Boyd --- diff --git a/Documentation/devicetree/bindings/clock/fsl,sai-clock.yaml b/Documentation/devicetree/bindings/clock/fsl,sai-clock.yaml index 90799b3b505e..041a63fa2d2b 100644 --- a/Documentation/devicetree/bindings/clock/fsl,sai-clock.yaml +++ b/Documentation/devicetree/bindings/clock/fsl,sai-clock.yaml @@ -10,7 +10,7 @@ maintainers: - Michael Walle description: | - It is possible to use the BCLK pin of a SAI module as a generic + It is possible to use the BCLK or MCLK pin of a SAI module as a generic clock output. Some SoC are very constrained in their pin multiplexer configuration. E.g. pins can only be changed in groups. For example, on the LS1028A SoC you can only enable SAIs in pairs. If you use only one SAI, @@ -47,7 +47,7 @@ properties: - const: mclk1 '#clock-cells': - const: 0 + maximum: 1 allOf: - if: