]> git.ipfire.org Git - thirdparty/u-boot.git/log
thirdparty/u-boot.git
3 months agoimx93_evk: Invoke the ELE voltage APIs when adjust VDD_SOC voltage
Peng Fan [Thu, 8 Jan 2026 11:06:57 +0000 (19:06 +0800)] 
imx93_evk: Invoke the ELE voltage APIs when adjust VDD_SOC voltage

SPL will adjust VDD_SOC to OD voltage, because some PMIC uses
0.8V as default for VDD_SOC. So need to call the voltage change
APIs to avoid ELE Glitch Detection triggered reset.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 months agomisc: ele_api: Add Voltage change start and finish APIs
Ye Li [Thu, 8 Jan 2026 11:06:56 +0000 (19:06 +0800)] 
misc: ele_api: Add Voltage change start and finish APIs

On GDET enabled part, need to call voltage change start and finish
APIs when adjust the voltage more than 100mv. Otherwise GDET will be
triggered and system is reset

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 months agoimx95/4_evk: Add missing header
Peng Fan [Thu, 8 Jan 2026 11:06:55 +0000 (19:06 +0800)] 
imx95/4_evk: Add missing header

Include asm/global_data.h for using DECLARE_GLOBAL_DATA_PTR.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 months agoimx95_evk: Sort header files
Peng Fan [Thu, 8 Jan 2026 11:06:54 +0000 (19:06 +0800)] 
imx95_evk: Sort header files

Sort header files following the order:
- generic-header
- asm/generic-header
- asm/arch/
- asm/mach-imx/

Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 months agoimx94_evk: Sort header files
Peng Fan [Thu, 8 Jan 2026 11:06:53 +0000 (19:06 +0800)] 
imx94_evk: Sort header files

Sort header files following the order:
 - generic-header
 - asm/generic-header
 - asm/arch/
 - asm/mach-imx/

Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 months agoimx91_evk: Cleanup headers
Peng Fan [Thu, 8 Jan 2026 11:06:52 +0000 (19:06 +0800)] 
imx91_evk: Cleanup headers

Drop unused headers and sort them.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 months agoimx93_qsb: Cleanup headers
Peng Fan [Thu, 8 Jan 2026 11:06:51 +0000 (19:06 +0800)] 
imx93_qsb: Cleanup headers

Drop unused headers and sort them.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 months agoimx93_evk: Cleanup headers
Peng Fan [Thu, 8 Jan 2026 11:06:50 +0000 (19:06 +0800)] 
imx93_evk: Cleanup headers

Drop unused headers and sort them.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 months agoimx93_evk: Drop DECLARE_GLOBAL_DATA_PTR
Peng Fan [Thu, 8 Jan 2026 11:06:49 +0000 (19:06 +0800)] 
imx93_evk: Drop DECLARE_GLOBAL_DATA_PTR

No user of "gd" in this file, drop DECLARE_GLOBAL_DATA_PTR.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 months agoimx93_evk: Drop board_phy_config
Peng Fan [Thu, 8 Jan 2026 11:06:48 +0000 (19:06 +0800)] 
imx93_evk: Drop board_phy_config

There is already a weak function in drivers/net/phy/phy.c, which
does the same thing. So drop it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 months agoimx93_evk: Drop setup_fec
Peng Fan [Thu, 8 Jan 2026 11:06:47 +0000 (19:06 +0800)] 
imx93_evk: Drop setup_fec

The clock settings could be handled by "assigned-clock-rates" through
DM clock driver, so drop setup_fec().

board_init() is a dummy function now, so clean it up.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 months agoimx93_evk: Drop UART pad settings
Peng Fan [Thu, 8 Jan 2026 11:06:46 +0000 (19:06 +0800)] 
imx93_evk: Drop UART pad settings

With DM_SERIAL and pinctrl driver, the UART pad settings in board code
could be dropped. Then drop board_early_init_f(), since it is a dummy
function now.

While at here, remove WDOG_PAD_CTRL, since no user.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 months agoimx93_frdm: clear and mask TCPC interrupts
Francesco Valla [Sat, 3 Jan 2026 21:22:12 +0000 (22:22 +0100)] 
imx93_frdm: clear and mask TCPC interrupts

One of the two on-board PTN5110 TCPC USB Power Delivery controller on
the i.MX93 FRDM board shares its interrupt line whith the PCAL6524 power
controller (GPIO3-27). Since the PTN5110 starts after POR with the
interrupts enabled, this can lead to an interrupt storm on OS startup if
only the driver for the PCAL6524 is loaded, because none is servicing
(and clearing) the interrupt requests from the PTN5110.

Maks and clear all interrupts as part uring board initialization; they
can be re-enabled later by a proper OS driver if required.

Co-developed-by: Joseph Guo <qijian.guo@nxp.com>
Signed-off-by: Francesco Valla <francesco@valla.it>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
3 months agoMerge branch 'master' of git://source.denx.de/u-boot-usb
Tom Rini [Sat, 17 Jan 2026 16:33:37 +0000 (10:33 -0600)] 
Merge branch 'master' of git://source.denx.de/u-boot-usb

- Add the "apple,t8103-dwc3" compatible to the xhci-dwc3 glue

3 months agoMerge branch 'qcom-main' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
Tom Rini [Fri, 16 Jan 2026 21:14:37 +0000 (15:14 -0600)] 
Merge branch 'qcom-main' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon

We have been getting a lot more patches from Qualcomm engineers, largely
focusing on IoT, router, and automotive platforms (those with QCS, IPQ,
and SA prefixes specifically).

Quite a variety of changes here:
- Watchdog overflow fix
- Hardcoded fastboot buffer addresses for a few board (hoppefully
  temporary until fastboot is updated to read $fastboot_addr_r)
- Enable memory protection (MMU_MGPROT) for ARCH_SNAPDRAGON
- pinctrl support for the QCS615 soc
- various USB/phy fixes including phy config for msm8996/qcs615
- mmc and i2c clock configuration fixes
- significant fixes for rpmh and regulator drivers
- added config fragment for pixel devices
- sa8775p clock fixes
- support for "flattened" dwc3 DT that recently landed upstream for
  sc7280 (qcs6490) and a few other platforms

3 months agoMerge patch series "fix integer overflows in filesystem code"
Tom Rini [Fri, 16 Jan 2026 19:04:47 +0000 (13:04 -0600)] 
Merge patch series "fix integer overflows in filesystem code"

This series from Timo tp Preißl <t.preissl@proton.me> fixes some
(potential) interger overflows in some filesystems by using
__builtin_XXX_overflow helps to catch issues.

Link: https://lore.kernel.org/r/20260109112428.262793-1-t.preissl@proton.me
3 months agofs: prevent integer overflow in ext4fs_get_bgdtable
Timo tp Preißl [Fri, 9 Jan 2026 11:25:07 +0000 (11:25 +0000)] 
fs: prevent integer overflow in ext4fs_get_bgdtable

An integer overflow in gdsize_total calculation could lead
to under-allocation and heap buffer overflow.

Signed-off-by: Timo tp Preißl <t.preissl@proton.me>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
3 months agofs: prevent integer overflow in sqfs_concat
Timo tp Preißl [Fri, 9 Jan 2026 11:24:59 +0000 (11:24 +0000)] 
fs: prevent integer overflow in sqfs_concat

An integer overflow in length calculation could lead to
under-allocation and buffer overcopy.

Signed-off-by: Timo tp Preißl <t.preissl@proton.me>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: João Marcos Costa <joaomarcos.costa@bootlin.com>
3 months agofs: prevent integer overflow in zfs_nvlist_lookup
Timo tp Preißl [Fri, 9 Jan 2026 11:24:51 +0000 (11:24 +0000)] 
fs: prevent integer overflow in zfs_nvlist_lookup

An integer overflow in nvlist size calculation could lead
to under-allocation and heap buffer overflow.

Signed-off-by: Timo tp Preißl <t.preissl@proton.me>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
3 months agofs: prevent integer overflow in fs.c do_mv
Timo tp Preißl [Fri, 9 Jan 2026 11:24:45 +0000 (11:24 +0000)] 
fs: prevent integer overflow in fs.c do_mv

An integer overflow in size calculations could lead to
under-allocation and potential heap buffer overflow.

Signed-off-by: Timo tp Preißl <t.preissl@proton.me>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
3 months agoconfigs: mt8365: remove empty header file
David Lechner [Wed, 7 Jan 2026 19:58:58 +0000 (13:58 -0600)] 
configs: mt8365: remove empty header file

Remove the empty include/configs/mt8365.h header file as it is not
needed. The Kconfig entry that referenced it is also removed.

Signed-off-by: David Lechner <dlechner@baylibre.com>
3 months agousb: dwc3-generic: support Qualcomm flattened DT
Casey Connolly [Fri, 16 Jan 2026 17:09:44 +0000 (18:09 +0100)] 
usb: dwc3-generic: support Qualcomm flattened DT

Qualcomm devicetrees are moving away from having a glue node with dwc3
as a subnode and now may just have a single flattened node.

Rockchip already have a glue_get_ctrl_dev op which returns the node for
the glue device itself, commonise this and reuse it for the new Qualcomm
node.

Lastly adjust the qscratch base address since it now requires an offset
from the dwc3 base.

Link: https://patch.msgid.link/20260116-casey-usb-role-switch-v2-1-83a1a6501a11@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agoMerge tag 'u-boot-dfu-20260116' of https://source.denx.de/u-boot/custodians/u-boot-dfu
Tom Rini [Fri, 16 Jan 2026 15:18:34 +0000 (09:18 -0600)] 
Merge tag 'u-boot-dfu-20260116' of https://source.denx.de/u-boot/custodians/u-boot-dfu

u-boot-dfu-20260116

CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/29018

Android:
* Fix missing dependency for BOOTMETH_ANDROID
* Add bootconfig support
* Add 'get ramdisk' command to abootimg

DFU:
* Improve error handling in dfu_fill_entity()

USB Gadget:
* ci_udc: Ensure ci_ep->desc is valid before using it
* ci_udc: Add additional debug prints

3 months agoMerge patch series "video: simple_panel support for am335x evm panel"
Tom Rini [Fri, 16 Jan 2026 15:07:35 +0000 (09:07 -0600)] 
Merge patch series "video: simple_panel support for am335x evm panel"

Markus Schneider-Pargmann (TI.com) <msp@baylibre.com> says:

This series adds the capability to define hardcoded panel settings to
the simple_panel driver similar to the Linux Kernel and adds the panel
used on am335x evm. panel-uclass.c is extended to support get_modes()
for panels and drm_display_mode conversion. In a second step the tilcdc
is extended to support OF graph to be able to connect to the simple
panel devicetree node.

Link: https://lore.kernel.org/r/20260105-topic-am33-evm-lcd-v2026-01-v4-0-7617591b8159@baylibre.com
3 months agospl: fix incorrect dependency for SPL_NET
Quentin Schulz [Thu, 8 Jan 2026 12:28:36 +0000 (13:28 +0100)] 
spl: fix incorrect dependency for SPL_NET

When SPL_NET is included, scripts/Makefile.xpl includes net/. However,
in this directory, the Makefile only compiles things if CONFIG_NET or
CONFIG_NET_LWIP is defined (it doesn't use $(PHASE_)). Therefore, at
least one networking stack needs to be enabled for SPL_NET=y to do
anything meaningful.

In certain cases (e.g. am62px_evm_r5_ethboot_defconfig + NO_NET=y via
menuconfig), it is possible to fail the build with undefined references
(since include/net-common.h does check with CONFIG_IS_ENABLED(NET) which
would be true for SPL_NET, but the implementation wouldn't be compiled).

Fix this oversight by making sure a network stack (and the legacy one)
is available when selecting SPL_NET.

Fixes: 8cb330355bd5 ("net: introduce alternative implementation as net/lwip/")
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
3 months agoarm: mediatek: remove extra gpio header
David Lechner [Mon, 5 Jan 2026 20:47:21 +0000 (14:47 -0600)] 
arm: mediatek: remove extra gpio header

Remove empty gpio.h header file and CONFIG_GPIO_EXTRA_HEADER on
ARCH_MEDIATEK. There is no reason to have these since the header
doesn't contain anything.

Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
3 months agobootstd: rauc: Free memory during error handling
Francois Berder [Mon, 5 Jan 2026 20:26:14 +0000 (21:26 +0100)] 
bootstd: rauc: Free memory during error handling

While reading bootflow, memory was not released if an
error occurred.

Signed-off-by: Francois Berder <fberder@outlook.fr>
Acked-by: Martin Schwan <m.schwan@phytec.de>
Tested-by: Martin Schwan <m.schwan@phytec.de>
3 months agoarm: dts: an7581: set r_smpl for MMC in U-Boot
Ray Liu [Fri, 2 Jan 2026 13:25:00 +0000 (21:25 +0800)] 
arm: dts: an7581: set r_smpl for MMC in U-Boot

When booting from SPI, the ROM code does not initialize the MMC
controller on AN7581. As a result, the first MMC initialization
is performed by U-Boot.

In this case, the r_smpl bit is left uninitialized, which may
cause incorrect sampling timing during early MMC access.

Set the r_smpl bit explicitly in the U-Boot device tree to ensure
reliable MMC initialization.

This change is limited to the U-Boot-specific device tree.
The Linux MMC driver already performs runtime delay detection
and does not require a fixed r_smpl setting.

Signed-off-by: Ray Liu <ray.xy.liu@gmail.com>
3 months agovideo: ti: am335x: Support OF graph
Markus Schneider-Pargmann (TI.com) [Mon, 5 Jan 2026 09:36:29 +0000 (10:36 +0100)] 
video: ti: am335x: Support OF graph

Add support for OF graph parsing. When using OF graph the default
tilcdc_panel_info is used which is the same as defined in Linux.

Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com>
3 months agovideo: simple_panel: Add tfc_s9700rtwv43tr_01b
Markus Schneider-Pargmann (TI.com) [Mon, 5 Jan 2026 09:36:28 +0000 (10:36 +0100)] 
video: simple_panel: Add tfc_s9700rtwv43tr_01b

Add timing data for tfc_s9700rtwv43tr_01b from Linux to the simple-panel
driver. To support hardcoded timing data as Linux does, add a new struct
simple_panel_drv_data which holds a struct display_timing pointer as
well. The hardcoded timing data is preferred over DT parsing.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com>
3 months agopanel: Lightweight support of get_modes()
Markus Schneider-Pargmann (TI.com) [Mon, 5 Jan 2026 09:36:27 +0000 (10:36 +0100)] 
panel: Lightweight support of get_modes()

Linux uses get_modes() to fetch all available panel modes from the
driver. This is also used to fetch the modes from Linux's simple panel
implementation where a list of drm_display_mode structs is used to
define the different possible panels.

To make our work easier, create a compatible way of fetching and
defining these modes in u-boot. get_modes() fetches the available modes
from the panel driver. The get_display_timing() call maps the
drm_display_mode properties to the display_timing struct. This call now
uses whatever panel operation is available, get_display_timing() or
get_modes().

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com>
3 months agopanel: Add missing comment for the timing argument
Markus Schneider-Pargmann (TI.com) [Mon, 5 Jan 2026 09:36:26 +0000 (10:36 +0100)] 
panel: Add missing comment for the timing argument

For completeness add it.

Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com>
3 months agousb: xhci-dwc3: Add "apple,t8103-dwc3" compatible
Janne Grunau [Fri, 16 Jan 2026 13:35:06 +0000 (14:35 +0100)] 
usb: xhci-dwc3: Add "apple,t8103-dwc3" compatible

The Linux support for dwc3 on Apple silicon SoCs switched to using a
apple specific glue driver [1] that uses it own compatible string. The
glue driver handles platform specific requirements on the interaction
between dwc3 and the USB2/USB3 PHY and reset-controller for USB role
switches and plug events.
To keep USB working as before when the nodes still carried "snps,dwc3"
as compatible add "apple,t8103-dwc3" to the of match table. Eventually
it is probably advisable to add a dwc3-apple glue driver and write code
for the currently empty Apple Type-C PHY driver in phy-apple-atc.c.

Link: https://lore.kernel.org/asahi/20251015-b4-aplpe-dwc3-v2-0-cbd65a2d511a@kernel.org/
Reviewed-by: Neal Gompa <neal@gompa.dev>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Signed-off-by: Janne Grunau <j@jannau.net>
3 months agotest: abootimg: Add test for bootconfig handling
Guillaume La Roque (TI.com) [Mon, 12 Jan 2026 10:55:41 +0000 (11:55 +0100)] 
test: abootimg: Add test for bootconfig handling

Add test to verify that androidboot.* parameters are correctly extracted
from bootargs and appended to the bootconfig section when using
'abootimg get ramdisk' with boot image v4 and vendor_boot image.

The test verifies:
- androidboot.* parameters are removed from bootargs
- They are appended to the bootconfig section in the ramdisk
- Non-androidboot parameters remain in bootargs
- The bootconfig trailer is properly updated

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Guillaume La Roque (TI.com) <glaroque@baylibre.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20260112-bootconfig-v5-5-79b242159ac7@baylibre.com
[mkorpershoek: dropped whitespace changes from original patch]
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
3 months agoarm64: versal2: Fix emmc boot mode boot_target issue
Pranav Tilak [Tue, 13 Jan 2026 06:01:07 +0000 (11:31 +0530)] 
arm64: versal2: Fix emmc boot mode boot_target issue

The eMMC boot device controller on Versal2 requires device pointer
initialization before accessing its sequence number. The EMMC_MODE case
was using dev_seq(dev) on an uninitialized pointer, causing corrupted
boot_targets entries (mmc7f7fbfbf instead of mmc0/mmc1).

Add uclass_get_device_by_name() call to properly initialize the device
pointer before reading the sequence number. The dev sequence number is
determined at runtime based on DT aliases.

Fix boot_targets corruption in eMMC boot mode, allowing proper boot
device selection instead of falling back to JTAG mode.

Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260113060107.1136297-1-pranav.vinaytilak@amd.com
3 months agoMerge tag 'net-20260115' of https://source.denx.de/u-boot/custodians/u-boot-net
Tom Rini [Thu, 15 Jan 2026 14:50:53 +0000 (08:50 -0600)] 
Merge tag 'net-20260115' of https://source.denx.de/u-boot/custodians/u-boot-net

Pull request net-20260115.

CI: https://source.denx.de/u-boot/custodians/u-boot-net/-/pipelines/29008

net:
- phy: micrel KSZ9031 and KSZ9021 fixes
- phy: marvell10g fix
- Fix "net stats" help
- Add Microsemi/Microchip MDIO driver
- tftpput: Rework to exclude code from xPL phases

net-legacy:
- Some refactoring to help with lwIP NF support

net-lwip:
- Add NFS support

3 months agocmd: abootimg: Add 'get ramdisk' command
Guillaume La Roque (TI.com) [Mon, 12 Jan 2026 10:55:40 +0000 (11:55 +0100)] 
cmd: abootimg: Add 'get ramdisk' command

Add support for retrieving ramdisk address and size from Android boot
images. This command allows users to extract the ramdisk information
for boot image v3+ which combines vendor ramdisk, boot ramdisk and
bootconfig sections.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Guillaume La Roque (TI.com) <glaroque@baylibre.com>
Link: https://lore.kernel.org/r/20260112-bootconfig-v5-4-79b242159ac7@baylibre.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
3 months agoboot: android: Add bootconfig support
Guillaume La Roque (TI.com) [Mon, 12 Jan 2026 10:55:39 +0000 (11:55 +0100)] 
boot: android: Add bootconfig support

For android vendor boot image version 4 bootconfig is mandatory.[1]

In the android_image_get_ramdisk function, after copying both vendor and
boot ramdisks, we extract all androidboot.* entries from the kernel
command line. These entries are added to the bootconfig section.
We then update the sizes of the ramdisk and bootconfig.
Finally, all androidboot.* entries are removed from the kernel command
line.

[1] https://source.android.com/docs/core/architecture/partitions/vendor-boot-partitions#bootloader-support

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Guillaume La Roque (TI.com) <glaroque@baylibre.com>
Link: https://lore.kernel.org/r/20260112-bootconfig-v5-3-79b242159ac7@baylibre.com
[mkorpershoek: dropped irrelevant code comments]
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
3 months agoboot: android: Add sandbox memory mapping support
Guillaume La Roque (TI.com) [Mon, 12 Jan 2026 10:55:38 +0000 (11:55 +0100)] 
boot: android: Add sandbox memory mapping support

Use map_to_sysmem() to convert header pointers to physical addresses
in parse_hdr functions, and add proper map_sysmem()/unmap_sysmem()
calls in android_image_get_data() for sandbox compatibility.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Guillaume La Roque (TI.com) <glaroque@baylibre.com>
Link: https://lore.kernel.org/r/20260112-bootconfig-v5-2-79b242159ac7@baylibre.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
3 months agoboot: android: import addBootConfigParameters() from AOSP
Mattijs Korpershoek (TI.com) [Mon, 12 Jan 2026 10:55:37 +0000 (11:55 +0100)] 
boot: android: import addBootConfigParameters() from AOSP

To properly implement Android boot image v4, U-Boot must be able to
add additional entries to the bootconfig.

Add `add_bootconfig_parameters()` to do so.

This has been imported from Google's U-Boot source[1]
The variables/function names have been reworked to be
compliant with U-Boot's coding style.

[1] https://android.googlesource.com/platform/external/u-boot/+/7af0a0506d4de6f5ea147d10fb0664a8af07d326

Signed-off-by: Mattijs Korpershoek (TI.com) <mkorpershoek@kernel.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Guillaume La Roque (TI.com) <glaroque@baylibre.com>
Link: https://lore.kernel.org/r/20260112-bootconfig-v5-1-79b242159ac7@baylibre.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
3 months agonet: phy: micrel_ksz90x1: support forced GIGE master for KSZ9031
Markus Niebel [Tue, 2 Dec 2025 08:13:43 +0000 (09:13 +0100)] 
net: phy: micrel_ksz90x1: support forced GIGE master for KSZ9031

The micrel KSZ9031 phy has a optional clock pin (CLK125_NDO) which can be
used as reference clock for the MAC unit. The clock signal must meet the
RGMII requirements to ensure the correct data transmission between the
MAC and the PHY. The KSZ9031 phy does not fulfill the duty cycle
requirement if the phy is configured as slave. For a complete
describtion look at the errata sheets: DS80000691D or DS80000692D.

The errata sheet recommends to force the phy into master mode whenever
there is a 1000Base-T link-up as work around. Only set the
"micrel,force-master" property if you use the phy reference clock provided
by CLK125_NDO pin as MAC reference clock in your application.

Attention: this workaround is only usable if the link partner can
be configured to slave mode for 1000Base-T.

This follows linux implementation in commit
e1b505a60366 ("net: phy: micrel: add 125MHz reference clock workaround")

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
3 months agonet: phy: micrel_ksz90x1: disable asymmetric pause for KSZ9031 and KSZ9021
Markus Niebel [Tue, 2 Dec 2025 08:13:42 +0000 (09:13 +0100)] 
net: phy: micrel_ksz90x1: disable asymmetric pause for KSZ9031 and KSZ9021

Disable the support due to chip errata and call genphy_config_aneg
instead of genphy_config. For a complete describtion look at the
KSZ9031 errata sheets: DS80000691D or DS80000692D.

Micrel KSZ9021 has no errata, but has the same issue with Asymmetric Pause.
This patch apply the same workaround as the one for KSZ9031.

This follows linux implementation in commits
3aed3e2a143c ("net: phy: micrel: add Asym Pause workaround")
407d8098cb1a ("net: phy: micrel: add Asym Pause workaround for KSZ9021")

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
3 months agonet: phy: marvell10g: Fix PHY mode bitmap handling
Marek Vasut [Thu, 1 Jan 2026 16:51:44 +0000 (17:51 +0100)] 
net: phy: marvell10g: Fix PHY mode bitmap handling

Replace PHY interface mode bitmap handling with comparison test to match
U-Boot PHY subsystem behavior. U-Boot currently implements only single PHY
interface mode for each PHY. Linux currently uses bitmap of PHY interface
modes for each PHY.

The reason why in Linux uses bitmap of supported interface modes is so
that Linux can select the best serdes mode switching behavior for the PHY.

For example if the host only supports 10gbase-r serdes mode, then the PHY
must always talk to the host in 10gbase-r mode, even if the RJ-45 copper
speed was autonegotiated to lower speed (i.e. 1Gbps).

If the host supports both 10gbase-r and sgmii serdes modes, we want the
PHY to switch to sgmii if the RJ-45 speed is 1000/100/10, and to switch
to 10gbase-r if the RJ-45 speed is 10000.

U-Boot does not implement this functionality yet, therefore remove modes
which cannot be currently supported and switch mv_test_bit() to plain
mode comparison.

Fixes: b6fcab0728cb ("net: phy: marvell10g: Adapt Marvell 10G PHY driver from Linux")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agoAdd missing “net” prefix in help net
Link Mauve [Sat, 27 Dec 2025 18:18:48 +0000 (19:18 +0100)] 
Add missing “net” prefix in help net

The usage of the net sub-system was missing the complete command for “net
stats”.

Signed-off-by: Link Mauve <linkmauve@linkmauve.fr>
Reviewed-by: Jerome Forissier <jerome@forissier.org>
3 months agonet: add Microsemi/Microchip MDIO driver
Robert Marko [Tue, 30 Dec 2025 21:06:03 +0000 (22:06 +0100)] 
net: add Microsemi/Microchip MDIO driver

Add Microsemi/Microchip MDIO driver for interfaces found in their network
switches.

Driver is based on the Linux version.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Acked-by: Jerome Forissier <jerome@forissier.org>
3 months agonet: tftpput: Rework to exclude code from xPL phases
Tom Rini [Thu, 25 Dec 2025 15:37:21 +0000 (09:37 -0600)] 
net: tftpput: Rework to exclude code from xPL phases

Given how the support for CONFIG_CMD_TFTPPUT is woven through the
support for the tftp protocol we currently end up including "put"
support in xPL phases, if enabled. This in turn can lead to size
overflow on those platforms as xPL tends to be constrained. To resolve
this, use "CMD_TFTPPUT" in the code to check for both CONFIG_CMD_TFTPPUT
being true and not being in an xPL build phase.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jerome Forissier <jerome@forissier.org>
3 months agoconfigs: qemu_arm64_lwip_defconfig: enable CMD_NFS
Andrew Goodbody [Fri, 12 Dec 2025 11:32:29 +0000 (11:32 +0000)] 
configs: qemu_arm64_lwip_defconfig: enable CMD_NFS

Enable NFS command so that it gets built by CI and can be tested more
easily.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
3 months agonet: lwip: nfs: Port the NFS code to work with lwIP
Andrew Goodbody [Fri, 12 Dec 2025 11:32:28 +0000 (11:32 +0000)] 
net: lwip: nfs: Port the NFS code to work with lwIP

After the preparatory patches moved most of the NFS code into common
files we now add the code to enable NFS support with lwIP.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
3 months agonet: nfs: Move most NFS code to common files
Andrew Goodbody [Fri, 12 Dec 2025 11:32:27 +0000 (11:32 +0000)] 
net: nfs: Move most NFS code to common files

Move most of the NFS code into common files so that it can be used by an
lwIP port of NFS.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
3 months agonet: nfs: Add licence header
Andrew Goodbody [Fri, 12 Dec 2025 11:32:26 +0000 (11:32 +0000)] 
net: nfs: Add licence header

Add the same GPL2+ licence header to the NFS code as appears on other
NFS related files.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
3 months agonet: Move some variables to net-common files
Andrew Goodbody [Fri, 12 Dec 2025 11:32:25 +0000 (11:32 +0000)] 
net: Move some variables to net-common files

Make some variables available to be used by either the legacy network
code or lwIP by moving them into the net-common files. This also allowed
removing a small number of duplicated variables from the lwIP code.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
3 months agonet: move net_state to net-common
Andrew Goodbody [Fri, 12 Dec 2025 11:32:24 +0000 (11:32 +0000)] 
net: move net_state to net-common

Move the net_state variable into common code so that it can be used by
either the legacy network code or lwIP. This is needed for porting
across the NFS support code for use with lwIP.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
3 months agonet:lwip: Add debug line to net-lwip
Andrew Goodbody [Fri, 5 Dec 2025 09:46:48 +0000 (09:46 +0000)] 
net:lwip: Add debug line to net-lwip

When debugging the LWIP NFS implementation this debug line helped to
show the cause of an error. This could be useful to someone in the
future.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
3 months agobootstd: android: Add missing free in android_read_bootflow
Francois Berder [Wed, 14 Jan 2026 09:14:55 +0000 (10:14 +0100)] 
bootstd: android: Add missing free in android_read_bootflow

If strdup call fails, one needs to free priv variable.

Signed-off-by: Francois Berder <fberder@outlook.fr>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Link: https://lore.kernel.org/r/BESP194MB28052734FD0361EA602F6360DA8FA@BESP194MB2805.EURP194.PROD.OUTLOOK.COM
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
3 months agodfu: Report error codes
Sean Anderson [Tue, 6 Jan 2026 22:22:11 +0000 (17:22 -0500)] 
dfu: Report error codes

A lot of things can go wrong while parsing dfu_alt_info. Make sure to
pass the real error codes all the way up instead of replacing them with
an unhelpful -1.

Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20260106222212.744823-1-sean.anderson@linux.dev
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
3 months agoclk: qcom: sa8775p: Fix USB clock configuration and add resets
Balaji Selvanathan [Tue, 13 Jan 2026 06:58:55 +0000 (12:28 +0530)] 
clk: qcom: sa8775p: Fix USB clock configuration and add resets

Correct USB30 primary clock RCG configuration and add missing
USB3_PRIM_PHY_AUX_CMD_RCGR RCG configuration.
Above taken from Linux commit 08c51ceb12f7 ("clk: qcom: add the GCC driver for sa8775p")

Add missing USB3_PRIM_PHY_PIPE_CLK gate clock definition.
Extend reset map with USB-related BCR entries and video BCR
for comprehensive reset control support.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://patch.msgid.link/20260113065856.3287772-1-balaji.selvanathan@oss.qualcomm.com
[casey: indentation fix]
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agoclk: qcom: sa8775p: Add QUP serial engine clock support
Swathi Tamilselvan [Tue, 13 Jan 2026 04:22:13 +0000 (09:52 +0530)] 
clk: qcom: sa8775p: Add QUP serial engine clock support

Add clock gate definitions and entries for QUP (Qualcomm Universal
Peripheral) serial engine clocks across all four wrappers on SA8775P.
This enables proper clock management for I2C, SPI, and UART
peripherals connected to the QUP blocks.

This resolves the "unknown clock ID 133" error for UART10 and
provides complete QUP clock infrastructure for the platform.

Signed-off-by: Swathi Tamilselvan <swathi.tamilselvan@oss.qualcomm.com>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://patch.msgid.link/20260113042213.3107106-1-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agoconfigs: Add google-pixel fragment config for Pixel 3, 3 XL, 5
David Heidelberg [Thu, 8 Jan 2026 22:13:02 +0000 (23:13 +0100)] 
configs: Add google-pixel fragment config for Pixel 3, 3 XL, 5

Introduce a fragment config for the Pixel 3, Pixel 3 XL, Pixel 5.

On these devices, U-Boot is chainloaded via fastboot. However, due to
additional requirements added by Google, the image header must have
a specific value for the text offset.
This is solved by setting CONFIG_TEXT_BASE to 0x80080000 in U-Boot.

Reviewed-by: Simon Glass <simon.glass@canonical.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Link: https://patch.msgid.link/20260108-pixel-config-v4-2-76a2212b69a5@ixit.cz
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agodoc: board: qualcomm: document Pixel 3 / 3 XL support
David Heidelberg [Thu, 8 Jan 2026 22:13:01 +0000 (23:13 +0100)] 
doc: board: qualcomm: document Pixel 3 / 3 XL support

U-Boot does work on Qualcomm 845-based Pixel 3 and 3 XL.

Reviewed-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Signed-off-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Link: https://patch.msgid.link/20260108-pixel-config-v4-1-76a2212b69a5@ixit.cz
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agopower: regulator: qcom-rpmh: correctly map pmic mode
Casey Connolly [Thu, 8 Jan 2026 20:28:48 +0000 (21:28 +0100)] 
power: regulator: qcom-rpmh: correctly map pmic mode

Currently we don't properly map between the regulator mode ID enum and
the appropriate register values in the mode map, as a result we always
unintentionally vote for retention mode if we actually attempt to set
it. In the set_mode path we did find the appropriate entry in the mode
map but we wrote the id instead of the register values. Clean this up
and properly map id -> mode and vice versa.

Link: https://patch.msgid.link/20260108-rpmh-regulator-fixes-v1-6-d1b5b300b665@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agopower: regulator: qcom-rpmh: read votes from rpmh
Casey Connolly [Thu, 8 Jan 2026 20:28:47 +0000 (21:28 +0100)] 
power: regulator: qcom-rpmh: read votes from rpmh

Make use of the new RPMh read support to fetch regulator values that may
have been voted on by a previous bootloader stage. This allows commands
like "regulator status" to report the actual votes programmed into
hardware (though not necessarily the actual states of the regulators
once the votes have been aggregated).

Link: https://patch.msgid.link/20260108-rpmh-regulator-fixes-v1-5-d1b5b300b665@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agosoc/qcom: rpmh: add RPMh read
Casey Connolly [Thu, 8 Jan 2026 20:28:46 +0000 (21:28 +0100)] 
soc/qcom: rpmh: add RPMh read

Implement support for RPMh reads, these allow reading out the
current votes for RPMh controlled resources such as regulators and
interconnects.

Link: https://patch.msgid.link/20260108-rpmh-regulator-fixes-v1-4-d1b5b300b665@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agosoc/qcom: rpmh: correctly wait for TCS flush
Casey Connolly [Thu, 8 Jan 2026 20:28:45 +0000 (21:28 +0100)] 
soc/qcom: rpmh: correctly wait for TCS flush

Several bugs were discovered in the rpmh-rsc driver which collectively
meant we were never actually waiting for the TCS to flush, these were
likely missed because U-Boot runs single threaded and the RPMh had
typically processed the single command we sent by the time we went
to send the next one. However a future patch will implement rpmh read
support which requires us to properly wait for the RPMh command response
so we can return the value.

Fix these issues so we correctly ensure the TCS is done before
returning.

Link: https://patch.msgid.link/20260108-rpmh-regulator-fixes-v1-3-d1b5b300b665@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agosoc/qcom: rpmh: document rsc registers
Casey Connolly [Thu, 8 Jan 2026 20:28:44 +0000 (21:28 +0100)] 
soc/qcom: rpmh: document rsc registers

Add some comments explaining a few of the RSC registers

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260108-rpmh-regulator-fixes-v1-2-d1b5b300b665@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agosoc: qcom: rpmh-rsc: reclaim the TCS to avoid spurious irq in Linux
Neil Armstrong [Thu, 8 Jan 2026 20:28:43 +0000 (21:28 +0100)] 
soc: qcom: rpmh-rsc: reclaim the TCS to avoid spurious irq in Linux

If we don't reclaim and clear the IRQ bits, we might get a spurious
interrupt from this TCS in Linux:
WARNING: CPU: 0 PID: 0 at drivers/soc/qcom/rpmh-rsc.c:451 tcs_tx_done+0x98/0x270
...
 Call trace:
  tcs_tx_done+0x98/0x270 (P)
  __handle_irq_event_percpu+0x60/0x220
  handle_irq_event+0x54/0xc0
  handle_fasteoi_irq+0xa8/0x1c0
  handle_irq_desc+0x3c/0x68
  generic_handle_domain_irq+0x24/0x40
  gic_handle_irq+0x5c/0xd0
  ...

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260108-rpmh-regulator-fixes-v1-1-d1b5b300b665@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agoi2c: geni: bail when clocks can't be enabled
Casey Connolly [Thu, 8 Jan 2026 19:52:55 +0000 (20:52 +0100)] 
i2c: geni: bail when clocks can't be enabled

Failing to enable clocks will lead to bus hangs and the board crashing
in some cases, let's actually deal with this error and fail probe rather than hoping the clocks are already enabled.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260108195301.3159260-1-casey.connolly@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agoclk/qcom: sc7280: add more QUP clocks
Casey Connolly [Thu, 8 Jan 2026 19:49:55 +0000 (20:49 +0100)] 
clk/qcom: sc7280: add more QUP clocks

Add more clocks for UART2, i2c9 and a few others. This is enough to get
the rubikpi 3 working.

Link: https://patch.msgid.link/20260108195007.3156604-1-casey.connolly@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agoconfigs: Fix fastboot buffer address for QCS615 and QCM6490 boards
Balaji Selvanathan [Wed, 7 Jan 2026 09:50:38 +0000 (15:20 +0530)] 
configs: Fix fastboot buffer address for QCS615 and QCM6490 boards

The default value of CONFIG_FASTBOOT_BUF_ADDR is 0, which causes
NULL pointer dereference during fastboot commands when users dont
provide "-l" option in fastboot usb command.

Set it to safe and sufficiently large region in RAM
of the QCS615 and QCM6490 boards, to prevent crashes.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20260107095038.2491697-1-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agospmi: msm: refine handling of multiple APID mappings
Aswin Murugan [Wed, 7 Jan 2026 15:35:04 +0000 (21:05 +0530)] 
spmi: msm: refine handling of multiple APID mappings

PMIC Arbiter may expose multiple owned and non-owned APIDs per SID/PID.
- Keep current mapping if it is OWNED and a NON-OWNED appears.
- Always update when a NEW OWNED APID appears (make writable).
- If current is NON-OWNED and a new NON-OWNED appears, update to it
  (remain read-only).

This avoids write-access violations when not using the newly discovered
owned channels.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Link: https://patch.msgid.link/20260107153504.550450-1-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agomach-snapdragon: of_fixup: support new flat dwc3 node
Casey Connolly [Wed, 14 Jan 2026 13:57:32 +0000 (14:57 +0100)] 
mach-snapdragon: of_fixup: support new flat dwc3 node

Qualcomm DTs are being updated to use a new format where the dwc3 glue
node and controller are combined into a single DT node. Update the fixup
code to handle this case.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260114135739.1546815-1-casey.connolly@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agommc: msm_sdhci: Add DLL control hook to disable DLL below 100 MHz
Sumit Garg [Wed, 10 Dec 2025 15:54:54 +0000 (16:54 +0100)] 
mmc: msm_sdhci: Add DLL control hook to disable DLL below 100 MHz

Introduce an SDHCI ops hook (config_dll) for MSM SDHCI and implement a
minimal DLL control routine that ensures the core DLL is disabled when
the bus clock is at or below 100 MHz. This approach mirrors the Linux
MSM SDHCI driver.

Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Link: https://patch.msgid.link/20251210155454.1561611-3-loic.poulain@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agoclk/qcom: qcm2290: Add SDCC1 apps clock frequency table
Loic Poulain [Wed, 10 Dec 2025 15:54:53 +0000 (16:54 +0100)] 
clk/qcom: qcm2290: Add SDCC1 apps clock frequency table

Add support for configuring the SDCC1 apps clock on QCM2290 by introducing
a frequency table and enabling dynamic rate setting. Previously, the clock
was assumed to be fixed at 384 MHz by firmware, which limited flexibility
and correctness when selecting optimal rates for SD/MMC operations.

Suggested-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20251210155454.1561611-2-loic.poulain@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agommc: msm_sdhci: Fix incorrect divider calculation for SDCLK
Loic Poulain [Wed, 10 Dec 2025 15:54:52 +0000 (16:54 +0100)] 
mmc: msm_sdhci: Fix incorrect divider calculation for SDCLK

When 'max-clk' is not specified, the SDHCI core retrieves the base clock
from the SDHCI_CAPABILITIES register (bits [15:8]). However, this field
is unreliable on MSM SDHCI controllers, as noted by the Linux driver
using the SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN flag. In addition, the field
is only 8 bits wide and cannot represent base clocks above 255 MHz.

On platforms like Agatti/QCM2290, the firmware sets the SDHCI clock to
384 MHz, but the capabilities register reports 200 MHz. As a result,
the core calculates a divider of 4, producing a 96 MHz SDCLK instead of
the intended ~52 MHz. This overclocking can cause sporadic CRC errors
with certain eMMC.

To fix this, use the actual clock rate reported by the SDHCI core clock
instead of relying on the capabilities register for divider calculation.

Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20251210155454.1561611-1-loic.poulain@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agophy: Add MSM8996 support to Qualcomm QUSB2 phy
Biswapriyo Nath [Sun, 7 Dec 2025 18:49:19 +0000 (18:49 +0000)] 
phy: Add MSM8996 support to Qualcomm QUSB2 phy

This change is imported from Linux driver and tested with SM6125 SoC.
Note, the msm8996_phy_cfg struct is same as sdm660_phy_cfg but
qusb2_phy_cfg::se_clk_scheme_default differs only.

Signed-off-by: Biswapriyo Nath <nathbappai@gmail.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20251207184919.12202-1-nathbappai@gmail.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agoconfigs: qcom_qcs615: Correct debug UART clock frequency
Balaji Selvanathan [Wed, 19 Nov 2025 15:23:12 +0000 (20:53 +0530)] 
configs: qcom_qcs615: Correct debug UART clock frequency

Adjust the debug UART clock frequency from 14745600 Hz to 7372800 Hz
for the QCS615 platform. This correction ensures proper UART
communication timing and resolves baud rate miscalculations
that affects early boot console output.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20251119152312.4175482-1-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agophy: qcom: snps-femto-v2: assert reset in probe
Casey Connolly [Fri, 14 Nov 2025 14:47:21 +0000 (15:47 +0100)] 
phy: qcom: snps-femto-v2: assert reset in probe

The power on function for the phy only deasserts the reset, so the phy
might be in a weird state that we don't clean up properly.

Assert the reset in probe() so that when we power on we will have the
phy in a clean state.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251114144722.173021-2-casey.connolly@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agodragonboard820c: Stop disabling device tree relocation
Tom Rini [Wed, 19 Nov 2025 14:55:23 +0000 (08:55 -0600)] 
dragonboard820c: Stop disabling device tree relocation

Remove setting of fdt_high to ~0, which disables device tree relocation,
from the default environment. Doing so prevents U-Boot from correcting
problems such as having an unaligned device tree and leads to various
failure modes in the OS.

Signed-off-by: Tom Rini <trini@konsulko.com>
Link: https://patch.msgid.link/20251119145523.843230-1-trini@konsulko.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agosmem: msm: Fix memory-region lookup, direct <reg> mapping and update SMEM host count
Aswin Murugan [Wed, 12 Nov 2025 16:58:51 +0000 (22:28 +0530)] 
smem: msm: Fix memory-region lookup, direct <reg> mapping and update SMEM host count

The SMEM driver was failing to resolve memory regions on some boards
because `dev_of_offset()` + `fdtdec_lookup_phandle()` did not yield a
valid DT node. Modernize the code to use driver-model/ofnode accessors
and make the probe robust for both DT styles (direct `reg` vs
`memory-region` phandle).

- qcom_smem_map_memory():
  * Drop fdtdec path; use dev_read_phandle_with_args() +
    ofnode_read_resource().
  * Use dev_read_phandle_with_args() +
    fnode_read_resource().

- qcom_smem_probe():
  * Try dev_read_addr_size() first (map via <reg>), else fall back to
    qcom_smem_map_memory() with "memory-region".
  * Check "qcom,rpm-msg-ram" presence to add second region.

- Additionally, SMEM_HOST_COUNT is increased to support newer SMEM
  versions that include more remote processors. This avoids failures
  during processor ID checks.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20251112165851.1561418-1-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agoqcom_defconfig: Remove redundant pinctrl driver selections
Aswin Murugan [Wed, 7 Jan 2026 15:47:45 +0000 (21:17 +0530)] 
qcom_defconfig: Remove redundant pinctrl driver selections

Enable PINCTRL_QCOM_GENERIC config
The pinctrl drivers are now automatically enabled via Kconfig
defaults based on PINCTRL_QCOM_GENERIC, so explicit selection in the
defconfig is no longer needed.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20260107154745.571319-3-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agopinctrl: qcom: add PINCTRL_QCOM_GENERIC to enable all drivers by default
Aswin Murugan [Wed, 7 Jan 2026 15:47:44 +0000 (21:17 +0530)] 
pinctrl: qcom: add PINCTRL_QCOM_GENERIC to enable all drivers by default

Introduce a new Kconfig option PINCTRL_QCOM_GENERIC that, when selected,
enables all Qualcomm pinctrl drivers by default. This simplifies defconfigs
for platforms supporting multiple SoCs and avoids manual driver selection.
Individual drivers can still be disabled if required.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20260107154745.571319-2-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agopinctrl: qcom: add driver for QCS615 SoC
Aswin Murugan [Wed, 12 Nov 2025 16:47:57 +0000 (22:17 +0530)] 
pinctrl: qcom: add driver for QCS615 SoC

Add pinctrl driver for QCS615. Driver code is based on the
similar U-Boot and Linux drivers.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251112164758.1560041-2-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agoregulator: qcom-rpmh-regulator: add support for PM8150 PM8350 PM7325
Aswin Murugan [Wed, 12 Nov 2025 16:42:04 +0000 (22:12 +0530)] 
regulator: qcom-rpmh-regulator: add support for PM8150 PM8350 PM7325

Add the PM8150, PM8350, and PM7325 regulator data found on Qualcomm
platforms. These regulator tables are imported from the Linux driver
to enable support for these PMICs in U-Boot.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251112164204.1557934-1-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agomach-snapdragon: capsule_update: Fix eMMC detection for non-UFS devices
Alexey Minnekhanov [Fri, 7 Nov 2025 23:29:35 +0000 (02:29 +0300)] 
mach-snapdragon: capsule_update: Fix eMMC detection for non-UFS devices

Currently (since 2026.01-rc) on all SDM630/660 based devices this is
printed, after observing long boot delay (several seconds) before
executing preboot commands:

 QCOM-FMP: Failed to find boot partition

find_target_partition() function incorrectly assumes that eMMC is always
at number 0. In general you can't rely on device numbering to determine if
particular block device is eMMC or SD-card, because it depends on how
aliases are defined in device tree "chosen" node. Some SoCs have MMC
numbers starting at 1, not 0; so mmc1 is eMMC, mmc2 is SD-card.

Make eMMC detection reliable by using IS_SD() macro from mmc.h header.
Using this method target boot partition can be found successfully.
With debug prints enabled, this is printed:

 QCOM-FMP: skipped SD-Card (devnum 2)
 QCOM-FMP: Capsule update target: boot (disk 1:60)
 QCOM-FMP: DFU string: 'mmc 0=u-boot.bin part 1 60'

Without debug prints nothing is printed, no error about failure to find
boot partition.

Fixes: fe80a5f80095 ("mach-snapdragon: CapsuleUpdate: support all boot methods")
Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20251107232935.283843-1-alexeymin@minlexx.ru
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agomach-snapdragon: enable MMU_PGPROT by default
Neil Armstrong [Thu, 6 Nov 2025 11:01:48 +0000 (12:01 +0100)] 
mach-snapdragon: enable MMU_PGPROT by default

Let's enable proper MMU page table protection to properly
protect write-protected and non-executable sections.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Link: https://patch.msgid.link/20251106-topic-snapdragron-en-pgprot-v1-1-d2b9e802230b@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agousb: gadget: Kconfig: Correct Qualcomm config name used
Balaji Selvanathan [Wed, 24 Dec 2025 04:47:47 +0000 (10:17 +0530)] 
usb: gadget: Kconfig: Correct Qualcomm config name used

Correct ARCH_QCOM to ARCH_SNAPDRAGON as ARCH_QCOM is outdated/unused
config. Using ARCH_QCOM was causing USB fastboot mode to fail.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Acked-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20251224044747.3898137-1-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agoconfigs: qcom_qcs9100: Fix fastboot buffer address for QCS9100 board
Balaji Selvanathan [Mon, 30 Jun 2025 07:00:40 +0000 (12:30 +0530)] 
configs: qcom_qcs9100: Fix fastboot buffer address for QCS9100 board

The default value of CONFIG_FASTBOOT_BUF_ADDR is 0, which causes
NULL pointer dereference during fastboot commands.

Set it to 0xdb300000, a safe and sufficiently large region in RAM
of the QCS9100 board, to prevent crashes and ensure reliable
fastboot functionality.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20250630070040.734486-3-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agoconfigs: Rename qcs9100_defconfig to qcom_qcs9100_defconfig
Balaji Selvanathan [Mon, 30 Jun 2025 07:00:39 +0000 (12:30 +0530)] 
configs: Rename qcs9100_defconfig to qcom_qcs9100_defconfig

To align with the naming convention used for Qualcomm platforms in
U-Boot, renamed the defconfig file from qcs9100_defconfig to
qcom_qcs9100_defconfig.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20250630070040.734486-2-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agousb: dwc3: qcom: Add delays in UTMI clock selection for Qscratch
Balaji Selvanathan [Fri, 27 Jun 2025 04:52:44 +0000 (10:22 +0530)] 
usb: dwc3: qcom: Add delays in UTMI clock selection for Qscratch

Added delays before and after setting the PIPE_UTMI_CLK_SEL and
PIPE3_PHYSTATUS_SW bits in the Qscratch GENERAL_CFG register
during UTMI clock selection for DWC3 on Qualcomm platforms.

These delays help ensure proper timing and stability of the UTMI
clock switching sequence, potentially avoiding race conditions or
unstable PHY behavior during initialization.

Tested on platforms using Qscratch-based DWC3 PHY configuration.

This change is taken from this Linux kernel implementation:
https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/usb/dwc3/dwc3-qcom.c?id=a4333c3a6ba9ca9cff50a3c1d1bf193dc5489e1c

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://patch.msgid.link/20250627045244.2225303-1-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agowatchdog: qcom: Add max timeout check to prevent overflow
Gopinath Sekar [Wed, 25 Jun 2025 09:46:07 +0000 (15:16 +0530)] 
watchdog: qcom: Add max timeout check to prevent overflow

Added a check to ensure the requested timeout does not exceed the
hardware's maximum supported value. This prevents register overflow
and ensures watchdog reliability.

So, added a check in qcom_wdt_start() to ensure the requested timeout
does not exceed the hardware-supported maximum value. If the requested
value exceeds the maximum value, then the timeout is clamped
at maximum value.

The timeout is first converted to watchdog ticks and then compared
against QCOM_WDT_MAX_TIMEOUT. This helps prevent misconfiguration
and potential watchdog misbehavior due to overflow.

QCOM_WDT_MAX_TIMEOUT is set to 0xFFFFF, as Qualcomm SoCs typically
use 20 bits to store bark/bite timeout values.

This work builds upon the previous submission:
https://lore.kernel.org/u-boot/20250527124926.128413-1-balaji.selvanathan@oss.qualcomm.com/

Signed-off-by: Gopinath Sekar <gopinath.sekar@oss.qualcomm.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Link: https://patch.msgid.link/20250625094607.1348494-1-gopinath.sekar@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
3 months agoRevert "doc: board: starfive: update jh7110 common description"
Tom Rini [Tue, 13 Jan 2026 20:18:05 +0000 (14:18 -0600)] 
Revert "doc: board: starfive: update jh7110 common description"

This patch is not as E Shattow authored it, but contains non-trivial
changes from Heinrich Schuchardt as well. The original author has
requested that this commit be reverted until the changes can be
committed showing which parts were authored by E Shattow and which by
Heinrich Schuchardt.

This reverts commit 4c105d2ae7b0f847668ff1ef6b410f63ab4290b7.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 months agopinctrl: mediatek: MT7981: fix GPIO9 register map
Shiji Yang [Sat, 3 Jan 2026 08:42:39 +0000 (16:42 +0800)] 
pinctrl: mediatek: MT7981: fix GPIO9 register map

Ported from the Mediatek SDK. The upstream Linux kernel also has the
same register map as the SDK.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
3 months agolib: crypt: remove dependency on autoboot
Tomas Paukrt [Sun, 4 Jan 2026 14:02:11 +0000 (15:02 +0100)] 
lib: crypt: remove dependency on autoboot

Make crypt_compare() accessible from board-specific code
by removing its dependency on the autoboot feature.

Signed-off-by: Tomas Paukrt <tomaspaukrt@email.cz>
Reviewed-by: Tom Rini <trini@konsulko.com>
3 months agomisc: Add fixed-layout support
Marek Vasut [Sat, 3 Jan 2026 00:17:31 +0000 (01:17 +0100)] 
misc: Add fixed-layout support

The "fixed-layout" nvmem controller subnode used to be optional wrapper
around nvmem controller cells subnodes. The "fixed-layout" node is now
mandatory in most cases, but in order to support both recent and legacy
DTs, both variants have to be supported.

Implement support for the "fixed-layout" node in the most trivial manner,
check whether the nvmem cell supernode is compatible with "fixed-layout"
and if it is, proceed one level above it to find the nvmem controller.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agopowerpc: mpc83xx: Check the size of peripheral structs
J. Neuschäfer [Thu, 1 Jan 2026 16:41:55 +0000 (17:41 +0100)] 
powerpc: mpc83xx: Check the size of peripheral structs

Peripheral registers on MPC83xx-series chips are declared in
immap_83xx.h as a set of structs that ultimately fill the entire MMIO
space of 1 MiB. This patch introduces a compile-time check of the size
of each peripheral struct. The purpose of these checks is two-fold:

1. To quickly tell readers of the code the total size of each struct
2. To verify that the size does not change when a struct is edited

If the size of a peripheral struct were to change by a few bytes due
to an editing error, the result would be mayhem for all following
peripherals, because all offsets would shift by the amount of the error.

All new checks have been compile-tested.

Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
3 months agogardena-smart-gateway-mt7688: Disable CMD_LICENSE
Tom Rini [Tue, 13 Jan 2026 01:32:11 +0000 (19:32 -0600)] 
gardena-smart-gateway-mt7688: Disable CMD_LICENSE

This platform is unfortunately frequently very close to the binary
size limit. Currently it is so close that generic bug fixes can trigger
build failure. Remove the license command from the image as that frees
up nearly 7KiB of space.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 months agoconfigs: am57xx_hs_evm_defconfig: Reserve EMIF memory used by PPA
Beleswar Padhi [Mon, 29 Dec 2025 05:11:13 +0000 (10:41 +0530)] 
configs: am57xx_hs_evm_defconfig: Reserve EMIF memory used by PPA

The AM571x SoC has 1 GB DDR space. As part of normal re-location process
U-Boot copies itself to the top of DDR bank. However, on HS devices, the
top 37 MB is used by PPA and is firewalled. This results in an exception
and the boot fails. Set CONFIG_SYS_MEM_TOP_HIDE to reserve the top 38 MB
memory (aligned to 2MB as per page size for ARM32) to fix the boot.

Note: This limitation does not exist for other AM57x devices, but this
config is applied in the common defconfig since adding a separate
defconfig only for AM571x is not justified. Losing 38MB of memory at the
bootloader stage on other devices is acceptable.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
3 months agoMerge patch series "a few test.py improvements"
Tom Rini [Mon, 12 Jan 2026 21:12:47 +0000 (15:12 -0600)] 
Merge patch series "a few test.py improvements"

David Lechner <dlechner@baylibre.com> says:

While trying to run the test suite for the first time, I encountered a
few minor issues. Here are a few patches to address them.

Link: https://lore.kernel.org/r/20260105-a-few-test-py-improvements-v3-0-fea38243ca5b@baylibre.com
3 months agopylibfdt: add requirements.txt for setuptools
David Lechner [Mon, 5 Jan 2026 16:49:15 +0000 (10:49 -0600)] 
pylibfdt: add requirements.txt for setuptools

Add a requirements.txt file to the pylibfdt script directory to specify
setuptools as a dependency. This follows the pattern of each tool in
U-Boot having its own requirements.txt file. The version is set to
78.1.1 to avoid conflict with the same in tools/patman/requirements.txt.

Reviewed-by: Simon Glass <simon.glass@canonical.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> # sandbox
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: David Lechner <dlechner@baylibre.com>
3 months agodoc: pytest: mention additional requirements for venv
David Lechner [Mon, 5 Jan 2026 16:49:14 +0000 (10:49 -0600)] 
doc: pytest: mention additional requirements for venv

Add a paragraph explaining that in addition to the requirements.txt
for test/py/test.py itself, users may need to install additional python
packages depending on the U-Boot configuration being built.

Reviewed-by: Simon Glass <simon.glass@canonical.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> # sandbox
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: David Lechner <dlechner@baylibre.com>
3 months agotest.py: check ubconfig exists before using it
David Lechner [Mon, 5 Jan 2026 16:49:13 +0000 (10:49 -0600)] 
test.py: check ubconfig exists before using it

Set ubconfig to None and add a check in the show_timings() function of
test/py/test.py to ensure that the global ubconfig variable was actually
initialized before access attributes.

If tests fail early, e.g. because --build failed, ubconfig may not have
been initialized yet and results in an exception in an atexit handler.
Adding this check avoids unnecessary noise in the output.

    Exception ignored in atexit callback: <function cleanup at 0x7de475ea6b60>
    Traceback (most recent call last):
    File "u-boot/test/py/conftest.py", line 669, in cleanup
        show_timings()
    File "u-boot/test/py/conftest.py", line 616, in show_timings
        if ubconfig.timing:
        ^^^^^^^^
    NameError: name 'ubconfig' is not defined

Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> # sandbox
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: David Lechner <dlechner@baylibre.com>