]> git.ipfire.org Git - thirdparty/u-boot.git/log
thirdparty/u-boot.git
5 months agogpio: qcom: Support GPIOs on PM7325 PMIC
Luca Weiss [Wed, 17 Sep 2025 12:52:22 +0000 (14:52 +0200)] 
gpio: qcom: Support GPIOs on PM7325 PMIC

The GPIOs on PM7325 work fine using the qcom_spmi_gpio driver and
enables the use of the Volume Up button Fairphone 5 smartphone.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250917-spmi-gpio-pm7325-v1-1-6b75c2c62d8b@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
5 months agoboard/qualcomm: add debug config fragment for SM6350
Luca Weiss [Wed, 17 Sep 2025 12:47:42 +0000 (14:47 +0200)] 
board/qualcomm: add debug config fragment for SM6350

Add a fragment similar to others to enable earlycon.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
5 months agoqcom_defconfig: Enable SM6350 clock and pinctrl drivers
Luca Weiss [Wed, 17 Sep 2025 12:47:41 +0000 (14:47 +0200)] 
qcom_defconfig: Enable SM6350 clock and pinctrl drivers

Enable the drivers so that SM6350 devices can boot with qcom_defconfig.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
5 months agogpio: qcom: Support GPIOs on PM6350 PMIC
Luca Weiss [Wed, 17 Sep 2025 12:47:40 +0000 (14:47 +0200)] 
gpio: qcom: Support GPIOs on PM6350 PMIC

The GPIOs on PM6350 work fine using the qcom_spmi_gpio driver and
enables the use of the Volume Up button Fairphone 4 smartphone.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
5 months agoregulator: qcom-rpmh-regulator: add support for pm6150l regulators
Luca Weiss [Wed, 17 Sep 2025 12:47:39 +0000 (14:47 +0200)] 
regulator: qcom-rpmh-regulator: add support for pm6150l regulators

Add the pm6150l regulator data found on the Qualcomm SM6350 platform.
The tables are imported from the Linux driver. The SMPS regulators were
not added now.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
5 months agophy: qcom: Add SM6350 to QMP UFS PHY driver
Luca Weiss [Wed, 17 Sep 2025 12:47:38 +0000 (14:47 +0200)] 
phy: qcom: Add SM6350 to QMP UFS PHY driver

The UFS on SM6350 can reuse the SDM845 configuration, just like in
Linux.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
5 months agoiommu: qcom-smmu: Add qcom,sm6350-smmu-500 compatible
Luca Weiss [Wed, 17 Sep 2025 12:47:37 +0000 (14:47 +0200)] 
iommu: qcom-smmu: Add qcom,sm6350-smmu-500 compatible

This SoC doesn't have the generic compatible.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
5 months agodrivers: pinctrl: Add Qualcomm SM6350 TLMM driver
Luca Weiss [Wed, 17 Sep 2025 12:47:36 +0000 (14:47 +0200)] 
drivers: pinctrl: Add Qualcomm SM6350 TLMM driver

Add support for TLMM pin controller block (Top Level Mode Multiplexer)
on SM6350 SoC, with support for special pins.

Correct pin configuration is required for working debug UART and eMMC/SD
cards.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
5 months agoclk/stub: add sm6350-rpmh clock
Luca Weiss [Wed, 17 Sep 2025 12:47:35 +0000 (14:47 +0200)] 
clk/stub: add sm6350-rpmh clock

Stub the RPMh clock controller on SM6350.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
5 months agoclk/qcom: Add SM6350 clock driver
Luca Weiss [Wed, 17 Sep 2025 12:47:34 +0000 (14:47 +0200)] 
clk/qcom: Add SM6350 clock driver

Add Clock driver for the GCC block found in the SM6350 SoC.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
5 months agoqcom_defconfig: enable watchdog command
Paul Sajna [Wed, 24 Sep 2025 02:05:19 +0000 (19:05 -0700)] 
qcom_defconfig: enable watchdog command

CONFIG_WDT and CONFIG_WDT_QCOM were previously added in
https://source.denx.de/u-boot/u-boot/-/commit/530764de9fc8539cd2354501e9c42804bc4c4dac

U-Boot and Linux pet the watchdog by default,
but it's helpful to also have the command to control the watchdog,
(CONFIG_CMD_WDT)
so it can be manually disabled by the user, for example, if the kernel
is expected to stall during debugging with kgdb.

Signed-off-by: Paul Sajna <sajattack@postmarketos.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250923-qcom_config_enable_cmd_wdt-v1-1-70cccf9f01e3@postmarketos.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
5 months agoboard/qualcomm: add debug config fragment for MSM8953
Luca Weiss [Wed, 24 Sep 2025 11:30:11 +0000 (13:30 +0200)] 
board/qualcomm: add debug config fragment for MSM8953

Add a fragment similar to others to enable earlycon.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-5-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
5 months agodoc: board/qualcomm: Clean up debug options for QUP UART
Luca Weiss [Wed, 24 Sep 2025 11:30:10 +0000 (13:30 +0200)] 
doc: board/qualcomm: Clean up debug options for QUP UART

CONFIG_BAUDRATE is not relevant for the QUP driver, and neither is
CONFIG_DEBUG_UART_SKIP_INIT so remove them from the doc.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-4-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
5 months agoserial: msm-geni: Update kconfig name for DEBUG_UART_MSM_GENI
Luca Weiss [Wed, 24 Sep 2025 11:30:09 +0000 (13:30 +0200)] 
serial: msm-geni: Update kconfig name for DEBUG_UART_MSM_GENI

The previous description "Qualcomm snapdragon" barely tells the user
anything, update the name so that it's clear which configs the user can
choose between, namely the older QUP driver, or the newer GENI driver.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-3-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
5 months agoclk/qcom: sm8250: Remove unused defines
Luca Weiss [Wed, 24 Sep 2025 11:30:08 +0000 (13:30 +0200)] 
clk/qcom: sm8250: Remove unused defines

Clean up some defines which are not used in the driver.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-2-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
5 months agopinctrl: qcom: sc7280: Fix offset of UFS_RESET
Luca Weiss [Wed, 24 Sep 2025 11:30:07 +0000 (13:30 +0200)] 
pinctrl: qcom: sc7280: Fix offset of UFS_RESET

There's no WEST, SOUTH or NORTH in sc7280 pinctrl. Fix the offset of the
ufs_reset pin.

Fixes: 51ec7fdb64b ("pinctrl: qcom: add sc7280 pinctrl driver")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-1-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
5 months agogpio: qcom_spmi: add pm660l
David Wronek [Fri, 3 Oct 2025 10:01:13 +0000 (12:01 +0200)] 
gpio: qcom_spmi: add pm660l

This is used for the volume keys on some SDM670 devices.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-5-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
5 months agoqcom_defconfig: enable pinctrl for sdm670
David Wronek [Fri, 3 Oct 2025 10:01:12 +0000 (12:01 +0200)] 
qcom_defconfig: enable pinctrl for sdm670

Enable the SDM670 pinctrl driver.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-4-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
5 months agopinctrl: qcom: add sdm670 pinctrl driver
David Wronek [Fri, 3 Oct 2025 10:01:11 +0000 (12:01 +0200)] 
pinctrl: qcom: add sdm670 pinctrl driver

Add a pinctrl driver for the TLMM block found in the SDM670 SoC.

Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-3-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
5 months agoclk/qcom: sdm845: add support for sdm670
David Wronek [Fri, 3 Oct 2025 10:01:10 +0000 (12:01 +0200)] 
clk/qcom: sdm845: add support for sdm670

The global clock controller on SDM670 is similar to SDM845, so let's add
support here.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-2-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
5 months agoclk/stub: add sdm670 rpmh clock
David Wronek [Fri, 3 Oct 2025 10:01:09 +0000 (12:01 +0200)] 
clk/stub: add sdm670 rpmh clock

Necessary for MMC to successfully probe all clocks.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-1-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
5 months agophy: qcom: Rework Kconfig logic around MSM8916_USB_PHY
Tom Rini [Fri, 3 Oct 2025 20:39:27 +0000 (14:39 -0600)] 
phy: qcom: Rework Kconfig logic around MSM8916_USB_PHY

This PHY driver is required by USB_EHCI_MSM and not useful on its own.
Rather than have it be a prompted option, it should (and currently is)
select'd by USB_EHCI_MSM. Remove the prompt for this option and then
correct the dependency chain (it must select PHY).

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20251003203927.1030052-1-trini@konsulko.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
5 months agogpio: qcom: qcom_spmi_gpio: add compatible for pm6150l
Jens Reidel [Sun, 5 Oct 2025 15:44:43 +0000 (17:44 +0200)] 
gpio: qcom: qcom_spmi_gpio: add compatible for pm6150l

Add support for the GPIOs in the PM6150L to the new driver.

Signed-off-by: Jens Reidel <adrian@mainlining.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20251005154443.71477-1-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
5 months agoqcom_defconfig: Enable meminfo command with mapping
Abbarapu Venkatesh Yadav [Fri, 10 Oct 2025 05:12:00 +0000 (10:42 +0530)] 
qcom_defconfig: Enable meminfo command with mapping

Enable meminfo command to be able to see where things are mapped.

Signed-off-by: Abbarapu Venkatesh Yadav <venkyada@qti.qualcomm.com>
Link: https://lore.kernel.org/r/20251010051200.2313081-1-venkyada@qti.qualcomm.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
5 months agoMerge branch 'master' of git://source.denx.de/u-boot-usb
Tom Rini [Wed, 29 Oct 2025 01:43:19 +0000 (19:43 -0600)] 
Merge branch 'master' of git://source.denx.de/u-boot-usb

- Fix assorted issues found by Smatch

5 months agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Wed, 29 Oct 2025 01:43:02 +0000 (19:43 -0600)] 
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh

5 months agoMAINTAINERS: update my email address
Raymond Mao [Tue, 28 Oct 2025 20:26:17 +0000 (13:26 -0700)] 
MAINTAINERS: update my email address

Update my email address in the maintainers list.

Signed-off-by: Raymond Mao <raymondmaoca@gmail.com>
5 months agoRevert "clk: Return value calculated by ERR_PTR"
Tom Rini [Tue, 28 Oct 2025 19:24:44 +0000 (13:24 -0600)] 
Revert "clk: Return value calculated by ERR_PTR"

This reverts commit 644b4650ee57c429bede77f44752cc867dac0e00.

While the intention of the above commit is correct, it leads to test
failures in CI that need to be addressed at the same time.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agospi: altera_spi: Add missing <time.h> to altera_spi.c
Tom Rini [Mon, 4 Aug 2025 21:57:18 +0000 (15:57 -0600)] 
spi: altera_spi: Add missing <time.h> to altera_spi.c

This driver references the get_timer macro while relying on an
indirection inclusion of <time.h>. Add the missing include directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agospi: Tighten some spi driver dependencies
Tom Rini [Mon, 4 Aug 2025 21:57:17 +0000 (15:57 -0600)] 
spi: Tighten some spi driver dependencies

A few spi drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agoclk: Tighten some clock driver dependencies
Tom Rini [Fri, 18 Jul 2025 01:14:18 +0000 (19:14 -0600)] 
clk: Tighten some clock driver dependencies

A few clock drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agox86: Rename arch/x86/include/asm/pnp_def.h to include/pnp_def.h
Tom Rini [Fri, 11 Jul 2025 15:20:19 +0000 (09:20 -0600)] 
x86: Rename arch/x86/include/asm/pnp_def.h to include/pnp_def.h

There is nothing x86-centric in this include file, and moving it will
allow for some drivers to be compile-tested on sandbox.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agomtd: nvmxip: Make use of LBAF for printing lbaint_t
Tom Rini [Fri, 11 Jul 2025 15:16:01 +0000 (09:16 -0600)] 
mtd: nvmxip: Make use of LBAF for printing lbaint_t

When printing the contents of an lbaint_t variable we need to use LBAF
to print it in order to get the correct format type depending on 32 or
64bit-ness.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agomtd: spi: sf_dataflash.c: Make use of 'z' for printing size_t
Tom Rini [Fri, 11 Jul 2025 15:15:57 +0000 (09:15 -0600)] 
mtd: spi: sf_dataflash.c: Make use of 'z' for printing size_t

When printing the contents of an size_t variable we need to use z prefix
to the format character in order to get the correct format type
depending on 32 or 64bit-ness.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agomtd: Correct dependency on SYS_FLASH_CHECKSUM
Tom Rini [Fri, 4 Jul 2025 21:45:56 +0000 (15:45 -0600)] 
mtd: Correct dependency on SYS_FLASH_CHECKSUM

This feature requires that CFG_SYS_FLASH_BASE is defined and this in
turn is only done in the case of FLASH_CFI_DRIVER && !CFI_FLASH or in
other words, when DM_MTD is not enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agomtd: Add function prototype for mtd_read_oob_bf(...)
Tom Rini [Wed, 2 Jul 2025 01:06:09 +0000 (19:06 -0600)] 
mtd: Add function prototype for mtd_read_oob_bf(...)

The function mtd_read_oob_bf is called by cmd/nand.c but does not have a
prototype in any header. Add this to include/linux/mtd/mtd.h as that is
the most logical place currently.

Fixes: 1fac57720719 ("nand: Add a watch command")
Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agoclk: Add missing <dm/device.h> to include/clk.h
Tom Rini [Wed, 2 Jul 2025 01:05:33 +0000 (19:05 -0600)] 
clk: Add missing <dm/device.h> to include/clk.h

In this header we make direct references to some dm/device.h functions
while not including the header directly. Add the missing include.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agomtd: nand: Prevent dereference of NULL pointer
Andrew Goodbody [Tue, 1 Jul 2025 16:12:44 +0000 (17:12 +0100)] 
mtd: nand: Prevent dereference of NULL pointer

In nand_wait_ready there is a loop that includes a NULL check for
chip->dev_ready before it is dereferenced. Use a NULL check once the
loop is exited as well to cover the case where it exits due to a timeout
and it is therefore not known if chip->dev_ready is NULL or not.

This issue found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
5 months agocmd: mtd: Prevent use of uninitialised variable
Andrew Goodbody [Thu, 26 Jun 2025 10:49:32 +0000 (11:49 +0100)] 
cmd: mtd: Prevent use of uninitialised variable

ret maybe used uninitialised in some cases so instead
initialise it first to prevent this.

This issue was found by Smatch.

Fixes: 9671243e8d10 (cmd: mtd: Use the subcmd infrastructure to declare mtd sub-commands)
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
5 months agoARM: renesas: Drop 'imply MULTI_DTB_FIT_USER_DEFINED_AREA' lines
Tom Rini [Sat, 15 Mar 2025 01:29:11 +0000 (19:29 -0600)] 
ARM: renesas: Drop 'imply MULTI_DTB_FIT_USER_DEFINED_AREA' lines

As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. This is why for all of the boards
which had an 'imply MULTI_DTB_FIT_USER_DEFINED_AREA' they then also had
to set the option in the defconfig. Drop the imply lines here.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agoufs: Add UFS driver for Renesas R-Car X5H
Tuyen Dang [Tue, 28 Oct 2025 14:22:27 +0000 (15:22 +0100)] 
ufs: Add UFS driver for Renesas R-Car X5H

Add UFS driver for UFS controller present on Renesas R-Car X5H R8A78000.
The controller uses different initialization code compared to previous
generation UFS controller present in Renesas R-Car S4 R8A779F0, and the
majority of the driver is the initialization, hence a new driver.

[Marek: Clean driver up, add SCMI reset handling, use read_poll_timeout(),
        pass error values out of ufs_renesas_pre_init(), change the
compatible string to "renesas,r8a78000-ufs" to align with
previous generation "renesas,r8a779f0-ufs"]

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Tuyen Dang <tuyen.dang.xa@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251028142335.18125-7-marek.vasut+renesas@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agoufs: renesas: Update Kconfig entry help text
Marek Vasut [Tue, 28 Oct 2025 14:22:26 +0000 (15:22 +0100)] 
ufs: renesas: Update Kconfig entry help text

The current Renesas UFS driver contains initialization code
that is specific to R-Car S4 R8A779F0. The upcoming R-Car X5H
initialization code is different and contained in a separate
driver. Update the Kconfig entry help text for the current
driver to help discern it from the X5H driver. No functional
change.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20251028142335.18125-6-marek.vasut+renesas@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agoufs: Call ufs_scsi_bind() from uclass .post_bind
Marek Vasut [Tue, 28 Oct 2025 14:22:25 +0000 (15:22 +0100)] 
ufs: Call ufs_scsi_bind() from uclass .post_bind

Instead of duplicating the ufs_scsi_bind() call in every driver,
call it from UFS uclass .post_bind callback for every driver in
one place. While doing so, inline ufs_scsi_bind() directly into
ufs_post_bind() as trivial device_bind_driver() call.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20251028142335.18125-5-marek.vasut+renesas@mailbox.org
[narmstrong: also updated the rockchip and mediatek drivers]
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agospi: spi-uclass: Use unwind goto
Andrew Goodbody [Mon, 6 Oct 2025 15:09:25 +0000 (16:09 +0100)] 
spi: spi-uclass: Use unwind goto

In _spi_get_bus_and_cs the check for stacked parallel support needing
multiple chip select support does a direct return on error. Instead it
should set the error code in ret and then use the unwind goto.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
5 months agospi: fspi: Logical or used instead of logical and
Andrew Goodbody [Tue, 12 Aug 2025 16:42:59 +0000 (17:42 +0100)] 
spi: fspi: Logical or used instead of logical and

In erratum_err050568 the test for apllicability uses logical or to check
multiple chip IDs but this means the test will always evaluate to true
as at least 1 term will always be true. Logical and should have been
used so that the expression evaluates to true if all terms are true
which would mean that no chip ID of interest was in use.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
5 months agospi: npcm-fiu: Remove repeated test
Andrew Goodbody [Tue, 12 Aug 2025 16:29:07 +0000 (17:29 +0100)] 
spi: npcm-fiu: Remove repeated test

In npcm_fiu_uma_operation to enter a code block nbytes must be non-zero.
So testing for nbytes inside the code block is redundant and can be
removed.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
5 months agospi: ich: Do not use uninitialised value
Andrew Goodbody [Tue, 12 Aug 2025 13:31:16 +0000 (14:31 +0100)] 
spi: ich: Do not use uninitialised value

In ich_spi_exec_op_swseq the variable with_address is only assigned a
value in the case of op->addr.nbytes being non-zero.
Initialise with_address to zero. so that it is always valid.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
5 months agoMerge patch series "spi: cadence_qspi: Fix Smatch reported issues"
Tom Rini [Tue, 28 Oct 2025 16:32:26 +0000 (10:32 -0600)] 
Merge patch series "spi: cadence_qspi: Fix Smatch reported issues"

Andrew Goodbody <andrew.goodbody@linaro.org> says:

Smatch reported issues with an off by 1 error in a test for a timeout
and also an error exit that did not set an error code.

Link: https://lore.kernel.org/r/20250812-cadence_qspi-v1-0-0d693d810145@linaro.org
5 months agoclk: Return value calculated by ERR_PTR
Andrew Goodbody [Thu, 3 Jul 2025 14:40:46 +0000 (15:40 +0100)] 
clk: Return value calculated by ERR_PTR

In clk_set_default_get_by_id ret is passed to ERR_PTR but nothing is
done with the value that this calculates which is obviously not the
intention of the code. This is confirmed by the code around where this
function is called.
Instead return the value from ERR_PTR.

This issue found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
5 months agoMerge patch series "clk: versaclock: Fix two issues found by Smatch"
Tom Rini [Tue, 28 Oct 2025 15:59:55 +0000 (09:59 -0600)] 
Merge patch series "clk: versaclock: Fix two issues found by Smatch"

Andrew Goodbody <andrew.goodbody@linaro.org> says:

Should return value calculated by ERR_PTR as calling code attempts to
check for it.
Also do not dereference a pointer that could be an error pointer before
checking it with IS_ERR.

Link: https://lore.kernel.org/r/20250723-clk_versaclock-v1-0-9d70f2530871@linaro.org
5 months agommc: owl_mmc: Do not dereference data before NULL check
Andrew Goodbody [Thu, 31 Jul 2025 11:11:47 +0000 (12:11 +0100)] 
mmc: owl_mmc: Do not dereference data before NULL check

In owl_mmc_prepare_data there is a NULL check for the pointer data but
it happens after data has already been dereferenced. Refactor the code
so that the NULL check happens before any code dereferences data.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
5 months agogpio: intel_gpio: Initialise or0 and or1
Andrew Goodbody [Fri, 25 Jul 2025 12:04:26 +0000 (13:04 +0100)] 
gpio: intel_gpio: Initialise or0 and or1

In intel_gpio_set_flags the two variables or0 and or1 may be used
uninitialised. Correct this by setting initial values in the
declaration.
Also there is no need to use '|=' when the initial value is 0 and there
is only one assignment performed to each variable so just use '='
instead.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
5 months agoufs: amd-versal2: Fix indent
Marek Vasut [Tue, 28 Oct 2025 14:22:24 +0000 (15:22 +0100)] 
ufs: amd-versal2: Fix indent

Fix indent, use tabs. No functional change.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20251028142335.18125-4-marek.vasut+renesas@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agoufs: core: Rename ufs.c to ufs-uclass.c
Marek Vasut [Tue, 28 Oct 2025 14:22:23 +0000 (15:22 +0100)] 
ufs: core: Rename ufs.c to ufs-uclass.c

Previous commit folded existing ufs-uclass.c into ufs.c ,
which produced a nice and reviewable change , but also broke
the UCLASS should be in *-uclass.c pattern. Fix it. Keep the
change separate from the previous one to make this reviewable.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20251028142335.18125-3-marek.vasut+renesas@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agoufs: core: Fold ufs-uclass into ufs
Marek Vasut [Tue, 28 Oct 2025 14:22:22 +0000 (15:22 +0100)] 
ufs: core: Fold ufs-uclass into ufs

Move the few lines of ufs-uclass.c into ufs.c and remove the
ufs-uclass.c . No functional change.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20251028142335.18125-2-marek.vasut+renesas@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agoufs: core: Keep Makefile and Kconfig list sorted
Marek Vasut [Tue, 28 Oct 2025 14:22:21 +0000 (15:22 +0100)] 
ufs: core: Keep Makefile and Kconfig list sorted

Sort the Makefile and Kconfig lists alphabetically. No functional change.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20251028142335.18125-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agospi: cadence_qspi: Do not return unset error code
Andrew Goodbody [Tue, 12 Aug 2025 11:34:39 +0000 (12:34 +0100)] 
spi: cadence_qspi: Do not return unset error code

In spi_calibration if the low range fails to calibrate then the code
attempted to return the variable err but this has not been set in this
case. Instead just return -EIO.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
5 months agospi: cadence_qspi: Off by 1 in test for timeout
Andrew Goodbody [Tue, 12 Aug 2025 11:34:38 +0000 (12:34 +0100)] 
spi: cadence_qspi: Off by 1 in test for timeout

In cadence_qspi_apb_exec_flash_cmd the test for a timeout uses a
post-decrement on the variable retry which will result in a value of -1
after the loop exit, or it would if the variable were signed.
To fix this make retry a signed variable and test its value for being
equal to -1.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
5 months agoMAINTAINERS: Add UFS to MediaTek section
Igor Belwon [Sat, 11 Oct 2025 19:10:07 +0000 (21:10 +0200)] 
MAINTAINERS: Add UFS to MediaTek section

Add the UFS driver files to the ARM MediaTek section in MAINTAINERS.
Add myself as its maintainer.

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://patch.msgid.link/20251011-mtk-ufs-uboot-v1-4-a05f991ee150@mentallysanemainliners.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agoufs: Add MediaTek UFS driver
Igor Belwon [Sat, 11 Oct 2025 19:10:06 +0000 (21:10 +0200)] 
ufs: Add MediaTek UFS driver

Add the UFS driver for MediaTek platforms.

Loosely based on the Linux driver, this UFS driver can successfully get a
link and R/W access to the UFS chip on the MediaTek MT6878 mobile SoC,
when U-Boot is running as lk, or as the kernel (Secure world access is
not tested)

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://patch.msgid.link/20251011-mtk-ufs-uboot-v1-3-a05f991ee150@mentallysanemainliners.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agoufs: unipro: Add PA_SCRAMBLING property
Igor Belwon [Sat, 11 Oct 2025 19:10:05 +0000 (21:10 +0200)] 
ufs: unipro: Add PA_SCRAMBLING property

This property is required for proper I/O access on the MediaTek MT6878
UFS controller, and is part of UniPro specifications.

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://patch.msgid.link/20251011-mtk-ufs-uboot-v1-2-a05f991ee150@mentallysanemainliners.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agoufs: rockchip: Add initial support
Shawn Lin [Mon, 20 Oct 2025 08:16:22 +0000 (16:16 +0800)] 
ufs: rockchip: Add initial support

This patch adds initial support for UFS controller on Rockchip
platforms.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://patch.msgid.link/1760948182-128561-2-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agoufs: core: Add ufshcd_dme_enable() and ufshcd_dme_reset()
Shawn Lin [Mon, 20 Oct 2025 08:16:21 +0000 (16:16 +0800)] 
ufs: core: Add ufshcd_dme_enable() and ufshcd_dme_reset()

In order for host drivers to use.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://patch.msgid.link/1760948182-128561-1-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agoufs: Add bRefClkFreq attribute setting
Jared McArthur [Fri, 10 Oct 2025 19:55:56 +0000 (14:55 -0500)] 
ufs: Add bRefClkFreq attribute setting

A UFS device needs its bRefClkFreq attribute set to the correct value
before switching to high speed. If bRefClkFreq is set to the wrong
value, all transactions after the power mode change will fail.

The bRefClkFreq depends on the host controller and the device.
Query the device's current bRefClkFreq and compare with the ref_clk
specified in the device-tree. If the two differ, set the bRefClkFreq
to the device-tree's ref_clk frequency.

Taken from Linux kernel v6.17 (drivers/ufs/core/ufshcd.c and
include/ufs/ufs.h) and ported to U-Boot.

Signed-off-by: Jared McArthur <j-mcarthur@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Link: https://patch.msgid.link/20251010195556.1772611-3-j-mcarthur@ti.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agoufs: Add support for sending UFS attribute requests
Jared McArthur [Fri, 10 Oct 2025 19:55:55 +0000 (14:55 -0500)] 
ufs: Add support for sending UFS attribute requests

Some UFS attributes must be set before a UFS device is initialized.
Add ufshcd_query_attr and ufshcd_query_attr_retry to send UFS
attribute requests.

Taken from Linux Kernel v6.17 (drivers/ufs/core/ufshcd.c) and ported
to U-Boot.

Signed-off-by: Jared McArthur <j-mcarthur@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Link: https://patch.msgid.link/20251010195556.1772611-2-j-mcarthur@ti.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agoufs: Fix wrong bitfield usage for Data Direction in Transfer Request
Kunihiko Hayashi [Fri, 10 Oct 2025 02:45:57 +0000 (11:45 +0900)] 
ufs: Fix wrong bitfield usage for Data Direction in Transfer Request

Commit d232d7fdbf6f ("ufs: core: sync ufshci.h with Linux v6.12") updated
the Data Direction values from bitmask values to simple enumerations.

Before:
    enum {
        UTP_NO_DATA_TRANSFER    = 0x00000000,
        UTP_HOST_TO_DEVICE      = 0x02000000,
        UTP_DEVICE_TO_HOST      = 0x04000000,
    };

Updated:
    enum utp_data_direction {
        UTP_NO_DATA_TRANSFER    = 0,
        UTP_HOST_TO_DEVICE      = 1,
        UTP_DEVICE_TO_HOST      = 2,
    };

However, the U-Boot code still uses these values directly without shifting,
and resulting in wrong bitfield placement in the Transfer Request
Descriptor.

This fixes the issue by applying the necessary shift to align the value.

Fixes: d232d7fdbf6f ("ufs: core: sync ufshci.h with Linux v6.12")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251010024557.673787-1-hayashi.kunihiko@socionext.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agoufs: ti-j721e: Correct error detection
Andrew Goodbody [Tue, 7 Oct 2025 11:42:12 +0000 (12:42 +0100)] 
ufs: ti-j721e: Correct error detection

In ti_j721e_ufs_probe there is a call to clk_get_rate but the code after
that attempts to detect an error from that call incorrectly uses
IS_ERR_VALUE.  Instead the test should just be for regular error codes.
The call returns an unsigned long so that needs to be cast to a signed type
first of all.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Anshul Dalal <anshuld@ti.com>
Link: https://patch.msgid.link/20251007-ufs_ti-v2-1-501f575b6947@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agoclk: versaclock: Use IS_ERR check before dereference
Andrew Goodbody [Wed, 23 Jul 2025 15:54:08 +0000 (16:54 +0100)] 
clk: versaclock: Use IS_ERR check before dereference

In versaclock_probe vc5->pin_xin may be an error pointer so need to
check with IS_ERR before attempting to dereference it.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
5 months agoclk: versaclock: return value calculated by ERR_PTR
Andrew Goodbody [Wed, 23 Jul 2025 15:54:07 +0000 (16:54 +0100)] 
clk: versaclock: return value calculated by ERR_PTR

In versaclock_get_name -ENOMEM is passed to ERR_PTR but nothing is
done with the value that this calculates which is obviously not the
intention of the code. This is confirmed by the code around where this
function is called.
Instead return the value from ERR_PTR.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
5 months agousb: musb-new: Cannot test unsigned member to be negative
Andrew Goodbody [Tue, 30 Sep 2025 15:52:24 +0000 (16:52 +0100)] 
usb: musb-new: Cannot test unsigned member to be negative

You cannot test an unsigned member of a struct for being negative, the
test will always fail. Instead assign the return value of
fdtdec_get_int, which returns an int, to a temporary variable declared
as an int, so that it can be tested for being negative before being
assigned to the unsigned struct member.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
5 months agousb: musb-new: Limit check array index before use
Andrew Goodbody [Tue, 30 Sep 2025 15:52:23 +0000 (16:52 +0100)] 
usb: musb-new: Limit check array index before use

epnum is used as an index into an array. The limit check for this index
should be performed before using it to access an element in the array to
prevent possible bounds overrun.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
5 months agousb: musb-new: Null check before dereference
Andrew Goodbody [Tue, 30 Sep 2025 15:52:22 +0000 (16:52 +0100)] 
usb: musb-new: Null check before dereference

A null check for the variable 'data' was introduced before dereferencing
it for set_phy_power but other uses were not so protected. Add the null
check for other dereferences of 'data'.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
5 months agousb: xhci: exynos: variable node should be signed
Andrew Goodbody [Tue, 30 Sep 2025 10:34:44 +0000 (11:34 +0100)] 
usb: xhci: exynos: variable node should be signed

The variable node is assigned to the return value of a function that
returns an int. It is tested for being negative and then passed as an
argument to a function that takes an int. So 'node' should not be
declared as unsigned. Correct it.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
5 months agousb: ulpi: Incorrect operator used
Andrew Goodbody [Tue, 30 Sep 2025 16:06:44 +0000 (17:06 +0100)] 
usb: ulpi: Incorrect operator used

Combining two bits into a mask to be used so that the same write code
can be used to set or reset bits in a register clearly needs to use the
binary 'or' operator, not the binary 'and'. Fix it.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
5 months agousb: ohci-hcd: Null check lurb_priv before dereference
Andrew Goodbody [Tue, 30 Sep 2025 09:56:02 +0000 (10:56 +0100)] 
usb: ohci-hcd: Null check lurb_priv before dereference

When a variable needs a null check before it is dreferenced ensure that
this is done even in the case of assignment on declaration. This was not
happening for lurb_priv so correct it.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
5 months agousb: fsl-dt-fixup: Return an error code on error
Andrew Goodbody [Thu, 25 Sep 2025 11:56:44 +0000 (12:56 +0100)] 
usb: fsl-dt-fixup: Return an error code on error

fsl_fdt_fixup_usb_erratum uses strcmp to detect an error but then
returns 'err' without it being set to an error. Calling code may not
detect that an error occurred leading to a silent failure. Instead just
return -EINVAL.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
5 months agousb: ehci: exynos: variable node should be signed
Andrew Goodbody [Mon, 29 Sep 2025 16:53:11 +0000 (17:53 +0100)] 
usb: ehci: exynos: variable node should be signed

THe variable node is assigned to the return value of a function that
returns an int. It is tested for being negative and then passed as an
argument to a function that takes an int. So 'node' should not be
declared as unsigned. Correct it.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
5 months agoboard: starfive: Add initial Milk-V Mars CM and Mars CM Lite user documentation
E Shattow [Tue, 21 Oct 2025 23:10:00 +0000 (16:10 -0700)] 
board: starfive: Add initial Milk-V Mars CM and Mars CM Lite user documentation

Add initial board docs for Milk-V Mars CM (eMMC) and Milk-V Mars CM Lite
(SD Card) to the visionfive2 board target.

Signed-off-by: E Shattow <e@freeshell.de>
5 months agoconfigs: starfive: Add Milk-V Mars CM and Mars CM Lite to visionfive2
E Shattow [Tue, 21 Oct 2025 23:09:59 +0000 (16:09 -0700)] 
configs: starfive: Add Milk-V Mars CM and Mars CM Lite to visionfive2

Add Milk-V Mars CM and Mars CM Lite to visionfive2.

These boards were previously supported and then removed in the transition
to OF_UPSTREAM. The dts have landed in the for-next queue so let's add the
boards again.

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
5 months agoboard: starfive: visionfive2: Add Milk-V Mars CM and Mars CM Lite selection by product_id
E Shattow [Tue, 21 Oct 2025 23:09:58 +0000 (16:09 -0700)] 
board: starfive: visionfive2: Add Milk-V Mars CM and Mars CM Lite selection by product_id

Add identifier for Milk-V Mars CM to dts selection callback in SPL, and
to fdtfile environment variable default value selection in payload.

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
5 months agoriscv: dts: starfive: prune redundant jh7110 overrides
E Shattow [Tue, 21 Oct 2025 20:54:00 +0000 (13:54 -0700)] 
riscv: dts: starfive: prune redundant jh7110 overrides

Prune overrides of upstream jh7110.dtsi now that the required nodes are
available through the devicetree-rebasing subtree.

Signed-off-by: E Shattow <e@freeshell.de>
5 months agoriscv: dts: starfive: add Milk-V Mars CM Lite system-on-module
E Shattow [Wed, 15 Oct 2025 10:22:53 +0000 (03:22 -0700)] 
riscv: dts: starfive: add Milk-V Mars CM Lite system-on-module

Milk-V Mars CM Lite is a System-on-Module based on the Milk-V Mars CM
without the onboard eMMC storage component populated and configured
instead for SD3.0 Card Slot on that interface via 100-pin connector.

Link to Milk-V Mars CM Lite schematics: https://github.com/milkv-mars/mars-files/tree/main/Mars-CM_Hardware_Schematices
Link to StarFive JH7110 Technical Reference Manual: https://doc-en.rvspace.org/JH7110/TRM/index.html
Link to Raspberry Pi CM4IO datasheet: https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf

Add the devicetree file to make use of StarFive JH7110 common supported
features PMIC, EEPROM, UART, I2C, GPIO, PCIe, QSPI Flash, PWM, and
Ethernet. Also configure the eMMC interface mmc0 for SD Card use and
configure the common SD Card interface mmc1 for onboard SDIO BT+WiFi.

Signed-off-by: E Shattow <e@freeshell.de>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
[ upstream commit: 4cce8b2503ab50f75a2dbc3eef2e55722836588e ]

(cherry picked from commit c7821d537e5a61e5d543588674b71fb43ec0665b)

5 months agodt-bindings: riscv: starfive: add milkv,marscm-lite
E Shattow [Wed, 15 Oct 2025 10:22:52 +0000 (03:22 -0700)] 
dt-bindings: riscv: starfive: add milkv,marscm-lite

Add "milkv,marscm-lite" as a StarFive JH7110 SoC-based system-on-module.

Signed-off-by: E Shattow <e@freeshell.de>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
[ upstream commit: 12a29108384cfe073a4de778d5207d53b492f85e ]

(cherry picked from commit ae7213970a0c80e90fac9ff0d2aa2966655983f5)

5 months agoriscv: dts: starfive: add Milk-V Mars CM system-on-module
E Shattow [Wed, 15 Oct 2025 10:22:51 +0000 (03:22 -0700)] 
riscv: dts: starfive: add Milk-V Mars CM system-on-module

Milk-V Mars CM is a System-on-Module based on the StarFive VisionFive 2
board and Radxa CM3 System-on-Module compatible with the Raspberry Pi
CM4IO Classic IO Board.

Mars CM SoM features:

- StarFive JH7110 System on Chip with RV64GC up to 1.5GHz
- AXP15060 Power Management Unit
- LPDDR4 2GB / 4GB / 8GB DRAM memory
- BL24C04F 4K bits (512 x 8) EEPROM
- GigaDevice 25LQ128EWIG QSPI NOR Flash 16M or SoC ROM UART loader for
  boot (selectable by GPIO)
- eMMC5.0 8GB / 16GB / 32GB flash storage onboard
- AP6256 via SDIO 2.0 onboard wireless connectivity WiFi 5 + Bluetooth
  5.2 (optional, present in models with WiFi feature)
- 1x Motorcomm YT8531C Gigabit Ethernet PHY
- IMG BXE-4-32 Integrated GPU with 3D Acceleration:
  - H.264 & H.265 4K@60fps Decoding
  - H.265 1080p@30fps Encoding
  - JPEG encoder / decoder

Additional features available via 2x 100-pin connectors for CM4IO Board:
- 1x HDMI 2.0
- 1x MIPI DSI (4-lanes)
- 1x 2CH Audio out (via GPIO)
- 1x MIPI CSI (2x2-lanes or 1x4-lanes)
- 1x USB 2.0
- 1x PCIe 1-lane Host, Gen 2 (5Gbps)
- Up to 28x GPIO, supporting 3.3V
- UART x6
- PWM x8
- I2C x7
- SPI
- I2S

Link to Milk-V Mars CM schematics: https://github.com/milkv-mars/mars-files/tree/main/Mars-CM_Hardware_Schematices
Link to StarFive JH7110 Technical Reference Manual: https://doc-en.rvspace.org/JH7110/TRM/index.html
Link to Raspberry Pi CM4IO datasheet: https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf

Add the devicetree file to make use of StarFive JH7110 common supported
features PMIC, EEPROM, UART, I2C, GPIO, eMMC, PCIe, QSPI Flash, PWM, and
Ethernet. Also configure the common SD Card interface mmc1 for onboard
SDIO BT+WiFi.

Signed-off-by: E Shattow <e@freeshell.de>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
[ upstream commit: 8d193bc0aa2e802be30de331317639482735d738 ]

(cherry picked from commit 8e935d097e975e6322b63fdc8ef9894c8582bef0)

5 months agodt-bindings: riscv: starfive: add milkv,marscm-emmc
E Shattow [Wed, 15 Oct 2025 10:22:50 +0000 (03:22 -0700)] 
dt-bindings: riscv: starfive: add milkv,marscm-emmc

Add "milkv,marscm-emmc" as a StarFive JH7110 SoC-based system-on-module.

Signed-off-by: E Shattow <e@freeshell.de>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
[ upstream commit: d1829e0b2f0619c39b0ce0b84fcbf67569108376 ]

(cherry picked from commit 4df5d2ff67fa10ad1ba5760dedf1b3cbc2037739)

5 months agoriscv: dts: starfive: add common board dtsi for Milk-V Mars CM variants
E Shattow [Wed, 15 Oct 2025 10:22:49 +0000 (03:22 -0700)] 
riscv: dts: starfive: add common board dtsi for Milk-V Mars CM variants

Add a common board dtsi for use by Milk-V Mars CM and Milk-V Mars CM Lite.

Signed-off-by: E Shattow <e@freeshell.de>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
[ upstream commit: 651b30c58775e334c79aa3ecd44a3d98ac201db2 ]

(cherry picked from commit 034af14dcd1e6dbfa4f41a340b6d92b054604858)

5 months agoriscv: dts: starfive: jh7110-common: drop mmc post-power-on-delay-ms
E Shattow [Wed, 15 Oct 2025 10:22:48 +0000 (03:22 -0700)] 
riscv: dts: starfive: jh7110-common: drop mmc post-power-on-delay-ms

Drop post-power-on-delay-ms from mmc0 mmc1 interfaces. There is no
known reason for these properties to continue, testing appears to be fine
without them [1].

1: https://lore.kernel.org/lkml/NT0PR01MB1312E0D9EE9F158A57B77700E63D2@NT0PR01MB1312.CHNPR01.prod.partner.outlook.cn/

Signed-off-by: E Shattow <e@freeshell.de>
Tested-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
[ upstream commit: b5a861a438d1a456952665cf6167969f01209479 ]

(cherry picked from commit 9c18e97b9be437c97789c9687148f3dd3f25b809)

5 months agoriscv: dts: starfive: jh7110-common: drop no-mmc property from mmc1
E Shattow [Wed, 15 Oct 2025 10:22:47 +0000 (03:22 -0700)] 
riscv: dts: starfive: jh7110-common: drop no-mmc property from mmc1

Relax no-mmc restriction on mmc1 for jh7110 boards. The restriction is
only needed to block use of commands that would cause a device to
malfunction, which by testing and observation [1] is not any problem.

1: https://lore.kernel.org/lkml/NT0PR01MB1312E0D9EE9F158A57B77700E63D2@NT0PR01MB1312.CHNPR01.prod.partner.outlook.cn/

Signed-off-by: E Shattow <e@freeshell.de>
Tested-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
[ upstream commit: 08128670a931a4117f7b93c703d0186c67c9e1e2 ]

(cherry picked from commit cd5d4277d9515be5c10752fd8140f03c3dfec541)

5 months agoriscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader
E Shattow [Wed, 15 Oct 2025 10:22:46 +0000 (03:22 -0700)] 
riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader

Add bootph-pre-ram hinting to jh7110.dtsi:
  - CPU interrupt controller(s)
  - gmac1_rgmii_rxin fixed-clock (dependency of syscrg)
  - gmac1_rmii_refin fixed-clock (dependency of syscrg)
  - oscillator
  - core local interrupt timer
  - syscrg clock-controller
  - pllclk clock-controller (dependency of syscrg)
  - DDR memory controller

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
[ upstream commit: 8181cc2f3f21657392da912eb20ee17514c87828 ]

(cherry picked from commit a31c1c85876bf9f15f3df14959354ab9a200ffa0)

5 months agoriscv: dts: starfive: jh7110: add DMC memory controller
E Shattow [Wed, 15 Oct 2025 10:22:45 +0000 (03:22 -0700)] 
riscv: dts: starfive: jh7110: add DMC memory controller

Add JH7110 SoC DDR external memory controller.

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
[ upstream commit: 7114969021ec5c4c0f3df1da3a8790f75dda92e2 ]

(cherry picked from commit 8d5c520b73b7c29b714f75e99ed48baa55fc5fa1)

5 months agoriscv: dts: starfive: jh7110-common: drop no-sdio property from mmc1
E Shattow [Wed, 15 Oct 2025 10:22:44 +0000 (03:22 -0700)] 
riscv: dts: starfive: jh7110-common: drop no-sdio property from mmc1

Relax no-sdio restriction on mmc1 for jh7110 boards. Property was
introduced for StarFive VisionFive2 dts to configure mmc1 for SD Card
but this is not necessary, the restriction is only needed to block use of
commands that would cause a device to malfunction.

Signed-off-by: E Shattow <e@freeshell.de>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
[ upstream commit: 481ee0fcbb9a0f0706d6d29de9570d1048aff631 ]

(cherry picked from commit b4e73596622f791e3c2a2449022671e4e579fbd0)

5 months agotimer: sifive_clint: Add GHRTv2 compaible string
Jimmy Ho [Mon, 13 Oct 2025 02:24:25 +0000 (10:24 +0800)] 
timer: sifive_clint: Add GHRTv2 compaible string

The current sifive_clint driver can fully support GHRTv2 clint.
Add the compatible of GHRTv2 clint, sifive,clint2, to sifive_clint_ids
list.

Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Signed-off-by: Wayling Chen <wayling.chen@sifive.com>
Signed-off-by: Max Hsu <max.hsu@sifive.com>
Signed-off-by: Jimmy Ho <jimmy.ho@sifive.com>
5 months agogpio: tegra_gpio: convert to use set_flags
Lukasz Majewski [Fri, 3 Oct 2025 17:44:14 +0000 (20:44 +0300)] 
gpio: tegra_gpio: convert to use set_flags

Convert to use set_flags operation.

For now following flags are supported:
- GPIOD_IS_AF (i.e. "alternate function").
- GPIOD_IS_IN
- GPIOD_IS_OUT

Tested-by: Ɓukasz Majewski <lukma@nabladev.com> # Colibri T30
Signed-off-by: Lukasz Majewski <lukma@nabladev.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 months agovideo: tegra: Incorrect operator used
Andrew Goodbody [Wed, 1 Oct 2025 11:55:37 +0000 (12:55 +0100)] 
video: tegra: Incorrect operator used

Combining two bits into a mask requires the use of the binary 'or'
operator not the logical one. Correct it.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 months agovideo: tegra: Remove unreachable code
Andrew Goodbody [Wed, 1 Oct 2025 11:55:36 +0000 (12:55 +0100)] 
video: tegra: Remove unreachable code

The goto immediately after a return is unreachable. Remove it and its
target label as redundant.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 months agoconfigs: tegra: remove ATAGS support
Svyatoslav Ryhel [Tue, 16 Sep 2025 15:05:59 +0000 (18:05 +0300)] 
configs: tegra: remove ATAGS support

Remove support for ATAGS-based OS booting. ATAGS are used for booting
older Linux kernel versions and we are moving away from using those.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
5 months agocrypto: tegra: Tighten TEGRA_AES driver dependency
Tom Rini [Thu, 25 Sep 2025 20:45:35 +0000 (14:45 -0600)] 
crypto: tegra: Tighten TEGRA_AES driver dependency

This driver relies on tegra-specific headers to compile so make it
depend on ARCH_TEGRA.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 months agotimer: tegra: Bind watchdog to timer node
Lukasz Majewski [Thu, 18 Sep 2025 08:42:06 +0000 (10:42 +0200)] 
timer: tegra: Bind watchdog to timer node

Bind watchdog driver to the Tegra timer node since it uses one of the
timers to act as a watchdog and has no dedicated hardware block.

Signed-off-by: Lukasz Majewski <lukma@nabladev.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 months agowatchdog: Add support for Tegra watchdog timer
Lukasz Majewski [Thu, 18 Sep 2025 08:42:07 +0000 (10:42 +0200)] 
watchdog: Add support for Tegra watchdog timer

Provide support for Tegra watchdog functionality. The WATCHDOG index 0 in
conjunction with TIMER 5 is used inline with existing Linux kernel driver.

Signed-off-by: Lukasz Majewski <lukma@nabladev.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 months agoi2c: rcar_i2c: Add R-Car Gen5 support
Minh Le [Mon, 27 Oct 2025 16:38:04 +0000 (17:38 +0100)] 
i2c: rcar_i2c: Add R-Car Gen5 support

Add support for R-Car Gen5 SoCs into the driver.
I2C on R-Car Gen5 is treated the same as Gen3 and Gen4.

Signed-off-by: Minh Le <minh.le.aj@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Tweak commit message
Reviewed-by: Heiko Schocher <hs@nabladev.com>