Tom Rini [Wed, 25 Mar 2026 20:38:02 +0000 (14:38 -0600)]
Merge patch series "add [ as alias for test, fix 0/1 argument handling"
Rasmus Villemoes <ravi@prevas.dk> says:
Make 'test' behave a little more like its cousins in other shells, by
allowing the [ ... ] spelling, and while here, fix up the handling of
a single, non-empty argument to comply with POSIX.
Rasmus Villemoes [Thu, 12 Mar 2026 10:01:06 +0000 (11:01 +0100)]
cmd: test: fix handling of single-argument form of test
POSIX states that
0 arguments:
Exit false (1).
1 argument:
Exit true (0) if $1 is not null; otherwise, exit false.
and at least bash and busybox sh behave that way.
The current 'argc < 3' does the right thing for a non-existing or
empty argv[1], but not for a non-empty argv[1]. Fix that and add
corresponding test cases.
Rasmus Villemoes [Thu, 12 Mar 2026 10:01:05 +0000 (11:01 +0100)]
test: add tests for left-bracket alias for 'test' command
Duplicate a few of the existing test cases, using the [ spelling, and
also ensure that the presence of a matching ] as a separate and last
argument is enforced.
Rasmus Villemoes [Thu, 12 Mar 2026 10:01:03 +0000 (11:01 +0100)]
cmd: test: allow using [ as alias for test
I often find myself writing something like
if [ "$somevar" = 123 ] ; then ...
only to realize that that syntax doesn't work in U-Boot shell, and
must be spelled
if test "$somevar" = 123 ; then
It only takes a few lines of code to support this POSIX-standardized
alias for test, and helps developers focus on their actual problems
instead of dealing with such unexpected quirks of the shell.
Anshul Dalal [Thu, 12 Mar 2026 12:04:17 +0000 (17:34 +0530)]
mach-k3: move k3_falcon_fdt_fixup out of r5/common.c
k3_falcon_fdt_fixup is used to perform fdt fixups at runtime in falcon
mode such as adding bootargs. Currently the function is only accessible
to the R5 SPL but could be useful for A53 SPL based falcon mode setups
as well.
Therefore this patch moves the function from r5/common.c to common.c.
Anshul Dalal [Thu, 12 Mar 2026 03:43:24 +0000 (09:13 +0530)]
arm: mach-k3: use Kconfig options for ATF/OPTEE size
The reserved memory sizes for ATF and OPTEE were hard-coded for K3
devices, this patch replaces them with a Kconfig option allowing for
easier modifications.
Acked-by: Andrew Davis <afd@ti.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com> Signed-off-by: Anshul Dalal <anshuld@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com>
Tom Rini [Tue, 10 Mar 2026 16:26:10 +0000 (10:26 -0600)]
fw_loader: Introduce SUPPORTS_FW_LOADER symbol
The implementation of FW_LOADER requires CMDLINE to be enabled, and
expressses this. In order to not have to have every users also depends
on CMDLINE introduce SUPPORTS_FW_LOADER. This depends on CMDLINE and
ENV_SUPPORT and then we have all users depends on SUPPORTS_FW_LOADER.
In cases where phys_addr_t/phys_size_t is being printed, it's possible to
use tiny-printf-friendly %pap instead of %llx. For instance, in SPL, with
tiny-printf:
Before the patch:
fdtdec_setup_memory_banksize: DRAM Bank #0: start = 0xx, size = 0xx
After the patch:
fdtdec_setup_memory_banksize: DRAM Bank #0: start = 80000000, size = 40000000
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
The virtio spec clearly states in "3.1.1 Driver Requirements: Device
Initialization" the sequence a client has to follow after device reset.
Because u-boot resets here again, it also needs to set the "acknowledge"
bit again even if this was done in virtio_uclass_child_post_bind already
once before.
Signed-off-by: Christian Pötzsch <christian.poetzsch@kernkonzept.com> Signed-off-by: Adam Lackorzynski <adam@l4re.org>
[trini: Add VIRTIO_CONFIG_S_ACKNOWLEDGE flag check to the test] Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 25 Mar 2026 20:32:42 +0000 (14:32 -0600)]
Merge patch series "virtio: rng: Handle oversized return buffers"
Meet Patel <meet.patel2@arm.com> says:
The virtio-rng test to verify effective handling of oversized return
buffers checks that an (undocumented) error is raised, instead of the
real concern, which is the surrounding buffer integrity following a rng
function call.
Update the test to check that the other contents of a buffer remain
unchanged instead of looking for an error code.
The virtio-rng test to verify effective handling of oversized return
buffers checks that an (undocumented) error is raised, instead of the
real concern, which is the surrounding buffer integrity following a rng
function call.
Update the test to check that the other contents of a buffer remain
unchanged instead of looking for an error code.
Tom Rini [Wed, 25 Mar 2026 17:09:08 +0000 (11:09 -0600)]
Merge tag 'mediatek-for-next-2026-03-24' of https://source.denx.de/u-boot/custodians/u-boot-mediatek into next
- MAINTAINERS patch for new MediaTek custodians
- MediaTek pinctrl fix to allow using GPIOs on recent platforms
- The rest is a second wave of MediaTek clock refactoring to remove
duplicate ways of doing the same thing.
Julien Stephan [Thu, 12 Mar 2026 16:19:26 +0000 (17:19 +0100)]
pinctrl: mediatek: Add missing bind callback for several SoCs
Commit f4df9f53b7a9 ("pinctrl: mediatek: Bind gpio while binding pinctrl")
refactored pinctrl-mtk-common.c and the SoC-specific drivers to register
the gpiochip during the bind phase instead of probe. As part of this
change, each SoC driver must implement a bind callback.
The drivers recently added for mt8188, mt8189, mt8195 and mt8365 do not
define this callback, which prevents the gpiochip from being registered
properly.
David Lechner [Wed, 11 Mar 2026 14:52:49 +0000 (09:52 -0500)]
MAINTAINERS: add new MediaTek custodians
Add new MediaTek custodians and the new MediaTek custodian's git
repository to the MAINTAINERS file.
Julien and I have volunteered to act as custodians for MediaTek since
we have been actively working on upstreaming MediaTek support for some
some time now.
David Lechner [Mon, 9 Mar 2026 22:51:11 +0000 (17:51 -0500)]
clk: mediatek: mt8195: use ext_clock_rates
Convert the mt8195 clock driver to use ext_clock_rates.
Now that we have the ext_clock_rates feature and also mux clock parents
have been converted to struct mtk_parent, we can remove the hack of
adding "missing" topckgen clocks. Instead we can use the proper parents.
The topckgen ID map is still needed though because the upstream
dt-bindings didn't use the conventional number ordering by clock type
for these.
David Lechner [Mon, 9 Mar 2026 22:51:10 +0000 (17:51 -0500)]
clk: mediatek: mt8188: use ext_clock_rates
Convert the mt8188 clock driver to use ext_clock_rates.
Now that we have the ext_clock_rates feature and also mux clock parents
have been converted to struct mtk_parent, we can remove the hack of
adding "missing" topckgen clocks. Instead we can use the proper parents.
The topckgen ID map is still needed though because the upstream
dt-bindings didn't use the conventional number ordering by clock type
for these.
Refactor two identical functions for getting mux clock rates. The
functions are renamed and moved to the section of the code that contains
other common functions.
David Lechner [Tue, 17 Mar 2026 23:23:28 +0000 (18:23 -0500)]
clk: mediatek: remove CLK_PARENT_MIXED flag
Remove CLK_PARENT_MIXED and all dead code paths related to it.
All mux clocks have been converted to use struct mtk_parent (the
parent_flags field of the parent/parent_flags union). Use of this
struct was indicated by CLK_PARENT_MIXED. Now, this is always the case
and we can drop the flag and the union. All MUX_MIXED* macros are
change to use the equivalent MUX* macros since we no longer need to
set the flag.
David Lechner [Tue, 17 Mar 2026 23:23:27 +0000 (18:23 -0500)]
clk: mediatek: remove use of CLK_BYPASS_XTAL flag
Remove the CLK_BYPASS_XTAL flag completely.
It was a bit of a hack that was meant to handle mux clocks that had
mixed parents (e.g. XTAL and TOPCKGEN). The idea was that if you didn't
have CLK_XTAL as a parent, then you were supposed to add the
CLK_BYPASS_XTAL flag to the clock tree. There are likely a number of
drivers missing this since it is not intuitive.
In the meantime, we have introduced the CLK_PARENT_MIXED flag which
handles this more robustly. All of the affected drivers (the ones
without CLK_BYPASS_XTAL) have been updated to use CLK_PARENT_MIXED, so
the CLK_BYPASS_XTAL flag is no longer needed on other drivers.
David Lechner [Tue, 17 Mar 2026 23:23:26 +0000 (18:23 -0500)]
clk: mediatek: mt8518: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
David Lechner [Tue, 17 Mar 2026 23:23:25 +0000 (18:23 -0500)]
clk: mediatek: mt8516: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
David Lechner [Tue, 17 Mar 2026 23:23:24 +0000 (18:23 -0500)]
clk: mediatek: mt8512: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
David Lechner [Tue, 17 Mar 2026 23:23:23 +0000 (18:23 -0500)]
clk: mediatek: mt8365: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
David Lechner [Tue, 17 Mar 2026 23:23:22 +0000 (18:23 -0500)]
clk: mediatek: mt8195: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
David Lechner [Tue, 17 Mar 2026 23:23:21 +0000 (18:23 -0500)]
clk: mediatek: mt8188: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
David Lechner [Tue, 17 Mar 2026 23:23:20 +0000 (18:23 -0500)]
clk: mediatek: mt8183: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
David Lechner [Tue, 17 Mar 2026 23:23:19 +0000 (18:23 -0500)]
clk: mediatek: mt7988: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
David Lechner [Tue, 17 Mar 2026 23:23:18 +0000 (18:23 -0500)]
clk: mediatek: mt7987: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
David Lechner [Tue, 17 Mar 2026 23:23:17 +0000 (18:23 -0500)]
clk: mediatek: mt7981: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
David Lechner [Tue, 17 Mar 2026 23:23:16 +0000 (18:23 -0500)]
clk: mediatek: mt7629: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
David Lechner [Tue, 17 Mar 2026 23:23:15 +0000 (18:23 -0500)]
clk: mediatek: mt7623: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
David Lechner [Tue, 17 Mar 2026 23:23:14 +0000 (18:23 -0500)]
clk: mediatek: mt7622: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
Casey Connolly [Wed, 21 Jan 2026 00:36:51 +0000 (01:36 +0100)]
watchdog: qcom: stop watchdog by default
Prevent the Qualcomm watchdog from autostarting and ensure it's stopped
when the driver probed. In some cases the watchdog is left running by
a previous bootloader stage. Disable autostart so it isn't left running
when we boot into the OS, this behaviour can be changed by enabling
autostart in the board defconfig.
Casey Connolly [Fri, 20 Mar 2026 15:45:41 +0000 (16:45 +0100)]
qcom: rpmh: don't error for SLEEP requests
Just stub out non-active votes, if we return an error the caller may
propagate it and not send its active vote. Since we don't suspend
there's no risk of us entering a broken state due to missing votes.
Casey Connolly [Fri, 20 Mar 2026 15:45:40 +0000 (16:45 +0100)]
serial: msm-geni: allow invalid clock
Pre-relocation we may not have a clock but it's usually been enabled for
us already, or worst case we will enable it after relocation. Erroring
out in this case will almost always cause U-Boot to hang pre-relocation
which is undesirable and may be hard to debug.
Add support for QCS615 QUSB2 PHY by introducing platform-specific
initialization table and register layout. The implementation reuses
the IPQ6018 register layout and defines QCS615-specific tuning
parameters for proper USB PHY operation.
Taken from Linux commit 8adbf20e0502 ("phy: qcom-qusb2: Add support for QCS615")
clk: qcom: qcs615: Add GCC_AHB2PHY_WEST_CLK clock support
Add GCC_AHB2PHY_WEST_CLK gate clock definition to the QCS615
clock driver. This clock is required for proper PHY operation
and eliminates clock-related warnings during USB initialization.
clk: qcom: qcs615: Add GCC_USB3_PRIM_CLKREF_CLK support
Add support for GCC_USB3_PRIM_CLKREF_CLK to the QCS615 clock driver.
This clock is referenced in the device tree USB node but was not
implemented in U-Boot, causing "Clock 152 not found" warnings during
fastboot run.
This series refactors the DDR configuration handling for the
Toradex Aquila AM69 board and adds support for a 16GB dual-rank
memory configuration, while changing the HW_CFG pins value to
DDR configurations mapping.
board: toradex: aquila-am69: Add support for 16GB dual rank memory configuration
Move the existing 16GB single-rank configuration to HW_CFG 0x03 and use
the previous HW_CFG 0x01 value for the new 16GB dual-rank configuration.
There is no hardware using the former 16GB single-rank configuration,
so reuse the HW_CFG value for the new 16GB dual-rank configuration,
which will be used in production.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
The memory controller configuration doesn't depend only on the memory
size, so refactor the code to use the memory configuration read from
the HW_CFG pin instead of the memory size.
Additionally, make use of one header file for all the memory
configurations.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Simon Glass [Mon, 9 Mar 2026 15:13:04 +0000 (09:13 -0600)]
test: Convert fs_helper to use a class
Create a class around mk_fs() (and later setup_image()) to handle the
common tasks of image creation. Many callers of fs_helper.mk_fs()
create their own scratch directories while users of
fs_helper.setup_image() rely on one being returned. Unify this by
adding 'srcdir' as a field while converting to a class.
The class delegates to the existing mk_fs() function for the actual
filesystem creation, adding lifecycle management for scratch
directories and the image file.
Signed-off-by: Simon Glass <simon.glass@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Mon, 9 Mar 2026 15:13:00 +0000 (09:13 -0600)]
test: fs_helper: Allow passing the image filename
The mk_fs() function always generates its own image filename from the
prefix and fs_type. Some callers need to specify a custom leaf name
while still keeping the image under the persistent-data directory.
Add an fs_img parameter that accepts a leaf filename. When provided,
it is joined with persistent_data_dir instead of the default name.
Signed-off-by: Simon Glass <simon.glass@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Anshul Dalal [Fri, 6 Mar 2026 12:02:37 +0000 (17:32 +0530)]
include: env: ti: move board specific scripts out of ti_common
bootcmd_ti_mmc had cpsw0_qsgmii_phyinit related scripts even though this
was only relevant for the j721e/j7200 SoCs. This patch instead factors
out those scripts into a generic 'board_init' which is called as part of
bootcmd_ti_mmc.
This allows boards to more easily add custom behaviour to the ti_mmc
bootflow instead of having to modify the ti_common.env file.
Tom Rini [Thu, 19 Mar 2026 16:33:43 +0000 (10:33 -0600)]
serial: Enable SYS_NS16550 on incorrectly migrated platforms
With the migration to DM_SERIAL in commit 191b10ac70d7 ("PowerPC /
Layerscape: Finish migration to DM_SERIAL") a number of platforms were
incorrectly migrated and did not enable SYS_NS16550 despite previously
having enabled the non-DM NS16650 serial driver. Enable these now.
Fixes: 191b10ac70d7 ("PowerPC / Layerscape: Finish migration to DM_SERIAL") Reported-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
As exposed by "make randconfig", some symbols such as
XILINX_MICROBLAZE0_PVR can be set without TARGET_MICROBLAZE_GENERIC but
have a transitive dependency on it. The easiest path of resolution here
is that since there is only one valid microblaze "board", rework that
symbol to be non-optional.
Tom Rini [Tue, 17 Mar 2026 01:24:46 +0000 (19:24 -0600)]
timer: Correct Kconfig entry for XILINX_TIMER
As exposed by "make randconfig", we have an issue with the dependencies
for XILINX_TIMER. This symbol is a case where we have one that covers
both main U-Boot and SPL. In this case, we need to select SPL_REGMAP not
when SPL is enabled but rather when SPL_TIMER is enabled (and in turn,
SPL_DM).
Padmarao Begari [Fri, 6 Mar 2026 12:48:07 +0000 (13:48 +0100)]
arm64: versal2: Fix UFS boot command sequence
The BOOTENV_DEV_UFS macro is incomplete - it only initializes UFS
and scans SCSI devices but does not actually boot anything. This
causes the boot sequence to stop after scsi scan without loading
a kernel.
Update BOOTENV_DEV_UFS to set the devnum environment variable to
the UFS instance number, initialize the device using $devnum, and
delegate the boot process to the shared scsi_boot script. Remove
the explicit scsi scan, as it is already handled by scsi_boot.
This matches the pattern used by other boot device macros and
ensures that UFS devices can successfully boot using the distro
boot framework.
Padmarao Begari [Mon, 2 Mar 2026 07:43:33 +0000 (08:43 +0100)]
net: zynq_gem: clear TXSR transfer complete
The Zynq GEM TX status register retains the transfer‑complete bit
until it is explicitly cleared. The current flow waits for
transfer‑complete but never clears it, so on the next send the wait
loop returns immediately because transfer‑complete is already high.
This causes the driver to report TX completion before the new DMA
transfer has actually finished, which breaks back‑to‑back
transmissions. This issue causes timeouts during LWIP TFTP transfers
when cache coherency is enabled.
Fix this by explicitly clearing transfer‑complete (write‑to‑clear)
after the wait completes, so each transmit starts with a clean TXSR.
Padmarao Begari [Sun, 15 Feb 2026 15:16:26 +0000 (20:46 +0530)]
spi: cadence_qspi: pulse controller reset at probe
The driver previously only deasserted the optional bulk reset,
leaving the controller in whatever state earlier stages left it and
risking failed probes or bad transfers. Assert the reset first, wait
10 µs, and then deassert so the OSPI block starts from a known state.
spi: cadence_qspi: Disable the DAC mode in indirect read
Hang has been observed on QEMU, as it starts with indac
read and fills sram, but after dma is triggered, it tries
dac read instead (based on priority) which gets blocked.
Disable the DAC mode in indirect DMA read and enable back
for writes as DAC mode is used.
Michael Walle [Wed, 18 Mar 2026 14:29:17 +0000 (15:29 +0100)]
armv7: ls102xa: fix SPI flash clock
Commit bb6f3c0f7634 ("armv7: ls102xa: Update SCFG_QSPI_CLKSEL value")
broke the SPI boot on the LS1021ATSN board (ls1021atsn_qspi_defconfig)
at least.
The commit message reads
Update SCFG_QSPI_CLKSEL value : 0xC -> 0x5
which means ClusterPLL/16
The original submitted patch had the following description:
Value 0xC is reserved. Replace it with correct value 0x5 which
is ClusterPLL/16
Unfortunatly, the little information which was there, was stripped even
further. Why is 0x5 the "correct" value? In fact, it seems that the
upper bit is just ignored and thus the value 0xC translates to 0x4 which
is ClusterPLL/20. This, will result in a SPI clock of 60MHz (if the PLL
is clocked at 1.2GHz). But even that is too much for the (default) 03h
read opcode (max 50MHz). Set the value to ClusterPLL/24 which is 50MHz.
Han Xu [Wed, 25 Feb 2026 21:13:32 +0000 (15:13 -0600)]
mmc: Add support for eMMC 5.1B specification
Add support for eMMC specification version 5.1B by defining
MMC_VERSION_5_1B and including it in the version array.
eMMC 5.1B (JESD84-B51B) is a minor revision of the 5.1 specification
that primarily addresses MDT (Manufacturing Date) adjustment for dates
beyond 2025. This aligns with the Linux kernel commit 9996707822f82
("mmc: core: Adjust MDT beyond 2025").
Since the manufacturing date field is not currently used in U-Boot,
this change has no functional impact beyond proper device recognition.
It allows the driver to correctly identify and initialize eMMC devices
that report version 5.1B in their Extended CSD register.
Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Dan Carpenter [Wed, 11 Mar 2026 19:41:25 +0000 (22:41 +0300)]
scmi: pinctrl: add pinctrl driver for SCMI
This driver adds the base support of pinctrl over SCMI. The driver
does two main things. First, it allows you to configure the initial
pin states. Secondly, it's used a base to build a GPIO driver on
top of it.
To configure the states then add a pinmux config to the scmi_pinctrl
section:
Under linux the pinctrl subsystem will parse the function and group
properties and use that to handle muxing. However, under u-boot the
pin muxing is done using the "pinmux" property, which feeds raw SCMI
pinctrl PINCTRL_SETTINGS_CONFIGURE commands to the server. The
numbers are: selector, identifier, function_id, config_type, and
config_value. In the example above, it sets pins 1, 2, and 3 to 1.
The linux-kernel ignores this pinmux property.
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Tue, 17 Mar 2026 01:24:14 +0000 (19:24 -0600)]
scmi: Rework SCMI_FIRMWARE implementation
As exposed by "make randconfig", how we have SCMI_FIRMWARE today is
incomplete, and in one case, used incorrectly. First, SCMI_FIRMWARE has
a build-time dependency on OF_CONTROL being enabled, so add that.
Second, RESET_SCMI depends on SCMI_FIRMWARE being enabled, it should not
select that symbol. In turn, a number of platforms need to now enable
SCMI_FIRMWARE explicitly and not rely on RESET_SCMI to enable it for
them.
Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Peng Fan <peng.fan@nxp.com> Acked-by: Anshul Dalal <anshuld@ti.com> Acked-by: Michal Simek <michal.simek@amd.com> # Versal Gen 2 Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Wed, 18 Mar 2026 17:02:33 +0000 (11:02 -0600)]
tests: FIT: Add "clone" image attack image test
Related to the problem resolved with commit 2092322b31cc ("boot: Add
fit_config_get_hash_list() to build signed node list"), add a testcase
for the problem as well.
Reported-by: Apple Security Engineering and Architecture (SEAR) Signed-off-by: Tom Rini <trini@konsulko.com>
projects / thirdparty / u-boot.git / log
