]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gas/config/tc-avr.c
2006-05-23 H.J. Lu <hongjiu.lu@intel.com>
[thirdparty/binutils-gdb.git] / gas / config / tc-avr.c
CommitLineData
adde6300
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1/* tc-avr.c -- Assembler code for the ATMEL AVR
2
8ad7c533 3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006
2132e3a3 4 Free Software Foundation, Inc.
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5 Contributed by Denis Chertykov <denisc@overta.ru>
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
4b4da160
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21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
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23
24#include <stdio.h>
adde6300 25#include "as.h"
3882b010 26#include "safe-ctype.h"
adde6300 27#include "subsegs.h"
dc191a8f 28#include "libiberty.h"
adde6300 29
1188e082
DC
30struct avr_opcodes_s
31{
dc191a8f
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32 char * name;
33 char * constraints;
34 int insn_size; /* In words. */
35 int isa;
36 unsigned int bin_opcode;
1188e082
DC
37};
38
39#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
40{#NAME, CONSTR, SIZE, ISA, BIN},
41
42struct avr_opcodes_s avr_opcodes[] =
43{
44 #include "opcode/avr.h"
45 {NULL, NULL, 0, 0, 0}
46};
47
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48const char comment_chars[] = ";";
49const char line_comment_chars[] = "#";
50const char line_separator_chars[] = "$";
51
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52const char *md_shortopts = "m:";
53struct mcu_type_s
54{
55 char *name;
56 int isa;
57 int mach;
58};
59
1f8ae5e6
DC
60/* XXX - devices that don't seem to exist (renamed, replaced with larger
61 ones, or planned but never produced), left here for compatibility.
62 TODO: hide them in show_mcu_list output? */
63
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64static struct mcu_type_s mcu_types[] =
65{
b170af93 66 {"avr1", AVR_ISA_TINY1, bfd_mach_avr1},
71d7ecf2 67 {"avr2", AVR_ISA_TINY2, bfd_mach_avr2},
b170af93 68 {"avr3", AVR_ISA_M103, bfd_mach_avr3},
1f8ae5e6 69 {"avr4", AVR_ISA_M8, bfd_mach_avr4},
65aa24b6 70 {"avr5", AVR_ISA_ALL, bfd_mach_avr5},
adde6300 71 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
1f8ae5e6 72 {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1}, /* XXX -> tn11 */
b170af93
DC
73 {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1},
74 {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1},
75 {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1},
76 {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1},
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77 {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2},
78 {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2},
1f8ae5e6 79 {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 4433 */
adde6300 80 {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2},
bdfdba87
MM
81 {"attiny22", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 2343 */
82 {"attiny26", AVR_ISA_2xxx, bfd_mach_avr2},
adde6300 83 {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2},
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DC
84 {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8515 */
85 {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8535 */
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86 {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2},
87 {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2},
88 {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2},
8a6def3b 89 {"at86rf401", AVR_ISA_2xxx, bfd_mach_avr2},
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90 {"attiny13", AVR_ISA_TINY2, bfd_mach_avr2},
91 {"attiny2313",AVR_ISA_TINY2, bfd_mach_avr2},
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92 {"attiny261", AVR_ISA_TINY2, bfd_mach_avr2},
93 {"attiny461", AVR_ISA_TINY2, bfd_mach_avr2},
94 {"attiny861", AVR_ISA_TINY2, bfd_mach_avr2},
95 {"attiny24", AVR_ISA_TINY2, bfd_mach_avr2},
96 {"attiny44", AVR_ISA_TINY2, bfd_mach_avr2},
97 {"attiny84", AVR_ISA_TINY2, bfd_mach_avr2},
98 {"attiny25", AVR_ISA_TINY2, bfd_mach_avr2},
99 {"attiny45", AVR_ISA_TINY2, bfd_mach_avr2},
100 {"attiny85", AVR_ISA_TINY2, bfd_mach_avr2},
1f8ae5e6 101 {"atmega603", AVR_ISA_M603, bfd_mach_avr3}, /* XXX -> m103 */
b170af93 102 {"atmega103", AVR_ISA_M103, bfd_mach_avr3},
1f8ae5e6 103 {"at43usb320",AVR_ISA_M103, bfd_mach_avr3},
bdfdba87 104 {"at43usb355",AVR_ISA_M603, bfd_mach_avr3},
1f8ae5e6 105 {"at76c711", AVR_ISA_M603, bfd_mach_avr3},
d727e8c2 106 {"atmega48", AVR_ISA_PWMx, bfd_mach_avr4},
1f8ae5e6 107 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
8a6def3b 108 {"atmega83", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8535 */
1f8ae5e6 109 {"atmega85", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8 */
d727e8c2 110 {"atmega88", AVR_ISA_PWMx, bfd_mach_avr4},
bdfdba87 111 {"atmega8515",AVR_ISA_M8, bfd_mach_avr4},
8a6def3b 112 {"atmega8535",AVR_ISA_M8, bfd_mach_avr4},
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113 {"at90pwm2", AVR_ISA_PWMx, bfd_mach_avr4},
114 {"at90pwm3", AVR_ISA_PWMx, bfd_mach_avr4},
1f8ae5e6 115 {"atmega16", AVR_ISA_M323, bfd_mach_avr5},
65aa24b6 116 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
bdfdba87 117 {"atmega162", AVR_ISA_M323, bfd_mach_avr5},
65aa24b6 118 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
d727e8c2 119 {"atmega164", AVR_ISA_M323, bfd_mach_avr5},
5c54fd37 120 {"atmega165", AVR_ISA_M323, bfd_mach_avr5},
23794b24 121 {"atmega168", AVR_ISA_M323, bfd_mach_avr5},
8a6def3b 122 {"atmega169", AVR_ISA_M323, bfd_mach_avr5},
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DC
123 {"atmega32", AVR_ISA_M323, bfd_mach_avr5},
124 {"atmega323", AVR_ISA_M323, bfd_mach_avr5},
d727e8c2 125 {"atmega324", AVR_ISA_M323, bfd_mach_avr5},
5c54fd37 126 {"atmega325", AVR_ISA_M323, bfd_mach_avr5},
d727e8c2 127 {"atmega329", AVR_ISA_M323, bfd_mach_avr5},
5c54fd37 128 {"atmega3250",AVR_ISA_M323, bfd_mach_avr5},
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NC
129 {"atmega3290",AVR_ISA_M323, bfd_mach_avr5},
130 {"atmega406", AVR_ISA_M323, bfd_mach_avr5},
1f8ae5e6 131 {"atmega64", AVR_ISA_M323, bfd_mach_avr5},
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NC
132 {"atmega640", AVR_ISA_M323, bfd_mach_avr5},
133 {"atmega644", AVR_ISA_M323, bfd_mach_avr5},
1f8ae5e6 134 {"atmega128", AVR_ISA_M128, bfd_mach_avr5},
d727e8c2
NC
135 {"atmega1280",AVR_ISA_M128, bfd_mach_avr5},
136 {"atmega1281",AVR_ISA_M128, bfd_mach_avr5},
5c54fd37 137 {"atmega645", AVR_ISA_M323, bfd_mach_avr5},
d727e8c2 138 {"atmega649", AVR_ISA_M323, bfd_mach_avr5},
5c54fd37 139 {"atmega6450",AVR_ISA_M323, bfd_mach_avr5},
d727e8c2
NC
140 {"atmega6490",AVR_ISA_M323, bfd_mach_avr5},
141 {"at90can32" ,AVR_ISA_M323, bfd_mach_avr5},
142 {"at90can64" ,AVR_ISA_M323, bfd_mach_avr5},
23794b24 143 {"at90can128",AVR_ISA_M128, bfd_mach_avr5},
d727e8c2
NC
144 {"at90usb646", AVR_ISA_M323, bfd_mach_avr5},
145 {"at90usb647", AVR_ISA_M323, bfd_mach_avr5},
146 {"at90usb1286",AVR_ISA_M128, bfd_mach_avr5},
147 {"at90usb1287",AVR_ISA_M128, bfd_mach_avr5},
65aa24b6 148 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
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149 {NULL, 0, 0}
150};
151
adde6300 152/* Current MCU type. */
dc191a8f
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153static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2};
154static struct mcu_type_s * avr_mcu = & default_mcu;
adde6300 155
00d2865b
NC
156/* AVR target-specific switches. */
157struct avr_opt_s
158{
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159 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
160 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
161 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
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162};
163
164static struct avr_opt_s avr_opt = { 0, 0, 0 };
165
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166const char EXP_CHARS[] = "eE";
167const char FLT_CHARS[] = "dD";
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168
169static void avr_set_arch (int);
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170
171/* The target specific pseudo-ops which we support. */
172const pseudo_typeS md_pseudo_table[] =
173{
174 {"arch", avr_set_arch, 0},
175 { NULL, NULL, 0}
176};
177
178#define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
adde6300 179
dc191a8f
NC
180#define EXP_MOD_NAME(i) exp_mod[i].name
181#define EXP_MOD_RELOC(i) exp_mod[i].reloc
182#define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
183#define HAVE_PM_P(i) exp_mod[i].have_pm
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184
185struct exp_mod_s
186{
dc191a8f
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187 char * name;
188 bfd_reloc_code_real_type reloc;
189 bfd_reloc_code_real_type neg_reloc;
190 int have_pm;
adde6300
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191};
192
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193static struct exp_mod_s exp_mod[] =
194{
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195 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
196 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
197 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
198 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
199 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
200 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
df406460
NC
201 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
202 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
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203};
204
8ad7c533
NC
205/* A union used to store indicies into the exp_mod[] array
206 in a hash table which expects void * data types. */
207typedef union
208{
209 void * ptr;
210 int index;
211} mod_index;
212
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213/* Opcode hash table. */
214static struct hash_control *avr_hash;
215
216/* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
217static struct hash_control *avr_mod_hash;
218
00d2865b 219#define OPTION_MMCU 'm'
dc191a8f
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220enum options
221{
222 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
223 OPTION_NO_SKIP_BUG,
224 OPTION_NO_WRAP
225};
adde6300 226
c6a7ab1f
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227struct option md_longopts[] =
228{
00d2865b
NC
229 { "mmcu", required_argument, NULL, OPTION_MMCU },
230 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
231 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
232 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
233 { NULL, no_argument, NULL, 0 }
adde6300 234};
adde6300 235
c6a7ab1f 236size_t md_longopts_size = sizeof (md_longopts);
00d2865b
NC
237
238/* Display nicely formatted list of known MCU names. */
c6a7ab1f 239
00d2865b 240static void
dc191a8f 241show_mcu_list (FILE *stream)
00d2865b
NC
242{
243 int i, x;
244
245 fprintf (stream, _("Known MCU names:"));
246 x = 1000;
1dab94dd 247
00d2865b
NC
248 for (i = 0; mcu_types[i].name; i++)
249 {
250 int len = strlen (mcu_types[i].name);
1dab94dd 251
00d2865b 252 x += len + 1;
1dab94dd 253
00d2865b 254 if (x < 75)
c6a7ab1f 255 fprintf (stream, " %s", mcu_types[i].name);
00d2865b
NC
256 else
257 {
258 fprintf (stream, "\n %s", mcu_types[i].name);
259 x = len + 2;
260 }
261 }
1dab94dd 262
c6a7ab1f 263 fprintf (stream, "\n");
00d2865b
NC
264}
265
adde6300 266static inline char *
dc191a8f 267skip_space (char *s)
adde6300
AM
268{
269 while (*s == ' ' || *s == '\t')
270 ++s;
271 return s;
272}
273
274/* Extract one word from FROM and copy it to TO. */
c6a7ab1f 275
adde6300
AM
276static char *
277extract_word (char *from, char *to, int limit)
278{
279 char *op_start;
280 char *op_end;
281 int size = 0;
282
283 /* Drop leading whitespace. */
284 from = skip_space (from);
285 *to = 0;
c6a7ab1f 286
adde6300 287 /* Find the op code end. */
c6a7ab1f 288 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
adde6300
AM
289 {
290 to[size++] = *op_end++;
291 if (size + 1 >= limit)
292 break;
293 }
1dab94dd 294
adde6300
AM
295 to[size] = 0;
296 return op_end;
297}
298
299int
dc191a8f
NC
300md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
301 asection *seg ATTRIBUTE_UNUSED)
adde6300
AM
302{
303 abort ();
304 return 0;
305}
306
307void
dc191a8f 308md_show_usage (FILE *stream)
adde6300 309{
00d2865b
NC
310 fprintf (stream,
311 _("AVR options:\n"
adde6300
AM
312 " -mmcu=[avr-name] select microcontroller variant\n"
313 " [avr-name] can be:\n"
65aa24b6
NC
314 " avr1 - AT90S1200, ATtiny1x, ATtiny28\n"
315 " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n"
316 " avr3 - ATmega103, ATmega603\n"
317 " avr4 - ATmega83, ATmega85\n"
318 " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n"
adde6300 319 " or immediate microcontroller name.\n"));
00d2865b
NC
320 fprintf (stream,
321 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
322 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
323 " (default for avr4, avr5)\n"
324 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
325 " (default for avr3, avr5)\n"));
326 show_mcu_list (stream);
adde6300
AM
327}
328
329static void
dc191a8f 330avr_set_arch (int dummy ATTRIBUTE_UNUSED)
adde6300 331{
dc191a8f 332 char str[20];
1dab94dd 333
adde6300 334 input_line_pointer = extract_word (input_line_pointer, str, 20);
00d2865b 335 md_parse_option (OPTION_MMCU, str);
adde6300
AM
336 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
337}
338
339int
dc191a8f 340md_parse_option (int c, char *arg)
adde6300 341{
00d2865b 342 switch (c)
adde6300 343 {
00d2865b
NC
344 case OPTION_MMCU:
345 {
346 int i;
347 char *s = alloca (strlen (arg) + 1);
adde6300 348
00d2865b
NC
349 {
350 char *t = s;
351 char *arg1 = arg;
352
353 do
3882b010 354 *t = TOLOWER (*arg1++);
00d2865b
NC
355 while (*t++);
356 }
357
358 for (i = 0; mcu_types[i].name; ++i)
359 if (strcmp (mcu_types[i].name, s) == 0)
360 break;
adde6300 361
00d2865b
NC
362 if (!mcu_types[i].name)
363 {
364 show_mcu_list (stderr);
365 as_fatal (_("unknown MCU: %s\n"), arg);
366 }
65aa24b6 367
00d2865b
NC
368 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
369 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
370 as .arch ... in the asm output at the same time. */
00d2865b
NC
371 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
372 avr_mcu = &mcu_types[i];
373 else
374 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
375 avr_mcu->name, mcu_types[i].name);
376 return 1;
377 }
378 case OPTION_ALL_OPCODES:
379 avr_opt.all_opcodes = 1;
380 return 1;
381 case OPTION_NO_SKIP_BUG:
382 avr_opt.no_skip_bug = 1;
383 return 1;
384 case OPTION_NO_WRAP:
385 avr_opt.no_wrap = 1;
adde6300
AM
386 return 1;
387 }
1dab94dd 388
adde6300
AM
389 return 0;
390}
391
392symbolS *
dc191a8f 393md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
adde6300 394{
dc191a8f 395 return NULL;
adde6300
AM
396}
397
c6a7ab1f
NC
398/* Turn a string in input_line_pointer into a floating point constant
399 of type TYPE, and store the appropriate bytes in *LITP. The number
400 of LITTLENUMS emitted is stored in *SIZEP. An error message is
401 returned, or NULL on OK. */
402
adde6300 403char *
dc191a8f 404md_atof (int type, char *litP, int *sizeP)
adde6300
AM
405{
406 int prec;
407 LITTLENUM_TYPE words[4];
408 LITTLENUM_TYPE *wordP;
409 char *t;
410
411 switch (type)
412 {
413 case 'f':
414 prec = 2;
415 break;
416 case 'd':
417 prec = 4;
418 break;
419 default:
420 *sizeP = 0;
421 return _("bad call to md_atof");
422 }
423
424 t = atof_ieee (input_line_pointer, type, words);
425 if (t)
426 input_line_pointer = t;
427
428 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1dab94dd 429
adde6300
AM
430 /* This loop outputs the LITTLENUMs in REVERSE order. */
431 for (wordP = words + prec - 1; prec--;)
432 {
433 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
434 litP += sizeof (LITTLENUM_TYPE);
435 }
1dab94dd 436
adde6300
AM
437 return NULL;
438}
439
440void
dc191a8f
NC
441md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
442 asection *sec ATTRIBUTE_UNUSED,
443 fragS *fragP ATTRIBUTE_UNUSED)
adde6300
AM
444{
445 abort ();
446}
447
adde6300 448void
dc191a8f 449md_begin (void)
adde6300 450{
df136245 451 unsigned int i;
adde6300 452 struct avr_opcodes_s *opcode;
dc191a8f 453
c6a7ab1f 454 avr_hash = hash_new ();
adde6300
AM
455
456 /* Insert unique names into hash table. This hash table then provides a
457 quick index to the first opcode with a particular name in the opcode
458 table. */
adde6300
AM
459 for (opcode = avr_opcodes; opcode->name; opcode++)
460 hash_insert (avr_hash, opcode->name, (char *) opcode);
461
462 avr_mod_hash = hash_new ();
463
dc191a8f 464 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
8ad7c533
NC
465 {
466 mod_index m;
467
468 m.index = i + 10;
469 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
470 }
c6a7ab1f 471
adde6300
AM
472 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
473}
474
df136245 475/* Resolve STR as a constant expression and return the result.
c6a7ab1f 476 If result greater than MAX then error. */
df136245
DC
477
478static unsigned int
dc191a8f 479avr_get_constant (char *str, int max)
df136245
DC
480{
481 expressionS ex;
dc191a8f 482
df136245
DC
483 str = skip_space (str);
484 input_line_pointer = str;
dc191a8f 485 expression (& ex);
df136245
DC
486
487 if (ex.X_op != O_constant)
488 as_bad (_("constant value required"));
489
490 if (ex.X_add_number > max || ex.X_add_number < 0)
c6a7ab1f 491 as_bad (_("number must be less than %d"), max + 1);
1dab94dd 492
df136245
DC
493 return ex.X_add_number;
494}
495
dc191a8f 496/* Parse for ldd/std offset. */
df136245 497
dc191a8f
NC
498static void
499avr_offset_expression (expressionS *exp)
adde6300 500{
dc191a8f
NC
501 char *str = input_line_pointer;
502 char *tmp;
503 char op[8];
adde6300 504
dc191a8f
NC
505 tmp = str;
506 str = extract_word (str, op, sizeof (op));
507
508 input_line_pointer = tmp;
509 expression (exp);
510
511 /* Warn about expressions that fail to use lo8 (). */
512 if (exp->X_op == O_constant)
adde6300 513 {
dc191a8f
NC
514 int x = exp->X_add_number;
515
516 if (x < -255 || x > 255)
517 as_warn (_("constant out of 8-bit range: %d"), x);
518 }
519}
adde6300 520
dc191a8f 521/* Parse ordinary expression. */
adde6300 522
dc191a8f
NC
523static char *
524parse_exp (char *s, expressionS *op)
525{
526 input_line_pointer = s;
527 expression (op);
528 if (op->X_op == O_absent)
529 as_bad (_("missing operand"));
530 return input_line_pointer;
531}
1dab94dd 532
dc191a8f
NC
533/* Parse special expressions (needed for LDI command):
534 xx8 (address)
535 xx8 (-address)
536 pm_xx8 (address)
537 pm_xx8 (-address)
538 where xx is: hh, hi, lo. */
adde6300 539
dc191a8f
NC
540static bfd_reloc_code_real_type
541avr_ldi_expression (expressionS *exp)
542{
543 char *str = input_line_pointer;
544 char *tmp;
545 char op[8];
546 int mod;
547 tmp = str;
adde6300 548
dc191a8f 549 str = extract_word (str, op, sizeof (op));
adde6300 550
dc191a8f
NC
551 if (op[0])
552 {
8ad7c533
NC
553 mod_index m;
554
555 m.ptr = hash_find (avr_mod_hash, op);
556 mod = m.index;
1dab94dd 557
dc191a8f
NC
558 if (mod)
559 {
560 int closes = 0;
b170af93 561
dc191a8f
NC
562 mod -= 10;
563 str = skip_space (str);
00d2865b 564
dc191a8f
NC
565 if (*str == '(')
566 {
567 int neg_p = 0;
00d2865b 568
dc191a8f 569 ++str;
00d2865b 570
dc191a8f
NC
571 if (strncmp ("pm(", str, 3) == 0
572 || strncmp ("-(pm(", str, 5) == 0)
573 {
574 if (HAVE_PM_P (mod))
575 {
576 ++mod;
577 ++closes;
578 }
579 else
580 as_bad (_("illegal expression"));
b170af93 581
dc191a8f
NC
582 if (*str == '-')
583 {
584 neg_p = 1;
585 ++closes;
586 str += 5;
587 }
588 else
589 str += 3;
590 }
adde6300 591
dc191a8f
NC
592 if (*str == '-' && *(str + 1) == '(')
593 {
594 neg_p ^= 1;
595 ++closes;
596 str += 2;
597 }
750bce0e 598
dc191a8f
NC
599 input_line_pointer = str;
600 expression (exp);
750bce0e 601
dc191a8f
NC
602 do
603 {
604 if (*input_line_pointer != ')')
605 {
606 as_bad (_("`)' required"));
607 break;
608 }
609 input_line_pointer++;
610 }
611 while (closes--);
612
613 return neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
614 }
615 }
616 }
750bce0e
NC
617
618 input_line_pointer = tmp;
619 expression (exp);
620
621 /* Warn about expressions that fail to use lo8 (). */
622 if (exp->X_op == O_constant)
623 {
624 int x = exp->X_add_number;
dc191a8f 625
750bce0e
NC
626 if (x < -255 || x > 255)
627 as_warn (_("constant out of 8-bit range: %d"), x);
628 }
dc191a8f
NC
629
630 return BFD_RELOC_AVR_LDI;
750bce0e
NC
631}
632
df136245 633/* Parse one instruction operand.
c6a7ab1f
NC
634 Return operand bitmask. Also fixups can be generated. */
635
adde6300 636static unsigned int
dc191a8f
NC
637avr_operand (struct avr_opcodes_s *opcode,
638 int where,
639 char *op,
640 char **line)
adde6300 641{
adde6300 642 expressionS op_expr;
df136245
DC
643 unsigned int op_mask = 0;
644 char *str = skip_space (*line);
adde6300 645
adde6300
AM
646 switch (*op)
647 {
648 /* Any register operand. */
649 case 'w':
650 case 'd':
651 case 'r':
b170af93
DC
652 case 'a':
653 case 'v':
c6a7ab1f
NC
654 if (*str == 'r' || *str == 'R')
655 {
656 char r_name[20];
1dab94dd 657
c6a7ab1f 658 str = extract_word (str, r_name, sizeof (r_name));
65b1d096 659 op_mask = 0xff;
3882b010 660 if (ISDIGIT (r_name[1]))
c6a7ab1f
NC
661 {
662 if (r_name[2] == '\0')
663 op_mask = r_name[1] - '0';
664 else if (r_name[1] != '0'
3882b010 665 && ISDIGIT (r_name[2])
c6a7ab1f
NC
666 && r_name[3] == '\0')
667 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
668 }
669 }
670 else
671 {
672 op_mask = avr_get_constant (str, 31);
673 str = input_line_pointer;
674 }
1dab94dd 675
c6a7ab1f
NC
676 if (op_mask <= 31)
677 {
678 switch (*op)
679 {
680 case 'a':
681 if (op_mask < 16 || op_mask > 23)
682 as_bad (_("register r16-r23 required"));
683 op_mask -= 16;
684 break;
1dab94dd 685
c6a7ab1f
NC
686 case 'd':
687 if (op_mask < 16)
688 as_bad (_("register number above 15 required"));
689 op_mask -= 16;
690 break;
1dab94dd 691
c6a7ab1f
NC
692 case 'v':
693 if (op_mask & 1)
694 as_bad (_("even register number required"));
695 op_mask >>= 1;
696 break;
1dab94dd 697
c6a7ab1f 698 case 'w':
65b1d096 699 if ((op_mask & 1) || op_mask < 24)
c6a7ab1f 700 as_bad (_("register r24, r26, r28 or r30 required"));
65b1d096 701 op_mask = (op_mask - 24) >> 1;
c6a7ab1f
NC
702 break;
703 }
704 break;
705 }
706 as_bad (_("register name or number from 0 to 31 required"));
adde6300
AM
707 break;
708
709 case 'e':
710 {
711 char c;
1dab94dd 712
adde6300
AM
713 if (*str == '-')
714 {
c6a7ab1f 715 str = skip_space (str + 1);
adde6300
AM
716 op_mask = 0x1002;
717 }
3882b010 718 c = TOLOWER (*str);
adde6300
AM
719 if (c == 'x')
720 op_mask |= 0x100c;
721 else if (c == 'y')
722 op_mask |= 0x8;
723 else if (c != 'z')
00d2865b 724 as_bad (_("pointer register (X, Y or Z) required"));
adde6300 725
c6a7ab1f 726 str = skip_space (str + 1);
adde6300
AM
727 if (*str == '+')
728 {
729 ++str;
730 if (op_mask & 2)
00d2865b 731 as_bad (_("cannot both predecrement and postincrement"));
adde6300
AM
732 op_mask |= 0x1001;
733 }
e38c9cc2 734
1188e082 735 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
e38c9cc2 736 registers, no predecrement, no postincrement. */
00d2865b
NC
737 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
738 && !(avr_mcu->isa & AVR_ISA_SRAM))
739 as_bad (_("addressing mode not supported"));
adde6300
AM
740 }
741 break;
742
b170af93 743 case 'z':
c6a7ab1f
NC
744 if (*str == '-')
745 as_bad (_("can't predecrement"));
1dab94dd 746
c6a7ab1f
NC
747 if (! (*str == 'z' || *str == 'Z'))
748 as_bad (_("pointer register Z required"));
1dab94dd 749
c6a7ab1f
NC
750 str = skip_space (str + 1);
751
752 if (*str == '+')
753 {
754 ++str;
755 op_mask |= 1;
756 }
b170af93
DC
757 break;
758
adde6300
AM
759 case 'b':
760 {
3882b010 761 char c = TOLOWER (*str++);
1dab94dd 762
adde6300
AM
763 if (c == 'y')
764 op_mask |= 0x8;
765 else if (c != 'z')
00d2865b 766 as_bad (_("pointer register (Y or Z) required"));
adde6300
AM
767 str = skip_space (str);
768 if (*str++ == '+')
769 {
750bce0e
NC
770 input_line_pointer = str;
771 avr_offset_expression (& op_expr);
adde6300 772 str = input_line_pointer;
750bce0e
NC
773 fix_new_exp (frag_now, where, 3,
774 &op_expr, FALSE, BFD_RELOC_AVR_6);
adde6300
AM
775 }
776 }
777 break;
778
779 case 'h':
c6a7ab1f
NC
780 str = parse_exp (str, &op_expr);
781 fix_new_exp (frag_now, where, opcode->insn_size * 2,
b34976b6 782 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
adde6300
AM
783 break;
784
785 case 'L':
c6a7ab1f
NC
786 str = parse_exp (str, &op_expr);
787 fix_new_exp (frag_now, where, opcode->insn_size * 2,
b34976b6 788 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
adde6300
AM
789 break;
790
791 case 'l':
c6a7ab1f
NC
792 str = parse_exp (str, &op_expr);
793 fix_new_exp (frag_now, where, opcode->insn_size * 2,
b34976b6 794 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
adde6300
AM
795 break;
796
797 case 'i':
c6a7ab1f
NC
798 str = parse_exp (str, &op_expr);
799 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
b34976b6 800 &op_expr, FALSE, BFD_RELOC_16);
adde6300
AM
801 break;
802
803 case 'M':
804 {
805 bfd_reloc_code_real_type r_type;
1dab94dd 806
c6a7ab1f
NC
807 input_line_pointer = str;
808 r_type = avr_ldi_expression (&op_expr);
809 str = input_line_pointer;
adde6300 810 fix_new_exp (frag_now, where, 3,
b34976b6 811 &op_expr, FALSE, r_type);
adde6300
AM
812 }
813 break;
814
815 case 'n':
816 {
817 unsigned int x;
1dab94dd 818
adde6300
AM
819 x = ~avr_get_constant (str, 255);
820 str = input_line_pointer;
821 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
822 }
823 break;
824
825 case 'K':
750bce0e
NC
826 input_line_pointer = str;
827 avr_offset_expression (& op_expr);
828 str = input_line_pointer;
829 fix_new_exp (frag_now, where, 3,
830 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
adde6300
AM
831 break;
832
833 case 'S':
834 case 's':
835 {
836 unsigned int x;
1dab94dd 837
adde6300
AM
838 x = avr_get_constant (str, 7);
839 str = input_line_pointer;
840 if (*op == 'S')
841 x <<= 4;
842 op_mask |= x;
843 }
844 break;
845
846 case 'P':
847 {
848 unsigned int x;
1dab94dd 849
adde6300
AM
850 x = avr_get_constant (str, 63);
851 str = input_line_pointer;
852 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
853 }
854 break;
855
856 case 'p':
857 {
858 unsigned int x;
1dab94dd 859
adde6300
AM
860 x = avr_get_constant (str, 31);
861 str = input_line_pointer;
862 op_mask |= x << 3;
863 }
864 break;
1dab94dd 865
1188e082
DC
866 case '?':
867 break;
1dab94dd 868
adde6300 869 default:
00d2865b 870 as_bad (_("unknown constraint `%c'"), *op);
adde6300 871 }
1dab94dd 872
adde6300
AM
873 *line = str;
874 return op_mask;
875}
876
dc191a8f
NC
877/* Parse instruction operands.
878 Return binary opcode. */
879
880static unsigned int
881avr_operands (struct avr_opcodes_s *opcode, char **line)
882{
883 char *op = opcode->constraints;
884 unsigned int bin = opcode->bin_opcode;
885 char *frag = frag_more (opcode->insn_size * 2);
886 char *str = *line;
887 int where = frag - frag_now->fr_literal;
888 static unsigned int prev = 0; /* Previous opcode. */
889
890 /* Opcode have operands. */
891 if (*op)
892 {
893 unsigned int reg1 = 0;
894 unsigned int reg2 = 0;
895 int reg1_present = 0;
896 int reg2_present = 0;
897
898 /* Parse first operand. */
899 if (REGISTER_P (*op))
900 reg1_present = 1;
901 reg1 = avr_operand (opcode, where, op, &str);
902 ++op;
903
904 /* Parse second operand. */
905 if (*op)
906 {
907 if (*op == ',')
908 ++op;
909
910 if (*op == '=')
911 {
912 reg2 = reg1;
913 reg2_present = 1;
914 }
915 else
916 {
917 if (REGISTER_P (*op))
918 reg2_present = 1;
919
920 str = skip_space (str);
921 if (*str++ != ',')
922 as_bad (_("`,' required"));
923 str = skip_space (str);
924
925 reg2 = avr_operand (opcode, where, op, &str);
926 }
927
928 if (reg1_present && reg2_present)
929 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
930 else if (reg2_present)
931 reg2 <<= 4;
932 }
933 if (reg1_present)
934 reg1 <<= 4;
935 bin |= reg1 | reg2;
936 }
937
938 /* Detect undefined combinations (like ld r31,Z+). */
939 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
940 as_warn (_("undefined combination of operands"));
941
942 if (opcode->insn_size == 2)
943 {
944 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
945 (AVR core bug, fixed in the newer devices). */
946 if (!(avr_opt.no_skip_bug ||
947 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
948 && AVR_SKIP_P (prev))
949 as_warn (_("skipping two-word instruction"));
950
951 bfd_putl32 ((bfd_vma) bin, frag);
952 }
953 else
954 bfd_putl16 ((bfd_vma) bin, frag);
955
956 prev = bin;
957 *line = str;
958 return bin;
959}
960
adde6300
AM
961/* GAS will call this function for each section at the end of the assembly,
962 to permit the CPU backend to adjust the alignment of a section. */
c6a7ab1f 963
adde6300 964valueT
dc191a8f 965md_section_align (asection *seg, valueT addr)
adde6300
AM
966{
967 int align = bfd_get_section_alignment (stdoutput, seg);
968 return ((addr + (1 << align) - 1) & (-1 << align));
969}
970
971/* If you define this macro, it should return the offset between the
972 address of a PC relative fixup and the position from which the PC
973 relative adjustment should be made. On many processors, the base
974 of a PC relative instruction is the next instruction, so this
975 macro would return the length of an instruction. */
c6a7ab1f 976
adde6300 977long
dc191a8f 978md_pcrel_from_section (fixS *fixp, segT sec)
adde6300 979{
c6a7ab1f 980 if (fixp->fx_addsy != (symbolS *) NULL
adde6300
AM
981 && (!S_IS_DEFINED (fixp->fx_addsy)
982 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
983 return 0;
1dab94dd 984
adde6300
AM
985 return fixp->fx_frag->fr_address + fixp->fx_where;
986}
987
988/* GAS will call this for each fixup. It should store the correct
c6a7ab1f
NC
989 value in the object file. */
990
94f592af 991void
dc191a8f 992md_apply_fix (fixS *fixP, valueT * valP, segT seg)
adde6300
AM
993{
994 unsigned char *where;
995 unsigned long insn;
a161fe53 996 long value = *valP;
adde6300 997
94f592af
NC
998 if (fixP->fx_addsy == (symbolS *) NULL)
999 fixP->fx_done = 1;
1000
87733541
AM
1001 else if (fixP->fx_pcrel)
1002 {
1003 segT s = S_GET_SEGMENT (fixP->fx_addsy);
1004
1005 if (s == seg || s == absolute_section)
1006 {
1007 value += S_GET_VALUE (fixP->fx_addsy);
1008 fixP->fx_done = 1;
1009 }
1010 }
1011
a161fe53
AM
1012 /* We don't actually support subtracting a symbol. */
1013 if (fixP->fx_subsy != (symbolS *) NULL)
1014 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1dab94dd 1015
94f592af 1016 switch (fixP->fx_r_type)
adde6300
AM
1017 {
1018 default:
94f592af 1019 fixP->fx_no_overflow = 1;
adde6300
AM
1020 break;
1021 case BFD_RELOC_AVR_7_PCREL:
1022 case BFD_RELOC_AVR_13_PCREL:
1023 case BFD_RELOC_32:
1024 case BFD_RELOC_16:
1025 case BFD_RELOC_AVR_CALL:
1026 break;
1027 }
1028
94f592af 1029 if (fixP->fx_done)
adde6300
AM
1030 {
1031 /* Fetch the instruction, insert the fully resolved operand
1032 value, and stuff the instruction back again. */
2132e3a3 1033 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
adde6300
AM
1034 insn = bfd_getl16 (where);
1035
94f592af 1036 switch (fixP->fx_r_type)
adde6300
AM
1037 {
1038 case BFD_RELOC_AVR_7_PCREL:
1039 if (value & 1)
94f592af 1040 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300 1041 _("odd address operand: %ld"), value);
1dab94dd 1042
adde6300
AM
1043 /* Instruction addresses are always right-shifted by 1. */
1044 value >>= 1;
1045 --value; /* Correct PC. */
1dab94dd 1046
adde6300 1047 if (value < -64 || value > 63)
94f592af 1048 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300
AM
1049 _("operand out of range: %ld"), value);
1050 value = (value << 3) & 0x3f8;
1051 bfd_putl16 ((bfd_vma) (value | insn), where);
1052 break;
1053
1054 case BFD_RELOC_AVR_13_PCREL:
1055 if (value & 1)
94f592af 1056 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300 1057 _("odd address operand: %ld"), value);
1dab94dd 1058
adde6300
AM
1059 /* Instruction addresses are always right-shifted by 1. */
1060 value >>= 1;
1061 --value; /* Correct PC. */
adde6300
AM
1062
1063 if (value < -2048 || value > 2047)
1064 {
65aa24b6 1065 /* No wrap for devices with >8K of program memory. */
00d2865b 1066 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
94f592af 1067 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300
AM
1068 _("operand out of range: %ld"), value);
1069 }
1070
1071 value &= 0xfff;
1072 bfd_putl16 ((bfd_vma) (value | insn), where);
1073 break;
1074
1075 case BFD_RELOC_32:
1076 bfd_putl16 ((bfd_vma) value, where);
1077 break;
1078
1079 case BFD_RELOC_16:
1080 bfd_putl16 ((bfd_vma) value, where);
1081 break;
1082
1083 case BFD_RELOC_AVR_16_PM:
c6a7ab1f 1084 bfd_putl16 ((bfd_vma) (value >> 1), where);
adde6300
AM
1085 break;
1086
750bce0e
NC
1087 case BFD_RELOC_AVR_LDI:
1088 if (value > 255)
1089 as_bad_where (fixP->fx_file, fixP->fx_line,
1090 _("operand out of range: %ld"), value);
1091 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1092 break;
1093
1094 case BFD_RELOC_AVR_6:
1095 if ((value > 63) || (value < 0))
1096 as_bad_where (fixP->fx_file, fixP->fx_line,
1097 _("operand out of range: %ld"), value);
1098 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1099 break;
1100
1101 case BFD_RELOC_AVR_6_ADIW:
1102 if ((value > 63) || (value < 0))
1103 as_bad_where (fixP->fx_file, fixP->fx_line,
1104 _("operand out of range: %ld"), value);
1105 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1106 break;
1107
adde6300
AM
1108 case BFD_RELOC_AVR_LO8_LDI:
1109 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1110 break;
1111
adde6300
AM
1112 case BFD_RELOC_AVR_HI8_LDI:
1113 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1114 break;
1115
df406460 1116 case BFD_RELOC_AVR_MS8_LDI:
adde6300
AM
1117 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1118 break;
1119
1120 case BFD_RELOC_AVR_HH8_LDI:
1121 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1122 break;
1123
1124 case BFD_RELOC_AVR_LO8_LDI_NEG:
1125 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1126 break;
1127
adde6300
AM
1128 case BFD_RELOC_AVR_HI8_LDI_NEG:
1129 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1130 break;
1131
df406460 1132 case BFD_RELOC_AVR_MS8_LDI_NEG:
adde6300
AM
1133 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1134 break;
1135
1136 case BFD_RELOC_AVR_HH8_LDI_NEG:
1137 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1138 break;
1139
1140 case BFD_RELOC_AVR_LO8_LDI_PM:
1141 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1142 break;
1143
1144 case BFD_RELOC_AVR_HI8_LDI_PM:
1145 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1146 break;
1147
1148 case BFD_RELOC_AVR_HH8_LDI_PM:
1149 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1150 break;
1151
1152 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1153 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1154 break;
1155
1156 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1157 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1158 break;
1159
1160 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1161 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1162 break;
1163
1164 case BFD_RELOC_AVR_CALL:
1165 {
1166 unsigned long x;
1dab94dd 1167
adde6300
AM
1168 x = bfd_getl16 (where);
1169 if (value & 1)
94f592af 1170 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300
AM
1171 _("odd address operand: %ld"), value);
1172 value >>= 1;
1173 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1174 bfd_putl16 ((bfd_vma) x, where);
c6a7ab1f 1175 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
adde6300
AM
1176 }
1177 break;
1178
1179 default:
c6a7ab1f 1180 as_fatal (_("line %d: unknown relocation type: 0x%x"),
94f592af 1181 fixP->fx_line, fixP->fx_r_type);
adde6300
AM
1182 break;
1183 }
1184 }
1185 else
1186 {
94f592af 1187 switch (fixP->fx_r_type)
adde6300
AM
1188 {
1189 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1190 case -BFD_RELOC_AVR_HI8_LDI:
1191 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1192 case -BFD_RELOC_AVR_LO8_LDI:
94f592af 1193 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300 1194 _("only constant expression allowed"));
94f592af 1195 fixP->fx_done = 1;
adde6300
AM
1196 break;
1197 default:
1198 break;
1199 }
adde6300 1200 }
adde6300
AM
1201}
1202
7be1c489
AM
1203/* GAS will call this to generate a reloc, passing the resulting reloc
1204 to `bfd_install_relocation'. This currently works poorly, as
1205 `bfd_install_relocation' often does the wrong thing, and instances of
1206 `tc_gen_reloc' have been written to work around the problems, which
1207 in turns makes it difficult to fix `bfd_install_relocation'. */
adde6300
AM
1208
1209/* If while processing a fixup, a reloc really needs to be created
1210 then it is done here. */
1211
1212arelent *
dc191a8f
NC
1213tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1214 fixS *fixp)
adde6300
AM
1215{
1216 arelent *reloc;
1217
df406460
NC
1218 if (fixp->fx_addsy && fixp->fx_subsy)
1219 {
1220 long value = 0;
1221
1222 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1223 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1224 {
1225 as_bad_where (fixp->fx_file, fixp->fx_line,
1226 "Difference of symbols in different sections is not supported");
1227 return NULL;
1228 }
1229
1230 /* We are dealing with two symbols defined in the same section.
1231 Let us fix-up them here. */
1232 value += S_GET_VALUE (fixp->fx_addsy);
1233 value -= S_GET_VALUE (fixp->fx_subsy);
1234
1235 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1236 only takes it's second operands for the fixup value. */
1237 fixp->fx_addsy = NULL;
1238 fixp->fx_subsy = NULL;
1239 md_apply_fix (fixp, (valueT *) &value, NULL);
1240
1241 return NULL;
1242 }
1243
dc191a8f 1244 reloc = xmalloc (sizeof (arelent));
adde6300 1245
dc191a8f 1246 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
adde6300
AM
1247 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1248
1249 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1250 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1251 if (reloc->howto == (reloc_howto_type *) NULL)
1252 {
1253 as_bad_where (fixp->fx_file, fixp->fx_line,
c6a7ab1f
NC
1254 _("reloc %d not supported by object file format"),
1255 (int) fixp->fx_r_type);
adde6300
AM
1256 return NULL;
1257 }
1258
1259 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1260 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1261 reloc->address = fixp->fx_offset;
1262
1263 reloc->addend = fixp->fx_offset;
1264
1265 return reloc;
1266}
1267
adde6300 1268void
dc191a8f 1269md_assemble (char *str)
adde6300 1270{
c6a7ab1f 1271 struct avr_opcodes_s *opcode;
adde6300
AM
1272 char op[11];
1273
c6a7ab1f 1274 str = skip_space (extract_word (str, op, sizeof (op)));
adde6300
AM
1275
1276 if (!op[0])
00d2865b 1277 as_bad (_("can't find opcode "));
adde6300
AM
1278
1279 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1280
1281 if (opcode == NULL)
1282 {
00d2865b 1283 as_bad (_("unknown opcode `%s'"), op);
adde6300
AM
1284 return;
1285 }
1286
b170af93 1287 /* Special case for opcodes with optional operands (lpm, elpm) -
1188e082 1288 version with operands exists in avr_opcodes[] in the next entry. */
c6a7ab1f 1289
1188e082
DC
1290 if (*str && *opcode->constraints == '?')
1291 ++opcode;
b170af93 1292
00d2865b
NC
1293 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1294 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
adde6300
AM
1295
1296 /* We used to set input_line_pointer to the result of get_operands,
1297 but that is wrong. Our caller assumes we don't change it. */
1298 {
1299 char *t = input_line_pointer;
dc191a8f 1300
adde6300 1301 avr_operands (opcode, &str);
b170af93 1302 if (*skip_space (str))
00d2865b 1303 as_bad (_("garbage at end of line"));
adde6300
AM
1304 input_line_pointer = t;
1305 }
1306}
1307
adde6300 1308/* Flag to pass `pm' mode between `avr_parse_cons_expression' and
c6a7ab1f 1309 `avr_cons_fix_new'. */
adde6300
AM
1310static int exp_mod_pm = 0;
1311
1312/* Parse special CONS expression: pm (expression)
1313 which is used for addressing to a program memory.
c6a7ab1f
NC
1314 Relocation: BFD_RELOC_AVR_16_PM. */
1315
adde6300 1316void
dc191a8f 1317avr_parse_cons_expression (expressionS *exp, int nbytes)
adde6300 1318{
c6a7ab1f 1319 char *tmp;
adde6300
AM
1320
1321 exp_mod_pm = 0;
1322
1323 tmp = input_line_pointer = skip_space (input_line_pointer);
1324
1325 if (nbytes == 2)
1326 {
c6a7ab1f 1327 char *pm_name = "pm";
adde6300 1328 int len = strlen (pm_name);
1dab94dd 1329
adde6300
AM
1330 if (strncasecmp (input_line_pointer, pm_name, len) == 0)
1331 {
1332 input_line_pointer = skip_space (input_line_pointer + len);
1dab94dd 1333
adde6300
AM
1334 if (*input_line_pointer == '(')
1335 {
1336 input_line_pointer = skip_space (input_line_pointer + 1);
1337 exp_mod_pm = 1;
1338 expression (exp);
1dab94dd 1339
adde6300
AM
1340 if (*input_line_pointer == ')')
1341 ++input_line_pointer;
1342 else
1343 {
00d2865b 1344 as_bad (_("`)' required"));
adde6300
AM
1345 exp_mod_pm = 0;
1346 }
1dab94dd 1347
adde6300
AM
1348 return;
1349 }
1dab94dd 1350
adde6300
AM
1351 input_line_pointer = tmp;
1352 }
1353 }
1dab94dd 1354
adde6300
AM
1355 expression (exp);
1356}
1357
1358void
dc191a8f
NC
1359avr_cons_fix_new (fragS *frag,
1360 int where,
1361 int nbytes,
1362 expressionS *exp)
adde6300
AM
1363{
1364 if (exp_mod_pm == 0)
1365 {
1366 if (nbytes == 2)
b34976b6 1367 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
adde6300 1368 else if (nbytes == 4)
b34976b6 1369 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
adde6300 1370 else
00d2865b 1371 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
adde6300
AM
1372 }
1373 else
1374 {
1375 if (nbytes == 2)
b34976b6 1376 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
adde6300 1377 else
00d2865b 1378 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);
adde6300
AM
1379 exp_mod_pm = 0;
1380 }
1381}