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1d506c26 1/* Copyright (C) 2009-2024 Free Software Foundation, Inc.
d0761299
JB
2
3 This file is part of GDB.
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program. If not, see <http://www.gnu.org/licenses/>. */
17
18#include "defs.h"
4de283e4 19#include "osabi.h"
d0761299 20#include "amd64-tdep.h"
268a13a5 21#include "gdbsupport/x86-xstate.h"
d55e5aa6 22#include "gdbtypes.h"
4de283e4 23#include "gdbcore.h"
d55e5aa6 24#include "regcache.h"
d55e5aa6 25#include "windows-tdep.h"
4de283e4
TT
26#include "frame.h"
27#include "objfiles.h"
28#include "frame-unwind.h"
29#include "coff/internal.h"
30#include "coff/i386.h"
31#include "coff/pe.h"
32#include "libcoff.h"
33#include "value.h"
34#include <algorithm>
ba581dc1
JB
35
36/* The registers used to pass integer arguments during a function call. */
37static int amd64_windows_dummy_call_integer_regs[] =
38{
39 AMD64_RCX_REGNUM, /* %rcx */
40 AMD64_RDX_REGNUM, /* %rdx */
5b856f36
PM
41 AMD64_R8_REGNUM, /* %r8 */
42 AMD64_R9_REGNUM /* %r9 */
ba581dc1
JB
43};
44
aff9d387
JT
45/* This vector maps GDB's idea of a register's number into an offset into
46 the Windows API CONTEXT structure. */
47static int amd64_windows_gregset_reg_offset[] =
48{
49 120, /* Rax */
50 144, /* Rbx */
51 128, /* Rcx */
52 136, /* Rdx */
53 168, /* Rsi */
54 176, /* Rdi */
55 160, /* Rbp */
56 152, /* Rsp */
57 184, /* R8 */
58 192, /* R9 */
59 200, /* R10 */
60 208, /* R11 */
61 216, /* R12 */
62 224, /* R13 */
63 232, /* R14 */
64 240, /* R15 */
65 248, /* Rip */
66 68, /* EFlags */
67 56, /* SegCs */
68 66, /* SegSs */
69 58, /* SegDs */
70 60, /* SegEs */
71 62, /* SegFs */
72 64, /* SegGs */
73 288, /* FloatSave.FloatRegisters[0] */
74 304, /* FloatSave.FloatRegisters[1] */
75 320, /* FloatSave.FloatRegisters[2] */
76 336, /* FloatSave.FloatRegisters[3] */
77 352, /* FloatSave.FloatRegisters[4] */
78 368, /* FloatSave.FloatRegisters[5] */
79 384, /* FloatSave.FloatRegisters[6] */
80 400, /* FloatSave.FloatRegisters[7] */
81 256, /* FloatSave.ControlWord */
82 258, /* FloatSave.StatusWord */
83 260, /* FloatSave.TagWord */
84 268, /* FloatSave.ErrorSelector */
85 264, /* FloatSave.ErrorOffset */
86 276, /* FloatSave.DataSelector */
87 272, /* FloatSave.DataOffset */
88 268, /* FloatSave.ErrorSelector */
89 416, /* Xmm0 */
90 432, /* Xmm1 */
91 448, /* Xmm2 */
92 464, /* Xmm3 */
93 480, /* Xmm4 */
94 496, /* Xmm5 */
95 512, /* Xmm6 */
96 528, /* Xmm7 */
97 544, /* Xmm8 */
98 560, /* Xmm9 */
99 576, /* Xmm10 */
100 592, /* Xmm11 */
101 608, /* Xmm12 */
102 624, /* Xmm13 */
103 640, /* Xmm14 */
104 656, /* Xmm15 */
105 280, /* FloatSave.MxCsr */
106};
107
7d155da3
JT
108#define AMD64_WINDOWS_SIZEOF_GREGSET 1232
109
20c2e3e0
JB
110/* Return nonzero if an argument of type TYPE should be passed
111 via one of the integer registers. */
ba581dc1 112
20c2e3e0
JB
113static int
114amd64_windows_passed_by_integer_register (struct type *type)
ba581dc1 115{
78134374 116 switch (type->code ())
ba581dc1 117 {
20c2e3e0
JB
118 case TYPE_CODE_INT:
119 case TYPE_CODE_ENUM:
120 case TYPE_CODE_BOOL:
121 case TYPE_CODE_RANGE:
122 case TYPE_CODE_CHAR:
123 case TYPE_CODE_PTR:
124 case TYPE_CODE_REF:
aa006118 125 case TYPE_CODE_RVALUE_REF:
ba581dc1
JB
126 case TYPE_CODE_STRUCT:
127 case TYPE_CODE_UNION:
cd096ec8 128 case TYPE_CODE_COMPLEX:
df86565b
SM
129 return (type->length () == 1
130 || type->length () == 2
131 || type->length () == 4
132 || type->length () == 8);
ba581dc1
JB
133
134 default:
20c2e3e0 135 return 0;
ba581dc1
JB
136 }
137}
d0761299 138
20c2e3e0
JB
139/* Return nonzero if an argument of type TYPE should be passed
140 via one of the XMM registers. */
141
142static int
143amd64_windows_passed_by_xmm_register (struct type *type)
144{
78134374
SM
145 return ((type->code () == TYPE_CODE_FLT
146 || type->code () == TYPE_CODE_DECFLOAT)
df86565b 147 && (type->length () == 4 || type->length () == 8));
20c2e3e0
JB
148}
149
150/* Return non-zero iff an argument of the given TYPE should be passed
151 by pointer. */
152
153static int
154amd64_windows_passed_by_pointer (struct type *type)
155{
156 if (amd64_windows_passed_by_integer_register (type))
157 return 0;
158
159 if (amd64_windows_passed_by_xmm_register (type))
160 return 0;
161
162 return 1;
163}
164
165/* For each argument that should be passed by pointer, reserve some
166 stack space, store a copy of the argument on the stack, and replace
167 the argument by its address. Return the new Stack Pointer value.
168
169 NARGS is the number of arguments. ARGS is the array containing
170 the value of each argument. SP is value of the Stack Pointer. */
171
172static CORE_ADDR
173amd64_windows_adjust_args_passed_by_pointer (struct value **args,
174 int nargs, CORE_ADDR sp)
175{
176 int i;
177
178 for (i = 0; i < nargs; i++)
d0c97917 179 if (amd64_windows_passed_by_pointer (args[i]->type ()))
20c2e3e0 180 {
d0c97917 181 struct type *type = args[i]->type ();
efaf1ae0 182 const gdb_byte *valbuf = args[i]->contents ().data ();
df86565b 183 const int len = type->length ();
20c2e3e0
JB
184
185 /* Store a copy of that argument on the stack, aligned to
186 a 16 bytes boundary, and then use the copy's address as
187 the argument. */
188
189 sp -= len;
190 sp &= ~0xf;
191 write_memory (sp, valbuf, len);
192
193 args[i]
194 = value_addr (value_from_contents_and_address (type, valbuf, sp));
195 }
196
197 return sp;
198}
199
200/* Store the value of ARG in register REGNO (right-justified).
201 REGCACHE is the register cache. */
202
203static void
204amd64_windows_store_arg_in_reg (struct regcache *regcache,
205 struct value *arg, int regno)
206{
d0c97917 207 struct type *type = arg->type ();
efaf1ae0 208 const gdb_byte *valbuf = arg->contents ().data ();
20c2e3e0
JB
209 gdb_byte buf[8];
210
df86565b 211 gdb_assert (type->length () <= 8);
20c2e3e0 212 memset (buf, 0, sizeof buf);
df86565b 213 memcpy (buf, valbuf, std::min (type->length (), (ULONGEST) 8));
b66f5587 214 regcache->cooked_write (regno, buf);
20c2e3e0
JB
215}
216
217/* Push the arguments for an inferior function call, and return
218 the updated value of the SP (Stack Pointer).
219
220 All arguments are identical to the arguments used in
221 amd64_windows_push_dummy_call. */
222
223static CORE_ADDR
224amd64_windows_push_arguments (struct regcache *regcache, int nargs,
225 struct value **args, CORE_ADDR sp,
cf84fa6b 226 function_call_return_method return_method)
20c2e3e0
JB
227{
228 int reg_idx = 0;
229 int i;
8d749320 230 struct value **stack_args = XALLOCAVEC (struct value *, nargs);
20c2e3e0
JB
231 int num_stack_args = 0;
232 int num_elements = 0;
233 int element = 0;
234
235 /* First, handle the arguments passed by pointer.
236
237 These arguments are replaced by pointers to a copy we are making
238 in inferior memory. So use a copy of the ARGS table, to avoid
239 modifying the original one. */
240 {
8d749320 241 struct value **args1 = XALLOCAVEC (struct value *, nargs);
20c2e3e0
JB
242
243 memcpy (args1, args, nargs * sizeof (struct value *));
244 sp = amd64_windows_adjust_args_passed_by_pointer (args1, nargs, sp);
245 args = args1;
246 }
247
248 /* Reserve a register for the "hidden" argument. */
cf84fa6b 249 if (return_method == return_method_struct)
20c2e3e0
JB
250 reg_idx++;
251
252 for (i = 0; i < nargs; i++)
253 {
d0c97917 254 struct type *type = args[i]->type ();
df86565b 255 int len = type->length ();
20c2e3e0
JB
256 int on_stack_p = 1;
257
258 if (reg_idx < ARRAY_SIZE (amd64_windows_dummy_call_integer_regs))
259 {
260 if (amd64_windows_passed_by_integer_register (type))
261 {
262 amd64_windows_store_arg_in_reg
263 (regcache, args[i],
264 amd64_windows_dummy_call_integer_regs[reg_idx]);
265 on_stack_p = 0;
266 reg_idx++;
267 }
268 else if (amd64_windows_passed_by_xmm_register (type))
269 {
270 amd64_windows_store_arg_in_reg
dda83cd7 271 (regcache, args[i], AMD64_XMM0_REGNUM + reg_idx);
20c2e3e0
JB
272 /* In case of varargs, these parameters must also be
273 passed via the integer registers. */
274 amd64_windows_store_arg_in_reg
275 (regcache, args[i],
276 amd64_windows_dummy_call_integer_regs[reg_idx]);
277 on_stack_p = 0;
278 reg_idx++;
279 }
280 }
281
282 if (on_stack_p)
283 {
284 num_elements += ((len + 7) / 8);
285 stack_args[num_stack_args++] = args[i];
286 }
287 }
288
289 /* Allocate space for the arguments on the stack, keeping it
290 aligned on a 16 byte boundary. */
291 sp -= num_elements * 8;
292 sp &= ~0xf;
293
294 /* Write out the arguments to the stack. */
295 for (i = 0; i < num_stack_args; i++)
296 {
d0c97917 297 struct type *type = stack_args[i]->type ();
efaf1ae0 298 const gdb_byte *valbuf = stack_args[i]->contents ().data ();
20c2e3e0 299
df86565b
SM
300 write_memory (sp + element * 8, valbuf, type->length ());
301 element += ((type->length () + 7) / 8);
20c2e3e0
JB
302 }
303
304 return sp;
305}
306
307/* Implement the "push_dummy_call" gdbarch method. */
308
309static CORE_ADDR
310amd64_windows_push_dummy_call
311 (struct gdbarch *gdbarch, struct value *function,
312 struct regcache *regcache, CORE_ADDR bp_addr,
cf84fa6b
AH
313 int nargs, struct value **args, CORE_ADDR sp,
314 function_call_return_method return_method, CORE_ADDR struct_addr)
20c2e3e0
JB
315{
316 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
317 gdb_byte buf[8];
318
319 /* Pass arguments. */
320 sp = amd64_windows_push_arguments (regcache, nargs, args, sp,
cf84fa6b 321 return_method);
20c2e3e0
JB
322
323 /* Pass "hidden" argument". */
cf84fa6b 324 if (return_method == return_method_struct)
20c2e3e0
JB
325 {
326 /* The "hidden" argument is passed throught the first argument
dda83cd7 327 register. */
20c2e3e0
JB
328 const int arg_regnum = amd64_windows_dummy_call_integer_regs[0];
329
330 store_unsigned_integer (buf, 8, byte_order, struct_addr);
b66f5587 331 regcache->cooked_write (arg_regnum, buf);
20c2e3e0
JB
332 }
333
334 /* Reserve some memory on the stack for the integer-parameter
335 registers, as required by the ABI. */
336 sp -= ARRAY_SIZE (amd64_windows_dummy_call_integer_regs) * 8;
337
338 /* Store return address. */
339 sp -= 8;
340 store_unsigned_integer (buf, 8, byte_order, bp_addr);
341 write_memory (sp, buf, 8);
342
343 /* Update the stack pointer... */
344 store_unsigned_integer (buf, 8, byte_order, sp);
b66f5587 345 regcache->cooked_write (AMD64_RSP_REGNUM, buf);
20c2e3e0
JB
346
347 /* ...and fake a frame pointer. */
b66f5587 348 regcache->cooked_write (AMD64_RBP_REGNUM, buf);
20c2e3e0
JB
349
350 return sp + 16;
351}
352
cba6fab5
JB
353/* Implement the "return_value" gdbarch method for amd64-windows. */
354
355static enum return_value_convention
6a3a010b 356amd64_windows_return_value (struct gdbarch *gdbarch, struct value *function,
cba6fab5 357 struct type *type, struct regcache *regcache,
5cb0f2d5 358 struct value **read_value, const gdb_byte *writebuf)
cba6fab5 359{
df86565b 360 int len = type->length ();
cba6fab5
JB
361 int regnum = -1;
362
363 /* See if our value is returned through a register. If it is, then
364 store the associated register number in REGNUM. */
78134374 365 switch (type->code ())
cba6fab5
JB
366 {
367 case TYPE_CODE_FLT:
cd096ec8
HD
368 /* floats, and doubles are returned via XMM0. */
369 if (len == 4 || len == 8)
dda83cd7
SM
370 regnum = AMD64_XMM0_REGNUM;
371 break;
cd096ec8
HD
372 case TYPE_CODE_ARRAY:
373 /* __m128, __m128i and __m128d are returned via XMM0. */
a1d217e8 374 if (type->is_vector () && len == 16)
cd096ec8 375 {
27710edb 376 enum type_code code = type->target_type ()->code ();
cd096ec8
HD
377 if (code == TYPE_CODE_INT || code == TYPE_CODE_FLT)
378 {
379 regnum = AMD64_XMM0_REGNUM;
380 break;
381 }
382 }
d182e398 383 [[fallthrough]];
cba6fab5 384 default:
dda83cd7
SM
385 /* All other values that are 1, 2, 4 or 8 bytes long are returned
386 via RAX. */
387 if (len == 1 || len == 2 || len == 4 || len == 8)
388 regnum = AMD64_RAX_REGNUM;
cd096ec8
HD
389 else if (len == 16 && type->code () == TYPE_CODE_INT)
390 regnum = AMD64_XMM0_REGNUM;
dda83cd7 391 break;
cba6fab5
JB
392 }
393
394 if (regnum < 0)
395 {
396 /* RAX contains the address where the return value has been stored. */
911627e7 397 if (read_value != nullptr)
dda83cd7 398 {
cba6fab5
JB
399 ULONGEST addr;
400
401 regcache_raw_read_unsigned (regcache, AMD64_RAX_REGNUM, &addr);
911627e7 402 *read_value = value_at_non_lval (type, addr);
cba6fab5
JB
403 }
404 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
405 }
406 else
407 {
408 /* Extract the return value from the register where it was stored. */
911627e7
TT
409 if (read_value != nullptr)
410 {
317c3ed9 411 *read_value = value::allocate (type);
911627e7 412 regcache->raw_read_part (regnum, 0, len,
bbe912ba 413 (*read_value)->contents_raw ().data ());
911627e7 414 }
cba6fab5 415 if (writebuf)
4f0420fd 416 regcache->raw_write_part (regnum, 0, len, writebuf);
cba6fab5
JB
417 return RETURN_VALUE_REGISTER_CONVENTION;
418 }
419}
420
99e24b90
PM
421/* Check that the code pointed to by PC corresponds to a call to
422 __main, skip it if so. Return PC otherwise. */
423
424static CORE_ADDR
425amd64_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
426{
427 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
428 gdb_byte op;
429
430 target_read_memory (pc, &op, 1);
431 if (op == 0xe8)
432 {
433 gdb_byte buf[4];
434
435 if (target_read_memory (pc + 1, buf, sizeof buf) == 0)
24b21115
SM
436 {
437 struct bound_minimal_symbol s;
438 CORE_ADDR call_dest;
99e24b90
PM
439
440 call_dest = pc + 5 + extract_signed_integer (buf, 4, byte_order);
24b21115
SM
441 s = lookup_minimal_symbol_by_pc (call_dest);
442 if (s.minsym != NULL
443 && s.minsym->linkage_name () != NULL
444 && strcmp (s.minsym->linkage_name (), "__main") == 0)
445 pc += 5;
446 }
99e24b90
PM
447 }
448
449 return pc;
450}
451
9058cc3a
TG
452struct amd64_windows_frame_cache
453{
454 /* ImageBase for the module. */
455 CORE_ADDR image_base;
456
457 /* Function start and end rva. */
458 CORE_ADDR start_rva;
459 CORE_ADDR end_rva;
460
461 /* Next instruction to be executed. */
462 CORE_ADDR pc;
463
464 /* Current sp. */
465 CORE_ADDR sp;
466
467 /* Address of saved integer and xmm registers. */
468 CORE_ADDR prev_reg_addr[16];
469 CORE_ADDR prev_xmm_addr[16];
470
471 /* These two next fields are set only for machine info frames. */
472
473 /* Likewise for RIP. */
474 CORE_ADDR prev_rip_addr;
475
476 /* Likewise for RSP. */
477 CORE_ADDR prev_rsp_addr;
478
479 /* Address of the previous frame. */
480 CORE_ADDR prev_sp;
481};
482
483/* Convert a Windows register number to gdb. */
484static const enum amd64_regnum amd64_windows_w2gdb_regnum[] =
485{
486 AMD64_RAX_REGNUM,
487 AMD64_RCX_REGNUM,
488 AMD64_RDX_REGNUM,
489 AMD64_RBX_REGNUM,
490 AMD64_RSP_REGNUM,
491 AMD64_RBP_REGNUM,
492 AMD64_RSI_REGNUM,
493 AMD64_RDI_REGNUM,
494 AMD64_R8_REGNUM,
495 AMD64_R9_REGNUM,
496 AMD64_R10_REGNUM,
497 AMD64_R11_REGNUM,
498 AMD64_R12_REGNUM,
499 AMD64_R13_REGNUM,
500 AMD64_R14_REGNUM,
501 AMD64_R15_REGNUM
502};
503
6471e7d2 504/* Return TRUE iff PC is the range of the function corresponding to
9058cc3a
TG
505 CACHE. */
506
507static int
508pc_in_range (CORE_ADDR pc, const struct amd64_windows_frame_cache *cache)
509{
510 return (pc >= cache->image_base + cache->start_rva
511 && pc < cache->image_base + cache->end_rva);
512}
513
514/* Try to recognize and decode an epilogue sequence.
515
516 Return -1 if we fail to read the instructions for any reason.
517 Return 1 if an epilogue sequence was recognized, 0 otherwise. */
518
519static int
8480a37e 520amd64_windows_frame_decode_epilogue (const frame_info_ptr &this_frame,
9058cc3a
TG
521 struct amd64_windows_frame_cache *cache)
522{
523 /* According to MSDN an epilogue "must consist of either an add RSP,constant
524 or lea RSP,constant[FPReg], followed by a series of zero or more 8-byte
525 register pops and a return or a jmp".
526
527 Furthermore, according to RtlVirtualUnwind, the complete list of
528 epilog marker is:
529 - ret [c3]
530 - ret n [c2 imm16]
531 - rep ret [f3 c3]
532 - jmp imm8 | imm32 [eb rel8] or [e9 rel32]
533 - jmp qword ptr imm32 - not handled
534 - rex.w jmp reg [4X ff eY]
535 */
536
537 CORE_ADDR pc = cache->pc;
538 CORE_ADDR cur_sp = cache->sp;
539 struct gdbarch *gdbarch = get_frame_arch (this_frame);
540 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
541 gdb_byte op;
542 gdb_byte rex;
543
544 /* We don't care about the instruction deallocating the frame:
545 if it hasn't been executed, the pc is still in the body,
546 if it has been executed, the following epilog decoding will work. */
547
548 /* First decode:
549 - pop reg [41 58-5f] or [58-5f]. */
550
551 while (1)
552 {
553 /* Read opcode. */
554 if (target_read_memory (pc, &op, 1) != 0)
555 return -1;
556
557 if (op >= 0x40 && op <= 0x4f)
558 {
559 /* REX prefix. */
560 rex = op;
561
562 /* Read opcode. */
563 if (target_read_memory (pc + 1, &op, 1) != 0)
564 return -1;
565 }
566 else
567 rex = 0;
568
569 if (op >= 0x58 && op <= 0x5f)
570 {
571 /* pop reg */
572 gdb_byte reg = (op & 0x0f) | ((rex & 1) << 3);
573
574 cache->prev_reg_addr[amd64_windows_w2gdb_regnum[reg]] = cur_sp;
575 cur_sp += 8;
a6a20ad7 576 pc += rex ? 2 : 1;
9058cc3a
TG
577 }
578 else
579 break;
580
581 /* Allow the user to break this loop. This shouldn't happen as the
582 number of consecutive pop should be small. */
583 QUIT;
584 }
585
586 /* Then decode the marker. */
587
588 /* Read opcode. */
589 if (target_read_memory (pc, &op, 1) != 0)
590 return -1;
591
592 switch (op)
593 {
594 case 0xc3:
595 /* Ret. */
596 cache->prev_rip_addr = cur_sp;
597 cache->prev_sp = cur_sp + 8;
598 return 1;
599
600 case 0xeb:
601 {
602 /* jmp rel8 */
603 gdb_byte rel8;
604 CORE_ADDR npc;
605
606 if (target_read_memory (pc + 1, &rel8, 1) != 0)
607 return -1;
608 npc = pc + 2 + (signed char) rel8;
609
610 /* If the jump is within the function, then this is not a marker,
611 otherwise this is a tail-call. */
612 return !pc_in_range (npc, cache);
613 }
614
615 case 0xec:
616 {
617 /* jmp rel32 */
618 gdb_byte rel32[4];
619 CORE_ADDR npc;
620
621 if (target_read_memory (pc + 1, rel32, 4) != 0)
622 return -1;
623 npc = pc + 5 + extract_signed_integer (rel32, 4, byte_order);
624
625 /* If the jump is within the function, then this is not a marker,
626 otherwise this is a tail-call. */
627 return !pc_in_range (npc, cache);
628 }
629
630 case 0xc2:
631 {
632 /* ret n */
633 gdb_byte imm16[2];
634
635 if (target_read_memory (pc + 1, imm16, 2) != 0)
636 return -1;
637 cache->prev_rip_addr = cur_sp;
638 cache->prev_sp = cur_sp
639 + extract_unsigned_integer (imm16, 4, byte_order);
640 return 1;
641 }
642
643 case 0xf3:
644 {
645 /* rep; ret */
646 gdb_byte op1;
647
648 if (target_read_memory (pc + 2, &op1, 1) != 0)
649 return -1;
650 if (op1 != 0xc3)
651 return 0;
652
653 cache->prev_rip_addr = cur_sp;
654 cache->prev_sp = cur_sp + 8;
655 return 1;
656 }
657
658 case 0x40:
659 case 0x41:
660 case 0x42:
661 case 0x43:
662 case 0x44:
663 case 0x45:
664 case 0x46:
665 case 0x47:
666 case 0x48:
667 case 0x49:
668 case 0x4a:
669 case 0x4b:
670 case 0x4c:
671 case 0x4d:
672 case 0x4e:
673 case 0x4f:
674 /* Got a REX prefix, read next byte. */
675 rex = op;
676 if (target_read_memory (pc + 1, &op, 1) != 0)
677 return -1;
678
679 if (op == 0xff)
680 {
681 /* rex jmp reg */
682 gdb_byte op1;
9058cc3a
TG
683
684 if (target_read_memory (pc + 2, &op1, 1) != 0)
685 return -1;
686 return (op1 & 0xf8) == 0xe0;
687 }
688 else
689 return 0;
690
691 default:
692 /* Not REX, so unknown. */
693 return 0;
694 }
695}
696
697/* Decode and execute unwind insns at UNWIND_INFO. */
698
699static void
8480a37e 700amd64_windows_frame_decode_insns (const frame_info_ptr &this_frame,
9058cc3a
TG
701 struct amd64_windows_frame_cache *cache,
702 CORE_ADDR unwind_info)
703{
704 CORE_ADDR save_addr = 0;
705 CORE_ADDR cur_sp = cache->sp;
706 struct gdbarch *gdbarch = get_frame_arch (this_frame);
707 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
670f82d4
TG
708 int first = 1;
709
710 /* There are at least 3 possibilities to share an unwind info entry:
711 1. Two different runtime_function entries (in .pdata) can point to the
712 same unwind info entry. There is no such indication while unwinding,
713 so we don't really care about that case. We suppose this scheme is
714 used to save memory when the unwind entries are exactly the same.
715 2. Chained unwind_info entries, with no unwind codes (no prologue).
716 There is a major difference with the previous case: the pc range for
717 the function is different (in case 1, the pc range comes from the
718 runtime_function entry; in case 2, the pc range for the chained entry
719 comes from the first unwind entry). Case 1 cannot be used instead as
720 the pc is not in the prologue. This case is officially documented.
721 (There might be unwind code in the first unwind entry to handle
722 additional unwinding). GCC (at least until gcc 5.0) doesn't chain
723 entries.
724 3. Undocumented unwind info redirection. Hard to know the exact purpose,
725 so it is considered as a memory optimization of case 2.
726 */
9058cc3a 727
670f82d4
TG
728 if (unwind_info & 1)
729 {
730 /* Unofficially documented unwind info redirection, when UNWIND_INFO
731 address is odd (http://www.codemachine.com/article_x64deepdive.html).
732 */
733 struct external_pex64_runtime_function d;
670f82d4
TG
734
735 if (target_read_memory (cache->image_base + (unwind_info & ~1),
736 (gdb_byte *) &d, sizeof (d)) != 0)
737 return;
738
739 cache->start_rva
740 = extract_unsigned_integer (d.rva_BeginAddress, 4, byte_order);
741 cache->end_rva
742 = extract_unsigned_integer (d.rva_EndAddress, 4, byte_order);
743 unwind_info
744 = extract_unsigned_integer (d.rva_UnwindData, 4, byte_order);
745 }
746
747 while (1)
9058cc3a
TG
748 {
749 struct external_pex64_unwind_info ex_ui;
750 /* There are at most 256 16-bit unwind insns. */
751 gdb_byte insns[2 * 256];
752 gdb_byte *p;
753 gdb_byte *end_insns;
754 unsigned char codes_count;
755 unsigned char frame_reg;
670f82d4 756 CORE_ADDR start;
9058cc3a
TG
757
758 /* Read and decode header. */
759 if (target_read_memory (cache->image_base + unwind_info,
760 (gdb_byte *) &ex_ui, sizeof (ex_ui)) != 0)
761 return;
762
a05a883f
SM
763 frame_debug_printf ("%s: ver: %02x, plgsz: %02x, cnt: %02x, frame: %02x",
764 paddress (gdbarch, unwind_info),
765 ex_ui.Version_Flags, ex_ui.SizeOfPrologue,
766 ex_ui.CountOfCodes, ex_ui.FrameRegisterOffset);
9058cc3a
TG
767
768 /* Check version. */
170d82c9
JB
769 if (PEX64_UWI_VERSION (ex_ui.Version_Flags) != 1
770 && PEX64_UWI_VERSION (ex_ui.Version_Flags) != 2)
9058cc3a
TG
771 return;
772
670f82d4
TG
773 start = cache->image_base + cache->start_rva;
774 if (first
775 && !(cache->pc >= start && cache->pc < start + ex_ui.SizeOfPrologue))
9058cc3a 776 {
670f82d4
TG
777 /* We want to detect if the PC points to an epilogue. This needs
778 to be checked only once, and an epilogue can be anywhere but in
779 the prologue. If so, the epilogue detection+decoding function is
9058cc3a
TG
780 sufficient. Otherwise, the unwinder will consider that the PC
781 is in the body of the function and will need to decode unwind
782 info. */
783 if (amd64_windows_frame_decode_epilogue (this_frame, cache) == 1)
784 return;
785
786 /* Not in an epilog. Clear possible side effects. */
787 memset (cache->prev_reg_addr, 0, sizeof (cache->prev_reg_addr));
788 }
789
790 codes_count = ex_ui.CountOfCodes;
791 frame_reg = PEX64_UWI_FRAMEREG (ex_ui.FrameRegisterOffset);
792
793 if (frame_reg != 0)
794 {
795 /* According to msdn:
796 If an FP reg is used, then any unwind code taking an offset must
797 only be used after the FP reg is established in the prolog. */
798 gdb_byte buf[8];
799 int frreg = amd64_windows_w2gdb_regnum[frame_reg];
800
801 get_frame_register (this_frame, frreg, buf);
802 save_addr = extract_unsigned_integer (buf, 8, byte_order);
803
a05a883f
SM
804 frame_debug_printf (" frame_reg=%s, val=%s",
805 gdbarch_register_name (gdbarch, frreg),
806 paddress (gdbarch, save_addr));
9058cc3a
TG
807 }
808
809 /* Read opcodes. */
810 if (codes_count != 0
811 && target_read_memory (cache->image_base + unwind_info
812 + sizeof (ex_ui),
813 insns, codes_count * 2) != 0)
814 return;
815
816 end_insns = &insns[codes_count * 2];
170d82c9
JB
817 p = insns;
818
819 /* Skip opcodes 6 of version 2. This opcode is not documented. */
820 if (PEX64_UWI_VERSION (ex_ui.Version_Flags) == 2)
821 {
822 for (; p < end_insns; p += 2)
823 if (PEX64_UNWCODE_CODE (p[1]) != 6)
824 break;
825 }
826
827 for (; p < end_insns; p += 2)
9058cc3a
TG
828 {
829 int reg;
830
670f82d4
TG
831 /* Virtually execute the operation if the pc is after the
832 corresponding instruction (that does matter in case of break
833 within the prologue). Note that for chained info (!first), the
834 prologue has been fully executed. */
835 if (cache->pc >= start + p[0] || cache->pc < start)
9058cc3a 836 {
a05a883f
SM
837 frame_debug_printf (" op #%u: off=0x%02x, insn=0x%02x",
838 (unsigned) (p - insns), p[0], p[1]);
670f82d4 839
9058cc3a
TG
840 /* If there is no frame registers defined, the current value of
841 rsp is used instead. */
842 if (frame_reg == 0)
843 save_addr = cur_sp;
844
670f82d4
TG
845 reg = -1;
846
9058cc3a
TG
847 switch (PEX64_UNWCODE_CODE (p[1]))
848 {
849 case UWOP_PUSH_NONVOL:
850 /* Push pre-decrements RSP. */
851 reg = amd64_windows_w2gdb_regnum[PEX64_UNWCODE_INFO (p[1])];
852 cache->prev_reg_addr[reg] = cur_sp;
853 cur_sp += 8;
854 break;
855 case UWOP_ALLOC_LARGE:
856 if (PEX64_UNWCODE_INFO (p[1]) == 0)
857 cur_sp +=
858 8 * extract_unsigned_integer (p + 2, 2, byte_order);
859 else if (PEX64_UNWCODE_INFO (p[1]) == 1)
860 cur_sp += extract_unsigned_integer (p + 2, 4, byte_order);
861 else
862 return;
863 break;
864 case UWOP_ALLOC_SMALL:
865 cur_sp += 8 + 8 * PEX64_UNWCODE_INFO (p[1]);
866 break;
867 case UWOP_SET_FPREG:
868 cur_sp = save_addr
869 - PEX64_UWI_FRAMEOFF (ex_ui.FrameRegisterOffset) * 16;
870 break;
871 case UWOP_SAVE_NONVOL:
872 reg = amd64_windows_w2gdb_regnum[PEX64_UNWCODE_INFO (p[1])];
873 cache->prev_reg_addr[reg] = save_addr
670f82d4 874 + 8 * extract_unsigned_integer (p + 2, 2, byte_order);
9058cc3a
TG
875 break;
876 case UWOP_SAVE_NONVOL_FAR:
877 reg = amd64_windows_w2gdb_regnum[PEX64_UNWCODE_INFO (p[1])];
878 cache->prev_reg_addr[reg] = save_addr
670f82d4 879 + 8 * extract_unsigned_integer (p + 2, 4, byte_order);
9058cc3a
TG
880 break;
881 case UWOP_SAVE_XMM128:
882 cache->prev_xmm_addr[PEX64_UNWCODE_INFO (p[1])] =
883 save_addr
884 - 16 * extract_unsigned_integer (p + 2, 2, byte_order);
885 break;
886 case UWOP_SAVE_XMM128_FAR:
887 cache->prev_xmm_addr[PEX64_UNWCODE_INFO (p[1])] =
888 save_addr
889 - 16 * extract_unsigned_integer (p + 2, 4, byte_order);
890 break;
891 case UWOP_PUSH_MACHFRAME:
892 if (PEX64_UNWCODE_INFO (p[1]) == 0)
893 {
894 cache->prev_rip_addr = cur_sp + 0;
895 cache->prev_rsp_addr = cur_sp + 24;
896 cur_sp += 40;
897 }
898 else if (PEX64_UNWCODE_INFO (p[1]) == 1)
899 {
900 cache->prev_rip_addr = cur_sp + 8;
901 cache->prev_rsp_addr = cur_sp + 32;
902 cur_sp += 48;
903 }
904 else
905 return;
906 break;
907 default:
908 return;
909 }
670f82d4
TG
910
911 /* Display address where the register was saved. */
a05a883f
SM
912 if (reg >= 0)
913 frame_debug_printf (" [reg %s at %s]",
914 gdbarch_register_name (gdbarch, reg),
915 paddress (gdbarch,
916 cache->prev_reg_addr[reg]));
9058cc3a
TG
917 }
918
919 /* Adjust with the length of the opcode. */
920 switch (PEX64_UNWCODE_CODE (p[1]))
921 {
922 case UWOP_PUSH_NONVOL:
923 case UWOP_ALLOC_SMALL:
924 case UWOP_SET_FPREG:
925 case UWOP_PUSH_MACHFRAME:
926 break;
927 case UWOP_ALLOC_LARGE:
928 if (PEX64_UNWCODE_INFO (p[1]) == 0)
929 p += 2;
930 else if (PEX64_UNWCODE_INFO (p[1]) == 1)
931 p += 4;
932 else
933 return;
934 break;
935 case UWOP_SAVE_NONVOL:
936 case UWOP_SAVE_XMM128:
937 p += 2;
938 break;
939 case UWOP_SAVE_NONVOL_FAR:
940 case UWOP_SAVE_XMM128_FAR:
941 p += 4;
942 break;
943 default:
944 return;
945 }
946 }
947 if (PEX64_UWI_FLAGS (ex_ui.Version_Flags) != UNW_FLAG_CHAININFO)
670f82d4
TG
948 {
949 /* End of unwind info. */
950 break;
951 }
9058cc3a
TG
952 else
953 {
954 /* Read the chained unwind info. */
955 struct external_pex64_runtime_function d;
956 CORE_ADDR chain_vma;
957
670f82d4
TG
958 /* Not anymore the first entry. */
959 first = 0;
960
961 /* Stay aligned on word boundary. */
9058cc3a 962 chain_vma = cache->image_base + unwind_info
e068c55d 963 + sizeof (ex_ui) + ((codes_count + 1) & ~1) * 2;
9058cc3a
TG
964
965 if (target_read_memory (chain_vma, (gdb_byte *) &d, sizeof (d)) != 0)
966 return;
967
670f82d4
TG
968 /* Decode begin/end. This may be different from .pdata index, as
969 an unwind info may be shared by several functions (in particular
970 if many functions have the same prolog and handler. */
9058cc3a
TG
971 cache->start_rva =
972 extract_unsigned_integer (d.rva_BeginAddress, 4, byte_order);
973 cache->end_rva =
974 extract_unsigned_integer (d.rva_EndAddress, 4, byte_order);
975 unwind_info =
976 extract_unsigned_integer (d.rva_UnwindData, 4, byte_order);
53e8f97d 977
a05a883f
SM
978 frame_debug_printf ("next in chain: unwind_data=%s, start_rva=%s, "
979 "end_rva=%s",
980 paddress (gdbarch, unwind_info),
981 paddress (gdbarch, cache->start_rva),
982 paddress (gdbarch, cache->end_rva));
9058cc3a
TG
983 }
984
985 /* Allow the user to break this loop. */
986 QUIT;
987 }
988 /* PC is saved by the call. */
989 if (cache->prev_rip_addr == 0)
990 cache->prev_rip_addr = cur_sp;
991 cache->prev_sp = cur_sp + 8;
992
a05a883f
SM
993 frame_debug_printf (" prev_sp: %s, prev_pc @%s",
994 paddress (gdbarch, cache->prev_sp),
995 paddress (gdbarch, cache->prev_rip_addr));
9058cc3a
TG
996}
997
998/* Find SEH unwind info for PC, returning 0 on success.
999
1000 UNWIND_INFO is set to the rva of unwind info address, IMAGE_BASE
1001 to the base address of the corresponding image, and START_RVA
1002 to the rva of the function containing PC. */
1003
1004static int
1005amd64_windows_find_unwind_info (struct gdbarch *gdbarch, CORE_ADDR pc,
1006 CORE_ADDR *unwind_info,
1007 CORE_ADDR *image_base,
1008 CORE_ADDR *start_rva,
1009 CORE_ADDR *end_rva)
1010{
1011 struct obj_section *sec;
1012 pe_data_type *pe;
1013 IMAGE_DATA_DIRECTORY *dir;
1014 struct objfile *objfile;
1015 unsigned long lo, hi;
1016 CORE_ADDR base;
1017 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1018
1019 /* Get the corresponding exception directory. */
1020 sec = find_pc_section (pc);
1021 if (sec == NULL)
1022 return -1;
1023 objfile = sec->objfile;
1024 pe = pe_data (sec->objfile->obfd);
1025 dir = &pe->pe_opthdr.DataDirectory[PE_EXCEPTION_TABLE];
1026
b3b3bada 1027 base = pe->pe_opthdr.ImageBase + objfile->text_section_offset ();
9058cc3a
TG
1028 *image_base = base;
1029
1030 /* Find the entry.
1031
1032 Note: This does not handle dynamically added entries (for JIT
1033 engines). For this, we would need to ask the kernel directly,
1034 which means getting some info from the native layer. For the
1035 rest of the code, however, it's probably faster to search
1036 the entry ourselves. */
1037 lo = 0;
1038 hi = dir->Size / sizeof (struct external_pex64_runtime_function);
1039 *unwind_info = 0;
1040 while (lo <= hi)
1041 {
1042 unsigned long mid = lo + (hi - lo) / 2;
1043 struct external_pex64_runtime_function d;
1044 CORE_ADDR sa, ea;
1045
1046 if (target_read_memory (base + dir->VirtualAddress + mid * sizeof (d),
1047 (gdb_byte *) &d, sizeof (d)) != 0)
1048 return -1;
1049
1050 sa = extract_unsigned_integer (d.rva_BeginAddress, 4, byte_order);
1051 ea = extract_unsigned_integer (d.rva_EndAddress, 4, byte_order);
1052 if (pc < base + sa)
1053 hi = mid - 1;
1054 else if (pc >= base + ea)
1055 lo = mid + 1;
1056 else if (pc >= base + sa && pc < base + ea)
1057 {
1058 /* Got it. */
1059 *start_rva = sa;
1060 *end_rva = ea;
1061 *unwind_info =
1062 extract_unsigned_integer (d.rva_UnwindData, 4, byte_order);
1063 break;
1064 }
1065 else
1066 break;
1067 }
1068
a05a883f
SM
1069 frame_debug_printf ("image_base=%s, unwind_data=%s",
1070 paddress (gdbarch, base),
1071 paddress (gdbarch, *unwind_info));
9058cc3a 1072
9058cc3a
TG
1073 return 0;
1074}
1075
1076/* Fill THIS_CACHE using the native amd64-windows unwinding data
1077 for THIS_FRAME. */
1078
1079static struct amd64_windows_frame_cache *
8480a37e 1080amd64_windows_frame_cache (const frame_info_ptr &this_frame, void **this_cache)
9058cc3a
TG
1081{
1082 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1083 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1084 struct amd64_windows_frame_cache *cache;
1085 gdb_byte buf[8];
9058cc3a 1086 CORE_ADDR pc;
9058cc3a
TG
1087 CORE_ADDR unwind_info = 0;
1088
1089 if (*this_cache)
9a3c8263 1090 return (struct amd64_windows_frame_cache *) *this_cache;
9058cc3a
TG
1091
1092 cache = FRAME_OBSTACK_ZALLOC (struct amd64_windows_frame_cache);
1093 *this_cache = cache;
1094
1095 /* Get current PC and SP. */
1096 pc = get_frame_pc (this_frame);
1097 get_frame_register (this_frame, AMD64_RSP_REGNUM, buf);
1098 cache->sp = extract_unsigned_integer (buf, 8, byte_order);
1099 cache->pc = pc;
1100
a0f6c61c
TT
1101 /* If we can't find the unwind info, keep trying as though this is a
1102 leaf function. This situation can happen when PC==0, see
1103 https://sourceware.org/bugzilla/show_bug.cgi?id=30255. */
9058cc3a
TG
1104 if (amd64_windows_find_unwind_info (gdbarch, pc, &unwind_info,
1105 &cache->image_base,
1106 &cache->start_rva,
a0f6c61c
TT
1107 &cache->end_rva)
1108 || unwind_info == 0)
9058cc3a
TG
1109 {
1110 /* Assume a leaf function. */
1111 cache->prev_sp = cache->sp + 8;
1112 cache->prev_rip_addr = cache->sp;
1113 }
1114 else
1115 {
1116 /* Decode unwind insns to compute saved addresses. */
1117 amd64_windows_frame_decode_insns (this_frame, cache, unwind_info);
1118 }
1119 return cache;
1120}
1121
1122/* Implement the "prev_register" method of struct frame_unwind
1123 using the standard Windows x64 SEH info. */
1124
1125static struct value *
8480a37e 1126amd64_windows_frame_prev_register (const frame_info_ptr &this_frame,
9058cc3a
TG
1127 void **this_cache, int regnum)
1128{
1129 struct gdbarch *gdbarch = get_frame_arch (this_frame);
9058cc3a
TG
1130 struct amd64_windows_frame_cache *cache =
1131 amd64_windows_frame_cache (this_frame, this_cache);
9058cc3a
TG
1132 CORE_ADDR prev;
1133
a05a883f
SM
1134 frame_debug_printf ("%s for sp=%s",
1135 gdbarch_register_name (gdbarch, regnum),
1136 paddress (gdbarch, cache->prev_sp));
9058cc3a
TG
1137
1138 if (regnum >= AMD64_XMM0_REGNUM && regnum <= AMD64_XMM0_REGNUM + 15)
1139 prev = cache->prev_xmm_addr[regnum - AMD64_XMM0_REGNUM];
1140 else if (regnum == AMD64_RSP_REGNUM)
1141 {
1142 prev = cache->prev_rsp_addr;
1143 if (prev == 0)
1144 return frame_unwind_got_constant (this_frame, regnum, cache->prev_sp);
1145 }
1146 else if (regnum >= AMD64_RAX_REGNUM && regnum <= AMD64_R15_REGNUM)
1147 prev = cache->prev_reg_addr[regnum - AMD64_RAX_REGNUM];
1148 else if (regnum == AMD64_RIP_REGNUM)
1149 prev = cache->prev_rip_addr;
1150 else
1151 prev = 0;
1152
a05a883f
SM
1153 if (prev != 0)
1154 frame_debug_printf (" -> at %s", paddress (gdbarch, prev));
9058cc3a
TG
1155
1156 if (prev)
1157 {
1158 /* Register was saved. */
1159 return frame_unwind_got_memory (this_frame, regnum, prev);
1160 }
1161 else
1162 {
1163 /* Register is either volatile or not modified. */
1164 return frame_unwind_got_register (this_frame, regnum, regnum);
1165 }
1166}
1167
1168/* Implement the "this_id" method of struct frame_unwind using
1169 the standard Windows x64 SEH info. */
1170
1171static void
8480a37e 1172amd64_windows_frame_this_id (const frame_info_ptr &this_frame, void **this_cache,
9058cc3a
TG
1173 struct frame_id *this_id)
1174{
9058cc3a
TG
1175 struct amd64_windows_frame_cache *cache =
1176 amd64_windows_frame_cache (this_frame, this_cache);
1177
1178 *this_id = frame_id_build (cache->prev_sp,
1179 cache->image_base + cache->start_rva);
1180}
1181
1182/* Windows x64 SEH unwinder. */
1183
1184static const struct frame_unwind amd64_windows_frame_unwind =
1185{
a154d838 1186 "amd64 windows",
9058cc3a
TG
1187 NORMAL_FRAME,
1188 default_frame_unwind_stop_reason,
1189 &amd64_windows_frame_this_id,
1190 &amd64_windows_frame_prev_register,
1191 NULL,
1192 default_frame_sniffer
1193};
1194
1195/* Implement the "skip_prologue" gdbarch method. */
1196
1197static CORE_ADDR
1198amd64_windows_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1199{
1200 CORE_ADDR func_addr;
1201 CORE_ADDR unwind_info = 0;
1202 CORE_ADDR image_base, start_rva, end_rva;
1203 struct external_pex64_unwind_info ex_ui;
1204
1205 /* Use prologue size from unwind info. */
1206 if (amd64_windows_find_unwind_info (gdbarch, pc, &unwind_info,
1207 &image_base, &start_rva, &end_rva) == 0)
1208 {
1209 if (unwind_info == 0)
1210 {
1211 /* Leaf function. */
1212 return pc;
1213 }
1214 else if (target_read_memory (image_base + unwind_info,
1215 (gdb_byte *) &ex_ui, sizeof (ex_ui)) == 0
1216 && PEX64_UWI_VERSION (ex_ui.Version_Flags) == 1)
325fac50 1217 return std::max (pc, image_base + start_rva + ex_ui.SizeOfPrologue);
9058cc3a
TG
1218 }
1219
1220 /* See if we can determine the end of the prologue via the symbol
1221 table. If so, then return either the PC, or the PC after
1222 the prologue, whichever is greater. */
1223 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1224 {
1225 CORE_ADDR post_prologue_pc
1226 = skip_prologue_using_sal (gdbarch, func_addr);
1227
1228 if (post_prologue_pc != 0)
325fac50 1229 return std::max (pc, post_prologue_pc);
9058cc3a
TG
1230 }
1231
1232 return pc;
1233}
1234
84552b16
PA
1235/* Check Win64 DLL jmp trampolines and find jump destination. */
1236
1237static CORE_ADDR
8480a37e 1238amd64_windows_skip_trampoline_code (const frame_info_ptr &frame, CORE_ADDR pc)
84552b16
PA
1239{
1240 CORE_ADDR destination = 0;
1241 struct gdbarch *gdbarch = get_frame_arch (frame);
1242 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1243
1244 /* Check for jmp *<offset>(%rip) (jump near, absolute indirect (/4)). */
1245 if (pc && read_memory_unsigned_integer (pc, 2, byte_order) == 0x25ff)
1246 {
1247 /* Get opcode offset and see if we can find a reference in our data. */
1248 ULONGEST offset
1249 = read_memory_unsigned_integer (pc + 2, 4, byte_order);
1250
1251 /* Get address of function pointer at end of pc. */
1252 CORE_ADDR indirect_addr = pc + offset + 6;
1253
1254 struct minimal_symbol *indsym
7cbd4a93
TT
1255 = (indirect_addr
1256 ? lookup_minimal_symbol_by_pc (indirect_addr).minsym
1257 : NULL);
c9d95fa3 1258 const char *symname = indsym ? indsym->linkage_name () : NULL;
84552b16
PA
1259
1260 if (symname)
1261 {
61012eef
GB
1262 if (startswith (symname, "__imp_")
1263 || startswith (symname, "_imp_"))
84552b16
PA
1264 destination
1265 = read_memory_unsigned_integer (indirect_addr, 8, byte_order);
1266 }
1267 }
1268
1269 return destination;
1270}
99e24b90 1271
83ab93c6
JB
1272/* Implement the "auto_wide_charset" gdbarch method. */
1273
1274static const char *
1275amd64_windows_auto_wide_charset (void)
1276{
1277 return "UTF-16";
1278}
1279
0f2265e2
SM
1280/* Common parts for gdbarch initialization for Windows and Cygwin on AMD64. */
1281
d0761299 1282static void
30efb6c7 1283amd64_windows_init_abi_common (gdbarch_info info, struct gdbarch *gdbarch)
d0761299 1284{
08106042 1285 i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
aff9d387 1286
9058cc3a
TG
1287 /* The dwarf2 unwinder (appended very early by i386_gdbarch_init) is
1288 preferred over the SEH one. The reasons are:
85102364 1289 - binaries without SEH but with dwarf2 debug info are correctly handled
9058cc3a
TG
1290 (although they aren't ABI compliant, gcc before 4.7 didn't emit SEH
1291 info).
1292 - dwarf3 DW_OP_call_frame_cfa is correctly handled (it can only be
1293 handled if the dwarf2 unwinder is used).
1294
1295 The call to amd64_init_abi appends default unwinders, that aren't
1296 compatible with the SEH one.
1297 */
1298 frame_unwind_append_unwinder (gdbarch, &amd64_windows_frame_unwind);
1299
2434b019 1300 amd64_init_abi (info, gdbarch,
de52b960 1301 amd64_target_description (X86_XSTATE_SSE_MASK, false));
d0761299 1302
ba581dc1 1303 /* Function calls. */
20c2e3e0 1304 set_gdbarch_push_dummy_call (gdbarch, amd64_windows_push_dummy_call);
5cb0f2d5 1305 set_gdbarch_return_value_as_value (gdbarch, amd64_windows_return_value);
99e24b90 1306 set_gdbarch_skip_main_prologue (gdbarch, amd64_skip_main_prologue);
84552b16
PA
1307 set_gdbarch_skip_trampoline_code (gdbarch,
1308 amd64_windows_skip_trampoline_code);
ba581dc1 1309
9058cc3a
TG
1310 set_gdbarch_skip_prologue (gdbarch, amd64_windows_skip_prologue);
1311
aff9d387
JT
1312 tdep->gregset_reg_offset = amd64_windows_gregset_reg_offset;
1313 tdep->gregset_num_regs = ARRAY_SIZE (amd64_windows_gregset_reg_offset);
1314 tdep->sizeof_gregset = AMD64_WINDOWS_SIZEOF_GREGSET;
1315 tdep->sizeof_fpregset = 0;
1316
62a5151b
JT
1317 /* Core file support. */
1318 set_gdbarch_core_xfer_shared_libraries
1319 (gdbarch, windows_core_xfer_shared_libraries);
1320 set_gdbarch_core_pid_to_str (gdbarch, windows_core_pid_to_str);
1321
83ab93c6 1322 set_gdbarch_auto_wide_charset (gdbarch, amd64_windows_auto_wide_charset);
d0761299
JB
1323}
1324
0f2265e2
SM
1325/* gdbarch initialization for Windows on AMD64. */
1326
30efb6c7
SM
1327static void
1328amd64_windows_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1329{
1330 amd64_windows_init_abi_common (info, gdbarch);
0f2265e2 1331 windows_init_abi (info, gdbarch);
30efb6c7
SM
1332
1333 /* On Windows, "long"s are only 32bit. */
1334 set_gdbarch_long_bit (gdbarch, 32);
1335}
1336
0f2265e2
SM
1337/* gdbarch initialization for Cygwin on AMD64. */
1338
30efb6c7
SM
1339static void
1340amd64_cygwin_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1341{
1342 amd64_windows_init_abi_common (info, gdbarch);
0f2265e2 1343 cygwin_init_abi (info, gdbarch);
30efb6c7
SM
1344}
1345
cb9b645d
SM
1346static gdb_osabi
1347amd64_windows_osabi_sniffer (bfd *abfd)
1348{
1349 const char *target_name = bfd_get_target (abfd);
1350
8db52437
SM
1351 if (!streq (target_name, "pei-x86-64"))
1352 return GDB_OSABI_UNKNOWN;
cb9b645d 1353
8db52437
SM
1354 if (is_linked_with_cygwin_dll (abfd))
1355 return GDB_OSABI_CYGWIN;
1356
1357 return GDB_OSABI_WINDOWS;
cb9b645d
SM
1358}
1359
7d155da3
JT
1360static enum gdb_osabi
1361amd64_cygwin_core_osabi_sniffer (bfd *abfd)
1362{
1363 const char *target_name = bfd_get_target (abfd);
1364
1365 /* Cygwin uses elf core dumps. Do not claim all ELF executables,
1366 check whether there is a .reg section of proper size. */
1367 if (strcmp (target_name, "elf64-x86-64") == 0)
1368 {
1369 asection *section = bfd_get_section_by_name (abfd, ".reg");
1370 if (section != nullptr
1371 && bfd_section_size (section) == AMD64_WINDOWS_SIZEOF_GREGSET)
1372 return GDB_OSABI_CYGWIN;
1373 }
1374
1375 return GDB_OSABI_UNKNOWN;
1376}
1377
6c265988 1378void _initialize_amd64_windows_tdep ();
d0761299 1379void
6c265988 1380_initialize_amd64_windows_tdep ()
d0761299 1381{
053205cc 1382 gdbarch_register_osabi (bfd_arch_i386, bfd_mach_x86_64, GDB_OSABI_WINDOWS,
dda83cd7 1383 amd64_windows_init_abi);
d0761299 1384 gdbarch_register_osabi (bfd_arch_i386, bfd_mach_x86_64, GDB_OSABI_CYGWIN,
dda83cd7 1385 amd64_cygwin_init_abi);
cb9b645d
SM
1386
1387 gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour,
1388 amd64_windows_osabi_sniffer);
7d155da3
JT
1389
1390 /* Cygwin uses elf core dumps. */
1391 gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_elf_flavour,
1392 amd64_cygwin_core_osabi_sniffer);
1393
d0761299 1394}