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[thirdparty/binutils-gdb.git] / gdb / i386-tdep.c
CommitLineData
c906108c 1/* Intel 386 target-dependent stuff.
b6ba6518
KB
2 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001
c906108c
SS
4 Free Software Foundation, Inc.
5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
JM
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c906108c
SS
22
23#include "defs.h"
24#include "gdb_string.h"
25#include "frame.h"
26#include "inferior.h"
27#include "gdbcore.h"
28#include "target.h"
29#include "floatformat.h"
30#include "symtab.h"
31#include "gdbcmd.h"
32#include "command.h"
b4a20239 33#include "arch-utils.h"
4e052eda 34#include "regcache.h"
c906108c 35
917317f4
JM
36/* i386_register_byte[i] is the offset into the register file of the
37 start of register number i. We initialize this from
38 i386_register_raw_size. */
39int i386_register_byte[MAX_NUM_REGS];
40
ceb4951f
JB
41/* i386_register_raw_size[i] is the number of bytes of storage in
42 GDB's register array occupied by register i. */
917317f4
JM
43int i386_register_raw_size[MAX_NUM_REGS] = {
44 4, 4, 4, 4,
45 4, 4, 4, 4,
46 4, 4, 4, 4,
47 4, 4, 4, 4,
48 10, 10, 10, 10,
49 10, 10, 10, 10,
50 4, 4, 4, 4,
51 4, 4, 4, 4,
52 16, 16, 16, 16,
53 16, 16, 16, 16,
54 4
55};
56
57/* i386_register_virtual_size[i] is the size in bytes of the virtual
58 type of register i. */
59int i386_register_virtual_size[MAX_NUM_REGS];
fc338970 60\f
917317f4 61
fc338970
MK
62/* This is the variable that is set with "set disassembly-flavor", and
63 its legitimate values. */
53904c9e
AC
64static const char att_flavor[] = "att";
65static const char intel_flavor[] = "intel";
66static const char *valid_flavors[] =
c5aa993b 67{
c906108c
SS
68 att_flavor,
69 intel_flavor,
70 NULL
71};
53904c9e 72static const char *disassembly_flavor = att_flavor;
c906108c 73
fc338970
MK
74/* This is used to keep the bfd arch_info in sync with the disassembly
75 flavor. */
a14ed312
KB
76static void set_disassembly_flavor_sfunc (char *, int,
77 struct cmd_list_element *);
78static void set_disassembly_flavor (void);
fc338970
MK
79\f
80
81/* Stdio style buffering was used to minimize calls to ptrace, but
82 this buffering did not take into account that the code section
83 being accessed may not be an even number of buffers long (even if
84 the buffer is only sizeof(int) long). In cases where the code
85 section size happened to be a non-integral number of buffers long,
86 attempting to read the last buffer would fail. Simply using
87 target_read_memory and ignoring errors, rather than read_memory, is
88 not the correct solution, since legitimate access errors would then
89 be totally ignored. To properly handle this situation and continue
90 to use buffering would require that this code be able to determine
91 the minimum code section size granularity (not the alignment of the
92 section itself, since the actual failing case that pointed out this
93 problem had a section alignment of 4 but was not a multiple of 4
94 bytes long), on a target by target basis, and then adjust it's
95 buffer size accordingly. This is messy, but potentially feasible.
96 It probably needs the bfd library's help and support. For now, the
97 buffer size is set to 1. (FIXME -fnf) */
98
99#define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */
c906108c
SS
100static CORE_ADDR codestream_next_addr;
101static CORE_ADDR codestream_addr;
102static unsigned char codestream_buf[CODESTREAM_BUFSIZ];
103static int codestream_off;
104static int codestream_cnt;
105
106#define codestream_tell() (codestream_addr + codestream_off)
fc338970
MK
107#define codestream_peek() \
108 (codestream_cnt == 0 ? \
109 codestream_fill(1) : codestream_buf[codestream_off])
110#define codestream_get() \
111 (codestream_cnt-- == 0 ? \
112 codestream_fill(0) : codestream_buf[codestream_off++])
c906108c 113
c5aa993b 114static unsigned char
fba45db2 115codestream_fill (int peek_flag)
c906108c
SS
116{
117 codestream_addr = codestream_next_addr;
118 codestream_next_addr += CODESTREAM_BUFSIZ;
119 codestream_off = 0;
120 codestream_cnt = CODESTREAM_BUFSIZ;
121 read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ);
c5aa993b 122
c906108c 123 if (peek_flag)
c5aa993b 124 return (codestream_peek ());
c906108c 125 else
c5aa993b 126 return (codestream_get ());
c906108c
SS
127}
128
129static void
fba45db2 130codestream_seek (CORE_ADDR place)
c906108c
SS
131{
132 codestream_next_addr = place / CODESTREAM_BUFSIZ;
133 codestream_next_addr *= CODESTREAM_BUFSIZ;
134 codestream_cnt = 0;
135 codestream_fill (1);
c5aa993b 136 while (codestream_tell () != place)
c906108c
SS
137 codestream_get ();
138}
139
140static void
fba45db2 141codestream_read (unsigned char *buf, int count)
c906108c
SS
142{
143 unsigned char *p;
144 int i;
145 p = buf;
146 for (i = 0; i < count; i++)
147 *p++ = codestream_get ();
148}
fc338970 149\f
c906108c 150
fc338970 151/* If the next instruction is a jump, move to its target. */
c906108c
SS
152
153static void
fba45db2 154i386_follow_jump (void)
c906108c
SS
155{
156 unsigned char buf[4];
157 long delta;
158
159 int data16;
160 CORE_ADDR pos;
161
162 pos = codestream_tell ();
163
164 data16 = 0;
165 if (codestream_peek () == 0x66)
166 {
167 codestream_get ();
168 data16 = 1;
169 }
170
171 switch (codestream_get ())
172 {
173 case 0xe9:
fc338970 174 /* Relative jump: if data16 == 0, disp32, else disp16. */
c906108c
SS
175 if (data16)
176 {
177 codestream_read (buf, 2);
178 delta = extract_signed_integer (buf, 2);
179
fc338970
MK
180 /* Include the size of the jmp instruction (including the
181 0x66 prefix). */
c5aa993b 182 pos += delta + 4;
c906108c
SS
183 }
184 else
185 {
186 codestream_read (buf, 4);
187 delta = extract_signed_integer (buf, 4);
188
189 pos += delta + 5;
190 }
191 break;
192 case 0xeb:
fc338970 193 /* Relative jump, disp8 (ignore data16). */
c906108c
SS
194 codestream_read (buf, 1);
195 /* Sign-extend it. */
196 delta = extract_signed_integer (buf, 1);
197
198 pos += delta + 2;
199 break;
200 }
201 codestream_seek (pos);
202}
203
fc338970
MK
204/* Find & return the amount a local space allocated, and advance the
205 codestream to the first register push (if any).
206
207 If the entry sequence doesn't make sense, return -1, and leave
208 codestream pointer at a random spot. */
c906108c
SS
209
210static long
fba45db2 211i386_get_frame_setup (CORE_ADDR pc)
c906108c
SS
212{
213 unsigned char op;
214
215 codestream_seek (pc);
216
217 i386_follow_jump ();
218
219 op = codestream_get ();
220
221 if (op == 0x58) /* popl %eax */
222 {
fc338970
MK
223 /* This function must start with
224
225 popl %eax 0x58
226 xchgl %eax, (%esp) 0x87 0x04 0x24
227 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
228
229 (the System V compiler puts out the second `xchg'
230 instruction, and the assembler doesn't try to optimize it, so
231 the 'sib' form gets generated). This sequence is used to get
232 the address of the return buffer for a function that returns
233 a structure. */
c906108c
SS
234 int pos;
235 unsigned char buf[4];
fc338970
MK
236 static unsigned char proto1[3] = { 0x87, 0x04, 0x24 };
237 static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 };
238
c906108c
SS
239 pos = codestream_tell ();
240 codestream_read (buf, 4);
241 if (memcmp (buf, proto1, 3) == 0)
242 pos += 3;
243 else if (memcmp (buf, proto2, 4) == 0)
244 pos += 4;
245
246 codestream_seek (pos);
fc338970 247 op = codestream_get (); /* Update next opcode. */
c906108c
SS
248 }
249
250 if (op == 0x68 || op == 0x6a)
251 {
fc338970
MK
252 /* This function may start with
253
254 pushl constant
255 call _probe
256 addl $4, %esp
257
258 followed by
259
260 pushl %ebp
261
262 etc. */
c906108c
SS
263 int pos;
264 unsigned char buf[8];
265
fc338970 266 /* Skip past the `pushl' instruction; it has either a one-byte
c906108c
SS
267 or a four-byte operand, depending on the opcode. */
268 pos = codestream_tell ();
269 if (op == 0x68)
270 pos += 4;
271 else
272 pos += 1;
273 codestream_seek (pos);
274
fc338970
MK
275 /* Read the following 8 bytes, which should be "call _probe" (6
276 bytes) followed by "addl $4,%esp" (2 bytes). */
c906108c
SS
277 codestream_read (buf, sizeof (buf));
278 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
279 pos += sizeof (buf);
280 codestream_seek (pos);
fc338970 281 op = codestream_get (); /* Update next opcode. */
c906108c
SS
282 }
283
284 if (op == 0x55) /* pushl %ebp */
c5aa993b 285 {
fc338970 286 /* Check for "movl %esp, %ebp" -- can be written in two ways. */
c906108c
SS
287 switch (codestream_get ())
288 {
289 case 0x8b:
290 if (codestream_get () != 0xec)
fc338970 291 return -1;
c906108c
SS
292 break;
293 case 0x89:
294 if (codestream_get () != 0xe5)
fc338970 295 return -1;
c906108c
SS
296 break;
297 default:
fc338970 298 return -1;
c906108c 299 }
fc338970
MK
300 /* Check for stack adjustment
301
302 subl $XXX, %esp
303
304 NOTE: You can't subtract a 16 bit immediate from a 32 bit
305 reg, so we don't have to worry about a data16 prefix. */
c906108c
SS
306 op = codestream_peek ();
307 if (op == 0x83)
308 {
fc338970 309 /* `subl' with 8 bit immediate. */
c906108c
SS
310 codestream_get ();
311 if (codestream_get () != 0xec)
fc338970 312 /* Some instruction starting with 0x83 other than `subl'. */
c906108c
SS
313 {
314 codestream_seek (codestream_tell () - 2);
315 return 0;
316 }
fc338970
MK
317 /* `subl' with signed byte immediate (though it wouldn't
318 make sense to be negative). */
c5aa993b 319 return (codestream_get ());
c906108c
SS
320 }
321 else if (op == 0x81)
322 {
323 char buf[4];
fc338970 324 /* Maybe it is `subl' with a 32 bit immedediate. */
c5aa993b 325 codestream_get ();
c906108c 326 if (codestream_get () != 0xec)
fc338970 327 /* Some instruction starting with 0x81 other than `subl'. */
c906108c
SS
328 {
329 codestream_seek (codestream_tell () - 2);
330 return 0;
331 }
fc338970 332 /* It is `subl' with a 32 bit immediate. */
c5aa993b 333 codestream_read ((unsigned char *) buf, 4);
c906108c
SS
334 return extract_signed_integer (buf, 4);
335 }
336 else
337 {
fc338970 338 return 0;
c906108c
SS
339 }
340 }
341 else if (op == 0xc8)
342 {
343 char buf[2];
fc338970 344 /* `enter' with 16 bit unsigned immediate. */
c5aa993b 345 codestream_read ((unsigned char *) buf, 2);
fc338970 346 codestream_get (); /* Flush final byte of enter instruction. */
c906108c
SS
347 return extract_unsigned_integer (buf, 2);
348 }
349 return (-1);
350}
351
c833a37e
MK
352/* Return the chain-pointer for FRAME. In the case of the i386, the
353 frame's nominal address is the address of a 4-byte word containing
354 the calling frame's address. */
355
356CORE_ADDR
357i386_frame_chain (struct frame_info *frame)
358{
359 if (frame->signal_handler_caller)
360 return frame->frame;
361
362 if (! inside_entry_file (frame->pc))
363 return read_memory_unsigned_integer (frame->frame, 4);
364
365 return 0;
366}
367
539ffe0b
MK
368/* Determine whether the function invocation represented by FRAME does
369 not have a from on the stack associated with it. If it does not,
370 return non-zero, otherwise return zero. */
371
372int
373i386_frameless_function_invocation (struct frame_info *frame)
374{
375 if (frame->signal_handler_caller)
376 return 0;
377
378 return frameless_look_for_prologue (frame);
379}
380
ed84f6c1
MK
381/* Immediately after a function call, return the saved pc. */
382
383CORE_ADDR
384i386_saved_pc_after_call (struct frame_info *frame)
385{
386 return read_memory_unsigned_integer (read_register (SP_REGNUM), 4);
387}
388
c906108c
SS
389/* Return number of args passed to a frame.
390 Can return -1, meaning no way to tell. */
391
392int
fba45db2 393i386_frame_num_args (struct frame_info *fi)
c906108c
SS
394{
395#if 1
396 return -1;
397#else
398 /* This loses because not only might the compiler not be popping the
fc338970
MK
399 args right after the function call, it might be popping args from
400 both this call and a previous one, and we would say there are
401 more args than there really are. */
c906108c 402
c5aa993b
JM
403 int retpc;
404 unsigned char op;
c906108c
SS
405 struct frame_info *pfi;
406
fc338970 407 /* On the i386, the instruction following the call could be:
c906108c
SS
408 popl %ecx - one arg
409 addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits
fc338970 410 anything else - zero args. */
c906108c
SS
411
412 int frameless;
413
392a587b 414 frameless = FRAMELESS_FUNCTION_INVOCATION (fi);
c906108c 415 if (frameless)
fc338970
MK
416 /* In the absence of a frame pointer, GDB doesn't get correct
417 values for nameless arguments. Return -1, so it doesn't print
418 any nameless arguments. */
c906108c
SS
419 return -1;
420
c5aa993b 421 pfi = get_prev_frame (fi);
c906108c
SS
422 if (pfi == 0)
423 {
fc338970
MK
424 /* NOTE: This can happen if we are looking at the frame for
425 main, because FRAME_CHAIN_VALID won't let us go into start.
426 If we have debugging symbols, that's not really a big deal;
427 it just means it will only show as many arguments to main as
428 are declared. */
c906108c
SS
429 return -1;
430 }
431 else
432 {
c5aa993b
JM
433 retpc = pfi->pc;
434 op = read_memory_integer (retpc, 1);
fc338970 435 if (op == 0x59) /* pop %ecx */
c5aa993b 436 return 1;
c906108c
SS
437 else if (op == 0x83)
438 {
c5aa993b
JM
439 op = read_memory_integer (retpc + 1, 1);
440 if (op == 0xc4)
441 /* addl $<signed imm 8 bits>, %esp */
442 return (read_memory_integer (retpc + 2, 1) & 0xff) / 4;
c906108c
SS
443 else
444 return 0;
445 }
fc338970
MK
446 else if (op == 0x81) /* `add' with 32 bit immediate. */
447 {
c5aa993b
JM
448 op = read_memory_integer (retpc + 1, 1);
449 if (op == 0xc4)
450 /* addl $<imm 32>, %esp */
451 return read_memory_integer (retpc + 2, 4) / 4;
c906108c
SS
452 else
453 return 0;
454 }
455 else
456 {
457 return 0;
458 }
459 }
460#endif
461}
462
fc338970
MK
463/* Parse the first few instructions the function to see what registers
464 were stored.
465
466 We handle these cases:
467
468 The startup sequence can be at the start of the function, or the
469 function can start with a branch to startup code at the end.
470
471 %ebp can be set up with either the 'enter' instruction, or "pushl
472 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
473 once used in the System V compiler).
474
475 Local space is allocated just below the saved %ebp by either the
476 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
477 bit unsigned argument for space to allocate, and the 'addl'
478 instruction could have either a signed byte, or 32 bit immediate.
479
480 Next, the registers used by this function are pushed. With the
481 System V compiler they will always be in the order: %edi, %esi,
482 %ebx (and sometimes a harmless bug causes it to also save but not
483 restore %eax); however, the code below is willing to see the pushes
484 in any order, and will handle up to 8 of them.
485
486 If the setup sequence is at the end of the function, then the next
487 instruction will be a branch back to the start. */
c906108c
SS
488
489void
fba45db2 490i386_frame_init_saved_regs (struct frame_info *fip)
c906108c
SS
491{
492 long locals = -1;
493 unsigned char op;
494 CORE_ADDR dummy_bottom;
fc338970 495 CORE_ADDR addr;
c906108c
SS
496 CORE_ADDR pc;
497 int i;
c5aa993b 498
1211c4e4
AC
499 if (fip->saved_regs)
500 return;
501
502 frame_saved_regs_zalloc (fip);
c5aa993b 503
fc338970
MK
504 /* If the frame is the end of a dummy, compute where the beginning
505 would be. */
c906108c 506 dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH;
c5aa993b 507
fc338970 508 /* Check if the PC points in the stack, in a dummy frame. */
c5aa993b 509 if (dummy_bottom <= fip->pc && fip->pc <= fip->frame)
c906108c 510 {
fc338970
MK
511 /* All registers were saved by push_call_dummy. */
512 addr = fip->frame;
c5aa993b 513 for (i = 0; i < NUM_REGS; i++)
c906108c 514 {
fc338970
MK
515 addr -= REGISTER_RAW_SIZE (i);
516 fip->saved_regs[i] = addr;
c906108c
SS
517 }
518 return;
519 }
c5aa993b 520
c906108c
SS
521 pc = get_pc_function_start (fip->pc);
522 if (pc != 0)
523 locals = i386_get_frame_setup (pc);
c5aa993b
JM
524
525 if (locals >= 0)
c906108c 526 {
fc338970 527 addr = fip->frame - 4 - locals;
c5aa993b 528 for (i = 0; i < 8; i++)
c906108c
SS
529 {
530 op = codestream_get ();
531 if (op < 0x50 || op > 0x57)
532 break;
533#ifdef I386_REGNO_TO_SYMMETRY
534 /* Dynix uses different internal numbering. Ick. */
fc338970 535 fip->saved_regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = addr;
c906108c 536#else
fc338970 537 fip->saved_regs[op - 0x50] = addr;
c906108c 538#endif
fc338970 539 addr -= 4;
c906108c
SS
540 }
541 }
c5aa993b 542
1211c4e4
AC
543 fip->saved_regs[PC_REGNUM] = fip->frame + 4;
544 fip->saved_regs[FP_REGNUM] = fip->frame;
c906108c
SS
545}
546
fc338970 547/* Return PC of first real instruction. */
c906108c
SS
548
549int
fba45db2 550i386_skip_prologue (int pc)
c906108c
SS
551{
552 unsigned char op;
553 int i;
c5aa993b 554 static unsigned char pic_pat[6] =
fc338970
MK
555 { 0xe8, 0, 0, 0, 0, /* call 0x0 */
556 0x5b, /* popl %ebx */
c5aa993b 557 };
c906108c 558 CORE_ADDR pos;
c5aa993b 559
c906108c
SS
560 if (i386_get_frame_setup (pc) < 0)
561 return (pc);
c5aa993b 562
fc338970
MK
563 /* Found valid frame setup -- codestream now points to start of push
564 instructions for saving registers. */
c5aa993b 565
fc338970 566 /* Skip over register saves. */
c906108c
SS
567 for (i = 0; i < 8; i++)
568 {
569 op = codestream_peek ();
fc338970 570 /* Break if not `pushl' instrunction. */
c5aa993b 571 if (op < 0x50 || op > 0x57)
c906108c
SS
572 break;
573 codestream_get ();
574 }
575
fc338970
MK
576 /* The native cc on SVR4 in -K PIC mode inserts the following code
577 to get the address of the global offset table (GOT) into register
578 %ebx
579
580 call 0x0
581 popl %ebx
582 movl %ebx,x(%ebp) (optional)
583 addl y,%ebx
584
c906108c
SS
585 This code is with the rest of the prologue (at the end of the
586 function), so we have to skip it to get to the first real
587 instruction at the start of the function. */
c5aa993b 588
c906108c
SS
589 pos = codestream_tell ();
590 for (i = 0; i < 6; i++)
591 {
592 op = codestream_get ();
c5aa993b 593 if (pic_pat[i] != op)
c906108c
SS
594 break;
595 }
596 if (i == 6)
597 {
598 unsigned char buf[4];
599 long delta = 6;
600
601 op = codestream_get ();
c5aa993b 602 if (op == 0x89) /* movl %ebx, x(%ebp) */
c906108c
SS
603 {
604 op = codestream_get ();
fc338970 605 if (op == 0x5d) /* One byte offset from %ebp. */
c906108c
SS
606 {
607 delta += 3;
608 codestream_read (buf, 1);
609 }
fc338970 610 else if (op == 0x9d) /* Four byte offset from %ebp. */
c906108c
SS
611 {
612 delta += 6;
613 codestream_read (buf, 4);
614 }
fc338970 615 else /* Unexpected instruction. */
c5aa993b
JM
616 delta = -1;
617 op = codestream_get ();
c906108c 618 }
c5aa993b
JM
619 /* addl y,%ebx */
620 if (delta > 0 && op == 0x81 && codestream_get () == 0xc3)
c906108c 621 {
c5aa993b 622 pos += delta + 6;
c906108c
SS
623 }
624 }
625 codestream_seek (pos);
c5aa993b 626
c906108c 627 i386_follow_jump ();
c5aa993b 628
c906108c
SS
629 return (codestream_tell ());
630}
631
632void
fba45db2 633i386_push_dummy_frame (void)
c906108c
SS
634{
635 CORE_ADDR sp = read_register (SP_REGNUM);
636 int regnum;
637 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 638
c906108c
SS
639 sp = push_word (sp, read_register (PC_REGNUM));
640 sp = push_word (sp, read_register (FP_REGNUM));
641 write_register (FP_REGNUM, sp);
642 for (regnum = 0; regnum < NUM_REGS; regnum++)
643 {
644 read_register_gen (regnum, regbuf);
645 sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum));
646 }
647 write_register (SP_REGNUM, sp);
648}
649
a7769679
MK
650/* Insert the (relative) function address into the call sequence
651 stored at DYMMY. */
652
653void
654i386_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
655 value_ptr *args, struct type *type, int gcc_p)
656{
657 int from, to, delta, loc;
658
659 loc = (int)(read_register (SP_REGNUM) - CALL_DUMMY_LENGTH);
660 from = loc + 5;
661 to = (int)(fun);
662 delta = to - from;
663
664 *((char *)(dummy) + 1) = (delta & 0xff);
665 *((char *)(dummy) + 2) = ((delta >> 8) & 0xff);
666 *((char *)(dummy) + 3) = ((delta >> 16) & 0xff);
667 *((char *)(dummy) + 4) = ((delta >> 24) & 0xff);
668}
669
c906108c 670void
fba45db2 671i386_pop_frame (void)
c906108c
SS
672{
673 struct frame_info *frame = get_current_frame ();
674 CORE_ADDR fp;
675 int regnum;
c906108c 676 char regbuf[MAX_REGISTER_RAW_SIZE];
c5aa993b 677
c906108c 678 fp = FRAME_FP (frame);
1211c4e4
AC
679 i386_frame_init_saved_regs (frame);
680
c5aa993b 681 for (regnum = 0; regnum < NUM_REGS; regnum++)
c906108c 682 {
fc338970
MK
683 CORE_ADDR addr;
684 addr = frame->saved_regs[regnum];
685 if (addr)
c906108c 686 {
fc338970 687 read_memory (addr, regbuf, REGISTER_RAW_SIZE (regnum));
c906108c
SS
688 write_register_bytes (REGISTER_BYTE (regnum), regbuf,
689 REGISTER_RAW_SIZE (regnum));
690 }
691 }
692 write_register (FP_REGNUM, read_memory_integer (fp, 4));
693 write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
694 write_register (SP_REGNUM, fp + 8);
695 flush_cached_frames ();
696}
fc338970 697\f
c906108c
SS
698
699#ifdef GET_LONGJMP_TARGET
700
fc338970
MK
701/* Figure out where the longjmp will land. Slurp the args out of the
702 stack. We expect the first arg to be a pointer to the jmp_buf
703 structure from which we extract the pc (JB_PC) that we will land
704 at. The pc is copied into PC. This routine returns true on
705 success. */
c906108c
SS
706
707int
fba45db2 708get_longjmp_target (CORE_ADDR *pc)
c906108c
SS
709{
710 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
711 CORE_ADDR sp, jb_addr;
712
713 sp = read_register (SP_REGNUM);
714
fc338970 715 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack. */
c906108c
SS
716 buf,
717 TARGET_PTR_BIT / TARGET_CHAR_BIT))
718 return 0;
719
720 jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
721
722 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
723 TARGET_PTR_BIT / TARGET_CHAR_BIT))
724 return 0;
725
726 *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
727
728 return 1;
729}
730
731#endif /* GET_LONGJMP_TARGET */
fc338970 732\f
c906108c 733
22f8ba57
MK
734CORE_ADDR
735i386_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
736 int struct_return, CORE_ADDR struct_addr)
737{
738 sp = default_push_arguments (nargs, args, sp, struct_return, struct_addr);
739
740 if (struct_return)
741 {
742 char buf[4];
743
744 sp -= 4;
745 store_address (buf, 4, struct_addr);
746 write_memory (sp, buf, 4);
747 }
748
749 return sp;
750}
751
752void
753i386_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
754{
755 /* Do nothing. Everything was already done by i386_push_arguments. */
756}
757
1a309862
MK
758/* These registers are used for returning integers (and on some
759 targets also for returning `struct' and `union' values when their
ef9dff19 760 size and alignment match an integer type). */
1a309862
MK
761#define LOW_RETURN_REGNUM 0 /* %eax */
762#define HIGH_RETURN_REGNUM 2 /* %edx */
763
764/* Extract from an array REGBUF containing the (raw) register state, a
765 function return value of TYPE, and copy that, in virtual format,
766 into VALBUF. */
767
c906108c 768void
1a309862 769i386_extract_return_value (struct type *type, char *regbuf, char *valbuf)
c906108c 770{
1a309862
MK
771 int len = TYPE_LENGTH (type);
772
1e8d0a7b
MK
773 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
774 && TYPE_NFIELDS (type) == 1)
3df1b9b4
MK
775 {
776 i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regbuf, valbuf);
777 return;
778 }
1e8d0a7b
MK
779
780 if (TYPE_CODE (type) == TYPE_CODE_FLT)
c906108c 781 {
1a309862
MK
782 if (NUM_FREGS == 0)
783 {
784 warning ("Cannot find floating-point return value.");
785 memset (valbuf, 0, len);
ef9dff19 786 return;
1a309862
MK
787 }
788
789 /* Floating-point return values can be found in %st(0). */
790 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
791 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
792 {
793 /* Copy straight over, but take care of the padding. */
794 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM)],
795 FPU_REG_RAW_SIZE);
796 memset (valbuf + FPU_REG_RAW_SIZE, 0, len - FPU_REG_RAW_SIZE);
797 }
798 else
799 {
800 /* Convert the extended floating-point number found in
801 %st(0) to the desired type. This is probably not exactly
802 how it would happen on the target itself, but it is the
803 best we can do. */
804 DOUBLEST val;
805 floatformat_to_doublest (&floatformat_i387_ext,
806 &regbuf[REGISTER_BYTE (FP0_REGNUM)], &val);
807 store_floating (valbuf, TYPE_LENGTH (type), val);
808 }
c906108c
SS
809 }
810 else
c5aa993b 811 {
d4f3574e
SS
812 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
813 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
814
815 if (len <= low_size)
1a309862 816 memcpy (valbuf, &regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)], len);
d4f3574e
SS
817 else if (len <= (low_size + high_size))
818 {
819 memcpy (valbuf,
1a309862 820 &regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)], low_size);
d4f3574e 821 memcpy (valbuf + low_size,
1a309862 822 &regbuf[REGISTER_BYTE (HIGH_RETURN_REGNUM)], len - low_size);
d4f3574e
SS
823 }
824 else
8e65ff28
AC
825 internal_error (__FILE__, __LINE__,
826 "Cannot extract return value of %d bytes long.", len);
c906108c
SS
827 }
828}
829
ef9dff19
MK
830/* Write into the appropriate registers a function return value stored
831 in VALBUF of type TYPE, given in virtual format. */
832
833void
834i386_store_return_value (struct type *type, char *valbuf)
835{
836 int len = TYPE_LENGTH (type);
837
1e8d0a7b
MK
838 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
839 && TYPE_NFIELDS (type) == 1)
3df1b9b4
MK
840 {
841 i386_store_return_value (TYPE_FIELD_TYPE (type, 0), valbuf);
842 return;
843 }
1e8d0a7b
MK
844
845 if (TYPE_CODE (type) == TYPE_CODE_FLT)
ef9dff19
MK
846 {
847 if (NUM_FREGS == 0)
848 {
849 warning ("Cannot set floating-point return value.");
850 return;
851 }
852
853 /* Floating-point return values can be found in %st(0). */
854 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
855 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
856 {
857 /* Copy straight over. */
858 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf,
859 FPU_REG_RAW_SIZE);
860 }
861 else
862 {
863 char buf[FPU_REG_RAW_SIZE];
864 DOUBLEST val;
865
866 /* Convert the value found in VALBUF to the extended
867 floating point format used by the FPU. This is probably
868 not exactly how it would happen on the target itself, but
869 it is the best we can do. */
870 val = extract_floating (valbuf, TYPE_LENGTH (type));
871 floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
872 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf,
873 FPU_REG_RAW_SIZE);
874 }
875 }
876 else
877 {
878 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
879 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
880
881 if (len <= low_size)
882 write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM), valbuf, len);
883 else if (len <= (low_size + high_size))
884 {
885 write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM),
886 valbuf, low_size);
887 write_register_bytes (REGISTER_BYTE (HIGH_RETURN_REGNUM),
888 valbuf + low_size, len - low_size);
889 }
890 else
8e65ff28
AC
891 internal_error (__FILE__, __LINE__,
892 "Cannot store return value of %d bytes long.", len);
ef9dff19
MK
893 }
894}
f7af9647
MK
895
896/* Extract from an array REGBUF containing the (raw) register state
897 the address in which a function should return its structure value,
898 as a CORE_ADDR. */
899
900CORE_ADDR
901i386_extract_struct_value_address (char *regbuf)
902{
903 return extract_address (&regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)],
904 REGISTER_RAW_SIZE (LOW_RETURN_REGNUM));
905}
fc338970 906\f
ef9dff19 907
ac27f131
MK
908/* Convert data from raw format for register REGNUM in buffer FROM to
909 virtual format with type TYPE in buffer TO. In principle both
910 formats are identical except that the virtual format has two extra
911 bytes appended that aren't used. We set these to zero. */
912
913void
914i386_register_convert_to_virtual (int regnum, struct type *type,
915 char *from, char *to)
916{
917 /* Copy straight over, but take care of the padding. */
918 memcpy (to, from, FPU_REG_RAW_SIZE);
919 memset (to + FPU_REG_RAW_SIZE, 0, TYPE_LENGTH (type) - FPU_REG_RAW_SIZE);
920}
921
922/* Convert data from virtual format with type TYPE in buffer FROM to
923 raw format for register REGNUM in buffer TO. Simply omit the two
924 unused bytes. */
925
926void
927i386_register_convert_to_raw (struct type *type, int regnum,
928 char *from, char *to)
929{
930 memcpy (to, from, FPU_REG_RAW_SIZE);
931}
ac27f131 932\f
fc338970 933
c906108c 934#ifdef I386V4_SIGTRAMP_SAVED_PC
fc338970
MK
935/* Get saved user PC for sigtramp from the pushed ucontext on the
936 stack for all three variants of SVR4 sigtramps. */
c906108c
SS
937
938CORE_ADDR
fba45db2 939i386v4_sigtramp_saved_pc (struct frame_info *frame)
c906108c
SS
940{
941 CORE_ADDR saved_pc_offset = 4;
942 char *name = NULL;
943
944 find_pc_partial_function (frame->pc, &name, NULL, NULL);
945 if (name)
946 {
947 if (STREQ (name, "_sigreturn"))
948 saved_pc_offset = 132 + 14 * 4;
949 else if (STREQ (name, "_sigacthandler"))
950 saved_pc_offset = 80 + 14 * 4;
951 else if (STREQ (name, "sigvechandler"))
952 saved_pc_offset = 120 + 14 * 4;
953 }
954
955 if (frame->next)
956 return read_memory_integer (frame->next->frame + saved_pc_offset, 4);
957 return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4);
958}
959#endif /* I386V4_SIGTRAMP_SAVED_PC */
fc338970 960\f
a0b3c4fd 961
c906108c 962#ifdef STATIC_TRANSFORM_NAME
fc338970
MK
963/* SunPRO encodes the static variables. This is not related to C++
964 mangling, it is done for C too. */
c906108c
SS
965
966char *
fba45db2 967sunpro_static_transform_name (char *name)
c906108c
SS
968{
969 char *p;
970 if (IS_STATIC_TRANSFORM_NAME (name))
971 {
fc338970
MK
972 /* For file-local statics there will be a period, a bunch of
973 junk (the contents of which match a string given in the
c5aa993b
JM
974 N_OPT), a period and the name. For function-local statics
975 there will be a bunch of junk (which seems to change the
976 second character from 'A' to 'B'), a period, the name of the
977 function, and the name. So just skip everything before the
978 last period. */
c906108c
SS
979 p = strrchr (name, '.');
980 if (p != NULL)
981 name = p + 1;
982 }
983 return name;
984}
985#endif /* STATIC_TRANSFORM_NAME */
fc338970 986\f
c906108c 987
fc338970 988/* Stuff for WIN32 PE style DLL's but is pretty generic really. */
c906108c
SS
989
990CORE_ADDR
fba45db2 991skip_trampoline_code (CORE_ADDR pc, char *name)
c906108c 992{
fc338970 993 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
c906108c 994 {
c5aa993b 995 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
c906108c 996 struct minimal_symbol *indsym =
fc338970 997 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
c5aa993b 998 char *symname = indsym ? SYMBOL_NAME (indsym) : 0;
c906108c 999
c5aa993b 1000 if (symname)
c906108c 1001 {
c5aa993b
JM
1002 if (strncmp (symname, "__imp_", 6) == 0
1003 || strncmp (symname, "_imp_", 5) == 0)
c906108c
SS
1004 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
1005 }
1006 }
fc338970 1007 return 0; /* Not a trampoline. */
c906108c 1008}
fc338970
MK
1009\f
1010
1011/* We have two flavours of disassembly. The machinery on this page
1012 deals with switching between those. */
c906108c
SS
1013
1014static int
fba45db2 1015gdb_print_insn_i386 (bfd_vma memaddr, disassemble_info *info)
c906108c
SS
1016{
1017 if (disassembly_flavor == att_flavor)
1018 return print_insn_i386_att (memaddr, info);
1019 else if (disassembly_flavor == intel_flavor)
1020 return print_insn_i386_intel (memaddr, info);
fc338970
MK
1021 /* Never reached -- disassembly_flavour is always either att_flavor
1022 or intel_flavor. */
e1e9e218 1023 internal_error (__FILE__, __LINE__, "failed internal consistency check");
7a292a7a
SS
1024}
1025
fc338970
MK
1026/* If the disassembly mode is intel, we have to also switch the bfd
1027 mach_type. This function is run in the set disassembly_flavor
7a292a7a
SS
1028 command, and does that. */
1029
1030static void
fba45db2
KB
1031set_disassembly_flavor_sfunc (char *args, int from_tty,
1032 struct cmd_list_element *c)
7a292a7a
SS
1033{
1034 set_disassembly_flavor ();
7a292a7a
SS
1035}
1036
1037static void
fba45db2 1038set_disassembly_flavor (void)
7a292a7a
SS
1039{
1040 if (disassembly_flavor == att_flavor)
1041 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386);
1042 else if (disassembly_flavor == intel_flavor)
fc338970
MK
1043 set_architecture_from_arch_mach (bfd_arch_i386,
1044 bfd_mach_i386_i386_intel_syntax);
c906108c 1045}
fc338970 1046\f
2acceee2 1047
28e9e0f0
MK
1048/* Provide a prototype to silence -Wmissing-prototypes. */
1049void _initialize_i386_tdep (void);
1050
c906108c 1051void
fba45db2 1052_initialize_i386_tdep (void)
c906108c 1053{
917317f4
JM
1054 /* Initialize the table saying where each register starts in the
1055 register file. */
1056 {
1057 int i, offset;
1058
1059 offset = 0;
1060 for (i = 0; i < MAX_NUM_REGS; i++)
1061 {
1062 i386_register_byte[i] = offset;
1063 offset += i386_register_raw_size[i];
1064 }
1065 }
1066
1067 /* Initialize the table of virtual register sizes. */
1068 {
1069 int i;
1070
1071 for (i = 0; i < MAX_NUM_REGS; i++)
1072 i386_register_virtual_size[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i));
1073 }
c5aa993b 1074
c906108c
SS
1075 tm_print_insn = gdb_print_insn_i386;
1076 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach;
1077
fc338970 1078 /* Add the variable that controls the disassembly flavor. */
917317f4
JM
1079 {
1080 struct cmd_list_element *new_cmd;
7a292a7a 1081
917317f4
JM
1082 new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class,
1083 valid_flavors,
1ed2a135 1084 &disassembly_flavor,
fc338970
MK
1085 "\
1086Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
c906108c 1087and the default value is \"att\".",
917317f4
JM
1088 &setlist);
1089 new_cmd->function.sfunc = set_disassembly_flavor_sfunc;
1090 add_show_from_set (new_cmd, &showlist);
1091 }
c5aa993b 1092
7a292a7a 1093 /* Finally, initialize the disassembly flavor to the default given
fc338970 1094 in the disassembly_flavor variable. */
7a292a7a 1095 set_disassembly_flavor ();
c906108c 1096}