]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - sim/m32r/Makefile.in
sim: switch config.h usage to defs.h
[thirdparty/binutils-gdb.git] / sim / m32r / Makefile.in
CommitLineData
c906108c 1# Makefile template for Configure for the m32r simulator
3666a048 2# Copyright (C) 1996-2021 Free Software Foundation, Inc.
c906108c
SS
3# Contributed by Cygnus Support.
4#
5# This file is part of GDB, the GNU debugger.
6#
7# This program is free software; you can redistribute it and/or modify
8# it under the terms of the GNU General Public License as published by
4744ac1b 9# the Free Software Foundation; either version 3 of the License, or
c906108c
SS
10# (at your option) any later version.
11#
12# This program is distributed in the hope that it will be useful,
13# but WITHOUT ANY WARRANTY; without even the implied warranty of
14# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15# GNU General Public License for more details.
16#
4744ac1b
JB
17# You should have received a copy of the GNU General Public License
18# along with this program. If not, see <http://www.gnu.org/licenses/>.
c906108c
SS
19
20## COMMON_PRE_CONFIG_FRAG
21
22M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
2df3850c 23M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
16b47b25 24M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
6edf0760 25TRAPS_OBJ = @traps_obj@
c906108c 26
c906108c
SS
27SIM_OBJS = \
28 $(SIM_NEW_COMMON_OBJS) \
c906108c 29 cgen-utils.o cgen-trace.o cgen-scache.o \
797eee42 30 cgen-run.o \
c906108c
SS
31 sim-if.o arch.o \
32 $(M32R_OBJS) \
2df3850c 33 $(M32RX_OBJS) \
16b47b25 34 $(M32R2_OBJS) \
9c0c156b 35 $(TRAPS_OBJ)
c906108c
SS
36
37# Extra headers included by sim-main.h.
38SIM_EXTRA_DEPS = \
39 $(CGEN_INCLUDE_DEPS) \
e7d8f1da
TT
40 arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h \
41 eng.h engx.h eng2.h
c906108c 42
6edf0760 43SIM_EXTRA_CFLAGS = @sim_extra_cflags@
c906108c 44
c906108c
SS
45SIM_EXTRA_CLEAN = m32r-clean
46
c906108c
SS
47## COMMON_POST_CONFIG_FRAG
48
49arch = m32r
50
c906108c
SS
51# M32R objs
52
53M32RBF_INCLUDE_DEPS = \
54 $(CGEN_MAIN_CPU_DEPS) \
55 cpu.h decode.h eng.h
56
c906108c 57# FIXME: Use of `mono' is wip.
894a1d7b 58mloop.c eng.h: stamp-mloop ; @true
c906108c 59stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
086c6838 60 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
c906108c
SS
61 -mono -fast -pbb -switch sem-switch.c \
62 -cpu m32rbf -infile $(srcdir)/mloop.in
63 $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
64 $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
65 touch stamp-mloop
c906108c 66
2df3850c
JM
67# M32RX objs
68
69M32RXF_INCLUDE_DEPS = \
70 $(CGEN_MAIN_CPU_DEPS) \
71 cpux.h decodex.h engx.h
72
2df3850c 73# FIXME: Use of `mono' is wip.
894a1d7b 74mloopx.c engx.h: stamp-xmloop ; @true
2df3850c 75stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
086c6838 76 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
2df3850c 77 -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
4d06b60c
DJ
78 -cpu m32rxf -infile $(srcdir)/mloopx.in \
79 -outfile-suffix x
80 $(SHELL) $(srcroot)/move-if-change engx.hin engx.h
81 $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
2df3850c 82 touch stamp-xmloop
c906108c 83
16b47b25
NC
84# M32R2 objs
85
86M32R2F_INCLUDE_DEPS = \
87 $(CGEN_MAIN_CPU_DEPS) \
88 cpu2.h decode2.h eng2.h
89
16b47b25 90# FIXME: Use of `mono' is wip.
894a1d7b 91mloop2.c eng2.h: stamp-2mloop ; @true
16b47b25 92stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
086c6838 93 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
16b47b25 94 -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
4d06b60c
DJ
95 -cpu m32r2f -infile $(srcdir)/mloop2.in \
96 -outfile-suffix 2
97 $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
98 $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
16b47b25
NC
99 touch stamp-2mloop
100
c906108c
SS
101m32r-clean:
102 rm -f mloop.c eng.h stamp-mloop
2df3850c 103 rm -f mloopx.c engx.h stamp-xmloop
16b47b25
NC
104 rm -f mloop2.c eng2.h stamp-2mloop
105 rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
c906108c
SS
106 rm -f tmp-*
107
604259a0
FCE
108# cgen support, enable with --enable-cgen-maint
109CGEN_MAINT = ; @true
110# The following line is commented in or out depending upon --enable-cgen-maint.
111@CGEN_MAINT@CGEN_MAINT =
112
894a1d7b
DE
113# NOTE: Generated source files are specified as full paths,
114# e.g. $(srcdir)/arch.c, because make may decide the files live
115# in objdir otherwise.
116
117stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
604259a0 118 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
6a8b8615 119 archfile=$(CPU_DIR)/m32r.cpu \
604259a0
FCE
120 FLAGS="with-scache with-profile=fn"
121 touch stamp-arch
894a1d7b
DE
122$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
123 @true
604259a0 124
894a1d7b 125stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
604259a0
FCE
126 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
127 cpu=m32rbf mach=m32r SUFFIX= \
6a8b8615 128 archfile=$(CPU_DIR)/m32r.cpu \
604259a0
FCE
129 FLAGS="with-scache with-profile=fn" \
130 EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
131 touch stamp-cpu
894a1d7b
DE
132$(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
133 @true
604259a0 134
894a1d7b 135stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
604259a0 136 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
a6fc1778 137 cpu=m32rxf mach=m32rx SUFFIX=x \
6a8b8615 138 archfile=$(CPU_DIR)/m32r.cpu \
a6fc1778
DB
139 FLAGS="with-scache with-profile=fn" \
140 EXTRAFILES="$(CGEN_CPU_SEMSW)"
604259a0 141 touch stamp-xcpu
894a1d7b
DE
142$(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
143 @true
16b47b25 144
894a1d7b 145stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
16b47b25
NC
146 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
147 cpu=m32r2f mach=m32r2 SUFFIX=2 \
6a8b8615 148 archfile=$(CPU_DIR)/m32r.cpu \
16b47b25
NC
149 FLAGS="with-scache with-profile=fn" \
150 EXTRAFILES="$(CGEN_CPU_SEMSW)"
151 touch stamp-2cpu
894a1d7b
DE
152$(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
153 @true