sim/aarch64/ChangeLog

   1 2016-08-15  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * interp.c: Include bfd.h.
   4         (symcount, symtab, aarch64_get_sym_value): Delete.
   5         (remove_useless_symbols): Change count type to long.
   6         (aarch64_get_func): Add SIM_DESC to arg list.  Add symcount
   7         and symtab local variables.
   8         (sim_create_inferior): Delete storage.  Replace symbol code
   9         with a call to trace_load_symbols.
  10         * memory.c: Delete bfd.h, elf/internal.h, and elf/common.h
  11         includes.
  12         (aarch64_get_heap_start): Change aarch64_get_sym_value to
  13         trace_sym_value.
  14         * memory.h: Delete bfd.h include.
  15         (mem_add_blk): Delete unused prototype.
  16         * simulator.c (bl, blr): Pass SIM_DESC to aarch64_get_func.
  17         * simulator.c (aarch64_get_func): Add SIM_DESC to arg list.
  18         (aarch64_get_sym_value): Delete.
  19
  20 2016-08-12  Nick Clifton  <nickc@redhat.com>
  21
  22         * simulator.c (aarch64_step): Revert pervious delta.
  23         (aarch64_run): Call sim_events_tick after each
  24         instruction is simulated, and if necessary call
  25         sim_events_process.
  26         * simulator.h: Revert previous delta.
  27
  28 2016-08-11  Nick Clifton  <nickc@redhat.com>
  29
  30         * interp.c (sim_create_inferior): Allow for being called with a
  31         NULL abfd parameter.  If a bfd is provided, initialise the sim
  32         with that start address.
  33         * simulator.c (HALT_NYI): Just print out the numeric value of the
  34         instruction when not tracing.
  35         (aarch64_step): Change from static to global.
  36         * simulator.h: Add a prototype for aarch64_step().
  37
  38 2016-07-27  Alan Modra  <amodra@gmail.com>
  39
  40         * memory.c: Don't include libbfd.h.
  41
  42 2016-07-21  Nick Clifton  <nickc@redhat.com>
  43
  44         * simulator.c (fsqrts): Use sqrtf rather than sqrt.
  45
  46 2016-06-30  Jim Wilson  <jim.wilson@linaro.org>
  47
  48         * cpustate.h: Include config.h.
  49         (union GRegisterValue): Add WORDS_BIGENDIAN check.  For big endian code
  50         use anonymous structs to align members.
  51         * simulator.c (aarch64_step): Use sim_core_read_buffer and
  52         endian_le2h_4 to read instruction from pc.
  53
  54 2016-05-06  Nick Clifton  <nickc@redhat.com>
  55
  56         * simulator.c (do_FMLA_by_element): New function.
  57         (do_vec_op2): Call it.
  58
  59 2016-04-27  Nick Clifton  <nickc@redhat.com>
  60
  61         * simulator.c: Add TRACE_DECODE statements to all emulation
  62         functions.
  63
  64 2016-03-30  Nick Clifton  <nickc@redhat.com>
  65
  66         * cpustate.c (aarch64_set_reg_s32): New function.
  67         (aarch64_set_reg_u32): New function.
  68         (aarch64_get_FP_half): Place half precision value into the correct
  69         slot of the union.
  70         (aarch64_set_FP_half): Likewise.
  71         * cpustate.h: Add prototypes for aarch64_set_reg_s32 and
  72         aarch64_set_reg_u32.
  73         * memory.c (FETCH_FUNC): Cast the read value to the access type
  74         before converting it to the return type.  Rename to FETCH_FUNC64.
  75         (FETCH_FUNC32): New macro.  Duplicates FETCH_FUNC64 but for 32-bit
  76         accesses.  Use for 32-bit memory access functions.
  77         * simulator.c (ldrsb_wb): Use sign extension not zero extension.
  78         (ldrb_scale_ext, ldrsh32_abs, ldrsh32_wb): Likewise.
  79         (ldrsh32_scale_ext, ldrsh_abs, ldrsh64_wb): Likewise.
  80         (ldrsh_scale_ext, ldrsw_abs): Likewise.
  81         (ldrh32_abs): Store 32 bit value not 64-bits.
  82         (ldrh32_wb, ldrh32_scale_ext): Likewise.
  83         (do_vec_MOV_immediate): Fix computation of val.
  84         (do_vec_MVNI): Likewise.
  85         (DO_VEC_WIDENING_MUL): New macro.
  86         (do_vec_mull): Use new macro.
  87         (do_vec_mul): Use new macro.
  88         (do_vec_MLA): Read values before writing.
  89         (do_vec_xtl): Likewise.
  90         (do_vec_SSHL): Select correct shift value.
  91         (do_vec_USHL): Likewise.
  92         (do_scalar_UCVTF): New function.
  93         (do_scalar_vec): Call new function.
  94         (store_pair_u64): Treat reads of SP as reads of XZR.
  95
  96 2016-03-29  Nick Clifton  <nickc@redhat.com>
  97
  98         * cpustate.c: Remove space after asterisk in function parameters.
  99         * decode.h (greg): Delete unused function.
 100         (vreg, shift, extension, scaling, writeback, condcode): Likewise.
 101         * simulator.c: Use INSTR macro in more places.
 102         (HALT_NYI): Use sim_io_eprintf in place of fprintf.
 103         Remove extraneous whitespace.
 104
 105 2016-03-23  Nick Clifton  <nickc@redhat.com>
 106
 107         * cpustate.c (aarch64_get_FP_half): New function.  Read a vector
 108         register as a half precision floating point number.
 109         (aarch64_set_FP_half): New function.  Similar, but for setting
 110         a half precision register.
 111         (aarch64_get_thread_id): New function.  Returns the value of the
 112         CPU's TPIDR register.
 113         (aarch64_get_FPCR): New function.  Returns the value of the CPU's
 114         floating point control register.
 115         (aarch64_set_FPCR): New function.  Set the value of the CPU's FPCR
 116         register.
 117         * cpustate.h: Add prototypes for new functions.
 118         * sim-main.h (struct _sim_cpu): Add FPCR and tpidr fields.
 119         * memory.c: Use unaligned core access functions for all memory
 120         reads and writes.
 121         * simulator.c (HALT_NYI): Generate an error message if tracing
 122         will not tell the user why the simulator is halting.
 123         (HALT_UNREACHABLE): Delete.  Delete (unneeded) uses of the macro.
 124         (INSTR): New time-saver macro.
 125         (fldrb_abs): New function.  Loads an 8-bit value using a scaled
 126         offset.
 127         (fldrh_abs): New function.  Likewise for 16-bit values.
 128         (do_vec_SSHL): Allow for negative shift values.
 129         (do_vec_USHL): Likewise.
 130         (do_vec_SHL): Correct computation of shift amount.
 131         (do_vec_SSHR_USHR): Correct decision of signed vs unsigned
 132         shifts and computation of shift value.
 133         (clz): New function.  Counts leading zero bits.
 134         (do_vec_CLZ): New function.  Implements CLZ (vector).
 135         (do_vec_MOV_element): Call do_vec_CLZ.
 136         (dexSimpleFPCondCompare): Implement.
 137         (do_FCVT_half_to_single): New function.  Implements one of the
 138         FCVT operations.
 139         (do_FCVT_half_to_double): New function.  Likewise.
 140         (do_FCVT_single_to_half): New function.  Likewise.
 141         (do_FCVT_double_to_half): New function.  Likewise.
 142         (dexSimpleFPDataProc1Source): Call new FCVT functions.
 143         (do_scalar_SHL): Handle negative shifts.
 144         (do_scalar_shift): Handle SSHR.
 145         (do_scalar_USHL): New function.
 146         (do_double_add): Simplify to just performing a double precision
 147         add operation.  Move remaining code into...
 148         (do_scalar_vec): ... New function.
 149         (dexLoadUnsignedImmediate): Call new fldrb_abs and fldrh_abs
 150         functions.
 151         (system_get): Add support for TPIDR, CTR, FPCR, FPSR and CPSR
 152         registers.
 153         (system_set): New function.
 154         (do_MSR_immediate): New function.  Stub for now.
 155         (do_MSR_reg): New function.  Likewise. Partially implements MSR
 156         instruction.
 157         (do_SYS): New function.  Stub for now,
 158         (dexSystem): Call new functions.
 159
 160 2016-03-18  Nick Clifton  <nickc@redhat.com>
 161
 162         * cpustate.c: Remove spurious spaces from TRACE strings.
 163         Print hex equivalents of floats and doubles.
 164         Check element number against array size when accessing vector
 165         registers.
 166         (GET_VEC_ELEMENT): Fix off by one error checking for an invalid
 167         element index.
 168         (SET_VEC_ELEMENT): Likewise.
 169         (GET_VEC_ELEMENT): And fix thinko using macro arguments.
 170
 171         * memory.c: Trace memory reads when --trace-memory is enabled.
 172         Remove float and double load and store functions.
 173         * memory.h (aarch64_get_mem_float): Delete prototype.
 174         (aarch64_get_mem_double): Likewise.
 175         (aarch64_set_mem_float): Likewise.
 176         (aarch64_set_mem_double): Likewise.
 177         * simulator (IS_SET): Always return either 0 or 1.
 178         (IS_CLEAR): Likewise.
 179         (fldrs_pcrel): Load and store floats using 32-bit memory accesses
 180         and doubles using 64-bit memory accesses.
 181         (fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise.
 182         (fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise.
 183         (fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise.
 184         (fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise.
 185         (store_pair_double, load_pair_float, load_pair_double): Likewise.
 186         (do_vec_MUL_by_element): New function.
 187         (do_vec_op2): Call do_vec_MUL_by_element.
 188         (do_scalar_NEG): New function.
 189         (do_double_add): Call do_scalar_NEG.
 190
 191 2016-03-03  Nick Clifton  <nickc@redhat.com>
 192
 193         * simulator.c (set_flags_for_sub32): Correct type of signbit.
 194         (CondCompare): Swap interpretation of bit 30.
 195         (DO_ADDP): Delete macro.
 196         (do_vec_ADDP): Copy source registers before starting to update
 197         destination register.
 198         (do_vec_FADDP): Likewise.
 199         (do_vec_load_store): Fix computation of sizeof_operation.
 200         (rbit64): Fix type of constant.
 201         (aarch64_step): When displaying insn value, display all 32 bits.
 202
 203 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 204
 205         * config.in, configure: Regenerate.
 206
 207 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 208
 209         * configure: Regenerate.
 210
 211 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 212
 213         * configure.ac (SIM_AC_OPTION_ENVIRONMENT): Delete call.
 214         * configure: Regenerate.
 215
 216 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 217
 218         * configure: Regenerate.
 219
 220 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 221
 222         * configure: Regenerate.
 223
 224 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 225
 226         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 227         * configure: Regenerate.
 228
 229 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 230
 231         * configure: Regenerate.
 232
 233 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 234
 235         * configure: Regenerate.
 236
 237 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 238
 239         * config.in, configure: Regenerate.
 240
 241 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 242
 243         * interp.c (sim_create_inferior): Mark argv and env const.
 244         (sim_open): Mark argv const.
 245
 246 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 247
 248         * interp.c: Delete dis-asm.h include.
 249         (info, opbuf, op_printf, aarch64_print_insn, sim_dis_read): Delete.
 250         (sim_create_inferior): Delete disassemble init logic.
 251         (OPTION_DISAS, aarch64_option_handler, aarch64_options): Delete.
 252         (sim_open): Delete sim_add_option_table call.
 253         * memory.c (mem_error): Delete disas check.
 254         * simulator.c: Delete dis-asm.h include.
 255         (disas): Delete.
 256         (HALT_UNALLOC): Replace disassembly logic with TRACE_DISASM.
 257         (HALT_NYI): Likewise.
 258         (handle_halt): Delete disas call.
 259         (aarch64_step): Replace disas logic with TRACE_DISASM.
 260         * simulator.h: Delete dis-asm.h include.
 261         (aarch64_print_insn): Delete.
 262
 263 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 264
 265         * simulator.c (MAX, MIN): Delete.
 266         (do_vec_maxv): Change MAX to max and MIN to min.
 267         (do_vec_fminmaxV): Likewise.
 268
 269 2016-01-04  Tristan Gingold  <gingold@adacore.com>
 270
 271         * simulator.c: Remove syscall.h include.
 272
 273 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 274
 275         * configure: Regenerate.
 276
 277 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 278
 279         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 280         * configure: Regenerate.
 281
 282 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 283
 284         * configure: Regenerate.
 285
 286 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 287
 288         * interp.c (sim_dis_read): Change private_data to application_data.
 289         (sim_create_inferior): Likewise.
 290
 291 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 292
 293         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 294
 295 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 296
 297         * config.in, configure: Regenerate.
 298
 299 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 300
 301         * interp.c (sim_create_inferior): Update comment and argv check.
 302
 303 2015-12-14  Nick Clifton  <nickc@redhat.com>
 304
 305         * simulator.c (system_get): New function.  Provides read
 306         access to the dczid system register.
 307         (do_mrs): New function - implements the MRS instruction.
 308         (dexSystem): Call do_mrs for the MRS instruction.  Halt on
 309         unimplemented system instructions.
 310
 311 2015-11-24  Nick Clifton  <nickc@redhat.com>
 312
 313         * configure.ac: New configure template.
 314         * aclocal.m4: Generate.
 315         * config.in: Generate.
 316         * configure: Generate.
 317         * cpustate.c: New file - functions for accessing AArch64 registers.
 318         * cpustate.h: New header.
 319         * decode.h: New header.
 320         * interp.c: New file - interface between GDB and simulator.
 321         * Makefile.in: New makefile template.
 322         * memory.c: New file - functions for simulating aarch64 memory
 323         accesses.
 324         * memory.h: New header.
 325         * sim-main.h: New header.
 326         * simulator.c: New file - aarch64 simulator functions.
 327         * simulator.h: New header.