sim/frv/pipeline.c

   1 /* frv vliw model.
   2    Copyright (C) 1999-2021 Free Software Foundation, Inc.
   3    Contributed by Red Hat.
   4
   5 This file is part of the GNU simulators.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 3 of the License, or
  10 (at your option) any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 /* This must come before any other includes.  */
  21 #include "defs.h"
  22
  23 #define WANT_CPU frvbf
  24 #define WANT_CPU_FRVBF
  25
  26 #include "sim-main.h"
  27
  28 /* Simulator specific vliw related functions.  Additional vliw related
  29    code used by both the simulator and the assembler is in frv.opc.  */
  30
  31 int insns_in_slot[UNIT_NUM_UNITS] = {0};
  32
  33 void
  34 frv_vliw_setup_insn (SIM_CPU *current_cpu, const CGEN_INSN *insn)
  35 {
  36   FRV_VLIW *vliw;
  37   int index;
  38
  39   /* Always clear the NE index which indicates the target register
  40      of a non excepting insn. This will be reset by the insn if
  41      necessary.  */
  42   frv_interrupt_state.ne_index = NE_NOFLAG;
  43
  44   vliw = CPU_VLIW (current_cpu);
  45   index = vliw->next_slot - 1;
  46   if (frv_is_float_insn (insn))
  47     {
  48       /* If the insn is to be added and is a floating point insn and
  49          it is the first floating point insn in the vliw, then clear
  50          FSR0.FTT.  */
  51       int i;
  52       for (i = 0; i < index; ++i)
  53         if (frv_is_float_major (vliw->major[i], vliw->mach))
  54           break; /* found float insn.  */
  55       if (i >= index)
  56         {
  57           SI fsr0 = GET_FSR (0);
  58           SET_FSR_FTT (fsr0, FTT_NONE);
  59           SET_FSR (0, fsr0);
  60         }
  61     }
  62   else if (frv_is_media_insn (insn))
  63     {
  64       /* Clear the appropriate MSR fields depending on which slot
  65          this insn is in.  */
  66       CGEN_ATTR_VALUE_ENUM_TYPE preserve_ovf;
  67       SI msr0 = GET_MSR (0);
  68
  69       preserve_ovf = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_PRESERVE_OVF);
  70       if ((*vliw->current_vliw)[index] == UNIT_FM0)
  71         {
  72           if (! preserve_ovf)
  73             {
  74               /* Clear MSR0.OVF and MSR0.SIE.  */
  75               CLEAR_MSR_SIE (msr0);
  76               CLEAR_MSR_OVF (msr0);
  77             }
  78         }
  79       else
  80         {
  81           if (! preserve_ovf)
  82             {
  83               /* Clear MSR1.OVF and MSR1.SIE.  */
  84               SI msr1 = GET_MSR (1);
  85               CLEAR_MSR_SIE (msr1);
  86               CLEAR_MSR_OVF (msr1);
  87               SET_MSR (1, msr1);
  88             }
  89         }
  90       SET_MSR (0, msr0);
  91     } /* Insn is a media insns.  */
  92   COUNT_INSNS_IN_SLOT ((*vliw->current_vliw)[index]);
  93 }
  94