]>
Commit | Line | Data |
---|---|---|
e625881a ML |
1 | 0xF8000120 0x1F000200 // ARM_CLK_CTRL - divisor = 2 433 MHz (?) |
2 | 0xf8000700 0x202 | |
3 | 0xf8000704 0x202 | |
4 | 0xf8000708 0x202 | |
5 | 0xf800070c 0x202 | |
6 | 0xf8000710 0x202 | |
7 | 0xf8000714 0x202 | |
8 | 0xf8000718 0x202 | |
9 | 0xf800071c 0x200 | |
10 | 0xf8000720 0x202 | |
11 | 0xf8000724 0x202 | |
12 | 0xf8000728 0x202 | |
13 | 0xf800072c 0x202 | |
14 | 0xf8000730 0x202 | |
15 | 0xf8000734 0x202 | |
16 | 0xf8000738 0x12e1 | |
17 | 0xf800073c 0x12e0 | |
18 | 0xf8000740 0x1200 | |
19 | 0xf8000744 0x1200 | |
20 | 0xf8000748 0x1200 | |
21 | 0xf800074c 0x1200 | |
22 | 0xf8000750 0x1200 | |
23 | 0xf8000754 0x1200 | |
24 | 0xf8000758 0x1200 | |
25 | 0xf800075c 0x1200 | |
26 | 0xf8000760 0x1200 | |
27 | 0xf8000764 0x200 | |
28 | 0xf8000768 0x1200 | |
29 | 0xf800076c 0x200 | |
30 | 0xf8000770 0x304 | |
31 | 0xf8000774 0x305 | |
32 | 0xf8000778 0x304 | |
33 | 0xf800077c 0x305 | |
34 | 0xf8000780 0x304 | |
35 | 0xf8000784 0x304 | |
36 | 0xf8000788 0x304 | |
37 | 0xf800078c 0x304 | |
38 | 0xf8000790 0x305 | |
39 | 0xf8000794 0x304 | |
40 | 0xf8000798 0x304 | |
41 | 0xf800079c 0x304 | |
42 | 0xf80007a0 0x380 | |
43 | 0xf80007a4 0x380 | |
44 | 0xf80007a8 0x380 | |
45 | 0xf80007ac 0x380 | |
46 | 0xf80007b0 0x380 | |
47 | 0xf80007b4 0x380 | |
48 | 0xf80007b8 0x1200 | |
49 | 0xf80007bc 0x1200 | |
50 | 0xf80007c0 0x1240 | |
51 | 0xf80007c4 0x1240 | |
52 | 0xf80007c8 0x1240 | |
53 | 0xf80007cc 0x1240 | |
54 | 0xf80007d0 0x1200 | |
55 | 0xf80007d4 0x1200 | |
56 | 0xf8000830 0x380037 | |
57 | 0xf8000834 0x3a0039 | |
58 | 0xF800014C 0x00000621 // LQSPI_CLK_CTRL - ARMPLL/6 (200 MHz) | |
59 | 0xE000D000 0x800238C1 // QSPI config - divide-by-2 | |
60 | 0xE000D038 0x00000020 // QSPI loopback - internal, 0 delay | |
61 | 0xE000D0A0 0xE2FF06EB // LQSPI_CFG - Quad read, dual flash |