arch/arm/cpu/arm1176/cpu.c

   1 /*
   2  * (C) Copyright 2004 Texas Insturments
   3  *
   4  * (C) Copyright 2002
   5  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   6  * Marius Groeger <mgroeger@sysgo.de>
   7  *
   8  * (C) Copyright 2002
   9  * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  10  *
  11  * See file CREDITS for list of people who contributed to this
  12  * project.
  13  *
  14  * This program is free software; you can redistribute it and/or
  15  * modify it under the terms of the GNU General Public License as
  16  * published by the Free Software Foundation; either version 2 of
  17  * the License, or (at your option) any later version.
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * You should have received a copy of the GNU General Public License
  25  * along with this program; if not, write to the Free Software
  26  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  27  * MA 02111-1307 USA
  28  */
  29
  30 /*
  31  * CPU specific code
  32  */
  33
  34 #include <common.h>
  35 #include <command.h>
  36 #include <asm/system.h>
  37
  38 static void cache_flush (void);
  39
  40 int cleanup_before_linux (void)
  41 {
  42         /*
  43          * this function is called just before we call linux
  44          * it prepares the processor for linux
  45          *
  46          * we turn off caches etc ...
  47          */
  48
  49         disable_interrupts ();
  50
  51         /* turn off I/D-cache */
  52         icache_disable();
  53         dcache_disable();
  54         /* flush I/D-cache */
  55         cache_flush();
  56
  57         return 0;
  58 }
  59
  60 /* flush I/D-cache */
  61 static void cache_flush (void)
  62 {
  63         /* invalidate both caches and flush btb */
  64         asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (0));
  65         /* mem barrier to sync things */
  66         asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (0));
  67 }