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git.ipfire.org Git - people/ms/u-boot.git/blob - arch/arm/cpu/arm920t/ks8695/timer.c
0852502f91c9b7db2087b14680939e9480474a55
2 * (C) Copyright 2004-2005, Greg Ungerer <greg.ungerer@opengear.com>
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <asm/arch/platform.h>
27 * Initial timer set constants. Nothing complicated, just set for a 1ms
30 #define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_1)
31 #define TIMER_COUNT (TIMER_INTERVAL / 2)
32 #define TIMER_PULSE TIMER_COUNT
35 * Handy KS8695 register access functions.
37 #define ks8695_read(a) *((volatile ulong *) (KS8695_IO_BASE + (a)))
38 #define ks8695_write(a,v) *((volatile ulong *) (KS8695_IO_BASE + (a))) = (v)
44 /* Set the hadware timer for 1ms */
45 ks8695_write(KS8695_TIMER1
, TIMER_COUNT
);
46 ks8695_write(KS8695_TIMER1_PCOUNT
, TIMER_PULSE
);
47 ks8695_write(KS8695_TIMER_CTRL
, 0x2);
53 ulong
get_timer_masked(void)
55 /* Check for timer wrap */
56 if (ks8695_read(KS8695_INT_STATUS
) & KS8695_INTMASK_TIMERINT1
) {
57 /* Clear interrupt condition */
58 ks8695_write(KS8695_INT_STATUS
, KS8695_INTMASK_TIMERINT1
);
64 ulong
get_timer(ulong base
)
66 return (get_timer_masked() - base
);
69 void __udelay(ulong usec
)
71 ulong start
= get_timer_masked();
74 /* Only 1ms resolution :-( */
76 while (get_timer(start
) < end
)
80 void reset_cpu (ulong ignored
)
84 /* Set timer0 to watchdog, and let it timeout */
85 tc
= ks8695_read(KS8695_TIMER_CTRL
) & 0x2;
86 ks8695_write(KS8695_TIMER_CTRL
, tc
);
87 ks8695_write(KS8695_TIMER0
, ((10 << 8) | 0xff));
88 ks8695_write(KS8695_TIMER_CTRL
, (tc
| 0x1));
90 /* Should only wait here till watchdog resets */