2 * Copyright 2014-2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <efi_loader.h>
10 #include <fdt_support.h>
12 #ifdef CONFIG_FSL_LSCH3
13 #include <asm/arch/fdt.h>
15 #ifdef CONFIG_FSL_ESDHC
16 #include <fsl_esdhc.h>
18 #ifdef CONFIG_SYS_DPAA_FMAN
22 #include <asm/arch/mp.h>
25 #include <asm/arch-fsl-layerscape/soc.h>
26 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
27 #include <asm/armv8/sec_firmware.h>
30 int fdt_fixup_phy_connection(void *blob
, int offset
, phy_interface_t phyc
)
32 return fdt_setprop_string(blob
, offset
, "phy-connection-type",
33 phy_string_for_interface(phyc
));
37 void ft_fixup_cpu(void *blob
)
40 __maybe_unused u64 spin_tbl_addr
= (u64
)get_spin_tbl_addr();
44 size_t *boot_code_size
= &(__secondary_boot_code_size
);
45 #if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \
46 defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
50 /* Check the psci version to determine if the psci is supported */
51 psci_ver
= sec_firmware_support_psci_version();
52 if (psci_ver
== 0xffffffff) {
53 /* remove psci DT node */
54 node
= fdt_path_offset(blob
, "/psci");
56 goto remove_psci_node
;
58 node
= fdt_node_offset_by_compatible(blob
, -1, "arm,psci");
60 goto remove_psci_node
;
62 node
= fdt_node_offset_by_compatible(blob
, -1, "arm,psci-0.2");
64 goto remove_psci_node
;
66 node
= fdt_node_offset_by_compatible(blob
, -1, "arm,psci-1.0");
68 goto remove_psci_node
;
72 fdt_del_node(blob
, node
);
77 off
= fdt_path_offset(blob
, "/cpus");
79 puts("couldn't find /cpus node\n");
82 fdt_support_default_count_cells(blob
, off
, &addr_cells
, NULL
);
84 off
= fdt_node_offset_by_prop_value(blob
, -1, "device_type", "cpu", 4);
85 while (off
!= -FDT_ERR_NOTFOUND
) {
86 reg
= (fdt32_t
*)fdt_getprop(blob
, off
, "reg", 0);
88 core_id
= fdt_read_number(reg
, addr_cells
);
89 if (core_id
== 0 || (is_core_online(core_id
))) {
91 val
+= id_to_core(core_id
) *
93 val
= cpu_to_fdt64(val
);
94 fdt_setprop_string(blob
, off
, "enable-method",
96 fdt_setprop(blob
, off
, "cpu-release-addr",
99 debug("skipping offline core\n");
102 puts("Warning: found cpu node without reg property\n");
104 off
= fdt_node_offset_by_prop_value(blob
, off
, "device_type",
108 fdt_add_mem_rsv(blob
, (uintptr_t)&secondary_boot_code
,
110 #if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD)
111 efi_add_memory_map((uintptr_t)&secondary_boot_code
,
112 ALIGN(*boot_code_size
, EFI_PAGE_SIZE
) >> EFI_PAGE_SHIFT
,
113 EFI_RESERVED_MEMORY_TYPE
, false);
118 void fsl_fdt_disable_usb(void *blob
)
122 * SYSCLK is used as a reference clock for USB. When the USB
123 * controller is used, SYSCLK must meet the additional requirement
126 if (CONFIG_SYS_CLK_FREQ
!= 100000000) {
127 off
= fdt_node_offset_by_compatible(blob
, -1, "snps,dwc3");
128 while (off
!= -FDT_ERR_NOTFOUND
) {
129 fdt_status_disabled(blob
, off
);
130 off
= fdt_node_offset_by_compatible(blob
, off
,
136 #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
137 static void fdt_fixup_gic(void *blob
)
141 struct ccsr_gur __iomem
*gur
= (void *)(CONFIG_SYS_FSL_GUTS_ADDR
);
143 struct ccsr_scfg __iomem
*scfg
= (void *)CONFIG_SYS_FSL_SCFG_ADDR
;
146 val
= gur_in32(&gur
->svr
);
148 if (SVR_SOC_VER(val
) != SVR_LS1043A
) {
150 } else if (SVR_REV(val
) != REV1_0
) {
151 val
= scfg_in32(&scfg
->gic_align
) & (0x01 << GIC_ADDR_BIT
);
156 offset
= fdt_subnode_offset(blob
, 0, "interrupt-controller@1400000");
158 printf("WARNING: fdt_subnode_offset can't find node %s: %s\n",
159 "interrupt-controller@1400000", fdt_strerror(offset
));
163 /* Fixup gic node align with 64K */
165 reg
[0] = cpu_to_fdt64(GICD_BASE_64K
);
166 reg
[1] = cpu_to_fdt64(GICD_SIZE_64K
);
167 reg
[2] = cpu_to_fdt64(GICC_BASE_64K
);
168 reg
[3] = cpu_to_fdt64(GICC_SIZE_64K
);
169 reg
[4] = cpu_to_fdt64(GICH_BASE_64K
);
170 reg
[5] = cpu_to_fdt64(GICH_SIZE_64K
);
171 reg
[6] = cpu_to_fdt64(GICV_BASE_64K
);
172 reg
[7] = cpu_to_fdt64(GICV_SIZE_64K
);
174 /* Fixup gic node align with default */
175 reg
[0] = cpu_to_fdt64(GICD_BASE
);
176 reg
[1] = cpu_to_fdt64(GICD_SIZE
);
177 reg
[2] = cpu_to_fdt64(GICC_BASE
);
178 reg
[3] = cpu_to_fdt64(GICC_SIZE
);
179 reg
[4] = cpu_to_fdt64(GICH_BASE
);
180 reg
[5] = cpu_to_fdt64(GICH_SIZE
);
181 reg
[6] = cpu_to_fdt64(GICV_BASE
);
182 reg
[7] = cpu_to_fdt64(GICV_SIZE
);
185 err
= fdt_setprop(blob
, offset
, "reg", reg
, sizeof(reg
));
187 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
188 "reg", "interrupt-controller@1400000",
197 #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI
198 static int _fdt_fixup_msi_node(void *blob
, const char *name
,
199 int irq_0
, int irq_1
, int rev
)
201 int err
, offset
, len
;
205 offset
= fdt_path_offset(blob
, name
);
207 printf("WARNING: fdt_path_offset can't find path %s: %s\n",
208 name
, fdt_strerror(offset
));
212 /*fixup the property of interrupts*/
214 tmp
[0][0] = cpu_to_fdt32(0x0);
215 tmp
[0][1] = cpu_to_fdt32(irq_0
);
216 tmp
[0][2] = cpu_to_fdt32(0x4);
219 tmp
[1][0] = cpu_to_fdt32(0x0);
220 tmp
[1][1] = cpu_to_fdt32(irq_1
);
221 tmp
[1][2] = cpu_to_fdt32(0x4);
222 tmp
[2][0] = cpu_to_fdt32(0x0);
223 tmp
[2][1] = cpu_to_fdt32(irq_1
+ 1);
224 tmp
[2][2] = cpu_to_fdt32(0x4);
225 tmp
[3][0] = cpu_to_fdt32(0x0);
226 tmp
[3][1] = cpu_to_fdt32(irq_1
+ 2);
227 tmp
[3][2] = cpu_to_fdt32(0x4);
230 len
= sizeof(tmp
[0]);
233 err
= fdt_setprop(blob
, offset
, "interrupts", tmp
, len
);
235 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
236 "interrupts", name
, fdt_strerror(err
));
240 /*fixup the property of reg*/
241 p
= (char *)fdt_getprop(blob
, offset
, "reg", &len
);
243 printf("WARNING: fdt_getprop can't get %s from node %s\n",
248 memcpy((char *)tmp
, p
, len
);
251 *((u32
*)tmp
+ 3) = cpu_to_fdt32(0x1000);
253 *((u32
*)tmp
+ 3) = cpu_to_fdt32(0x8);
255 err
= fdt_setprop(blob
, offset
, "reg", tmp
, len
);
257 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
258 "reg", name
, fdt_strerror(err
));
262 /*fixup the property of compatible*/
264 err
= fdt_setprop_string(blob
, offset
, "compatible",
265 "fsl,ls1043a-v1.1-msi");
267 err
= fdt_setprop_string(blob
, offset
, "compatible",
270 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
271 "compatible", name
, fdt_strerror(err
));
278 static int _fdt_fixup_pci_msi(void *blob
, const char *name
, int rev
)
280 int offset
, len
, err
;
285 offset
= fdt_path_offset(blob
, name
);
287 printf("WARNING: fdt_path_offset can't find path %s: %s\n",
288 name
, fdt_strerror(offset
));
292 p
= (char *)fdt_getprop(blob
, offset
, "interrupt-map", &len
);
293 if (!p
|| len
!= sizeof(tmp
)) {
294 printf("WARNING: fdt_getprop can't get %s from node %s\n",
295 "interrupt-map", name
);
299 memcpy((char *)tmp
, p
, len
);
301 val
= fdt32_to_cpu(tmp
[0][6]);
303 tmp
[1][6] = cpu_to_fdt32(val
+ 1);
304 tmp
[2][6] = cpu_to_fdt32(val
+ 2);
305 tmp
[3][6] = cpu_to_fdt32(val
+ 3);
307 tmp
[1][6] = cpu_to_fdt32(val
);
308 tmp
[2][6] = cpu_to_fdt32(val
);
309 tmp
[3][6] = cpu_to_fdt32(val
);
312 err
= fdt_setprop(blob
, offset
, "interrupt-map", tmp
, sizeof(tmp
));
314 printf("WARNING: fdt_setprop can't set %s from node %s: %s.\n",
315 "interrupt-map", name
, fdt_strerror(err
));
321 /* Fixup msi node for ls1043a rev1.1*/
323 static void fdt_fixup_msi(void *blob
)
325 struct ccsr_gur __iomem
*gur
= (void *)(CONFIG_SYS_FSL_GUTS_ADDR
);
328 rev
= gur_in32(&gur
->svr
);
330 if (SVR_SOC_VER(rev
) != SVR_LS1043A
)
335 _fdt_fixup_msi_node(blob
, "/soc/msi-controller1@1571000",
337 _fdt_fixup_msi_node(blob
, "/soc/msi-controller2@1572000",
339 _fdt_fixup_msi_node(blob
, "/soc/msi-controller3@1573000",
342 _fdt_fixup_pci_msi(blob
, "/soc/pcie@3400000", rev
);
343 _fdt_fixup_pci_msi(blob
, "/soc/pcie@3500000", rev
);
344 _fdt_fixup_pci_msi(blob
, "/soc/pcie@3600000", rev
);
348 void ft_cpu_setup(void *blob
, bd_t
*bd
)
350 #ifdef CONFIG_FSL_LSCH2
351 struct ccsr_gur __iomem
*gur
= (void *)(CONFIG_SYS_FSL_GUTS_ADDR
);
352 unsigned int svr
= in_be32(&gur
->svr
);
354 /* delete crypto node if not on an E-processor */
355 if (!IS_E_PROCESSOR(svr
))
356 fdt_fixup_crypto_node(blob
, 0);
357 #if CONFIG_SYS_FSL_SEC_COMPAT >= 4
359 ccsr_sec_t __iomem
*sec
;
361 sec
= (void __iomem
*)CONFIG_SYS_FSL_SEC_ADDR
;
362 fdt_fixup_crypto_node(blob
, sec_in32(&sec
->secvid_ms
));
371 #ifdef CONFIG_SYS_NS16550
372 do_fixup_by_compat_u32(blob
, "fsl,ns16550",
373 "clock-frequency", CONFIG_SYS_NS16550_CLK
, 1);
376 do_fixup_by_path_u32(blob
, "/sysclk", "clock-frequency",
377 CONFIG_SYS_CLK_FREQ
, 1);
380 ft_pci_setup(blob
, bd
);
383 #ifdef CONFIG_FSL_ESDHC
384 fdt_fixup_esdhc(blob
, bd
);
387 #ifdef CONFIG_SYS_DPAA_FMAN
388 fdt_fixup_fman_firmware(blob
);
390 #ifndef CONFIG_LS1012A
391 fsl_fdt_disable_usb(blob
);
393 #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
396 #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI