arch/arm/include/asm/arch-exynos/clk.h

   1 /*
   2  * (C) Copyright 2010 Samsung Electronics
   3  * Minkyu Kang <mk7.kang@samsung.com>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __ASM_ARM_ARCH_CLK_H_
   9 #define __ASM_ARM_ARCH_CLK_H_
  10
  11 #define APLL    0
  12 #define MPLL    1
  13 #define EPLL    2
  14 #define HPLL    3
  15 #define VPLL    4
  16 #define BPLL    5
  17
  18 enum pll_src_bit {
  19         EXYNOS_SRC_MPLL = 6,
  20         EXYNOS_SRC_EPLL,
  21         EXYNOS_SRC_VPLL,
  22 };
  23
  24 unsigned long get_pll_clk(int pllreg);
  25 unsigned long get_arm_clk(void);
  26 unsigned long get_i2c_clk(void);
  27 unsigned long get_pwm_clk(void);
  28 unsigned long get_uart_clk(int dev_index);
  29 unsigned long get_mmc_clk(int dev_index);
  30 void set_mmc_clk(int dev_index, unsigned int div);
  31 unsigned long get_lcd_clk(void);
  32 void set_lcd_clk(void);
  33 void set_mipi_clk(void);
  34 void set_i2s_clk_source(void);
  35 int set_i2s_clk_prescaler(unsigned int src_frq, unsigned int dst_frq);
  36 int set_epll_clk(unsigned long rate);
  37 int set_spi_clk(int periph_id, unsigned int rate);
  38
  39 /**
  40  * get the clk frequency of the required peripheral
  41  *
  42  * @param peripheral    Peripheral id
  43  *
  44  * @return frequency of the peripheral clk
  45  */
  46 unsigned long clock_get_periph_rate(int peripheral);
  47
  48 #endif