arch/arm/include/asm/arch-u8500/hardware.h

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2009
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  20  * MA 02110-1301 USA
  21  */
  22
  23 #ifndef __ASM_ARCH_HARDWARE_H
  24 #define __ASM_ARCH_HARDWARE_H
  25
  26 /* Peripheral clusters */
  27
  28 #define U8500_PER3_BASE         0x80000000
  29 #define U8500_PER2_BASE         0x80110000
  30 #define U8500_PER1_BASE         0x80120000
  31 #define U8500_PER4_BASE         0x80150000
  32
  33 #define U8500_PER6_BASE         0xa03c0000
  34 #define U8500_PER7_BASE         0xa03d0000
  35 #define U8500_PER5_BASE         0xa03e0000
  36
  37 /* GPIO */
  38
  39 #define U8500_GPIO0_BASE        (U8500_PER1_BASE + 0xE000)
  40 #define U8500_GPIO1_BASE        (U8500_PER1_BASE + 0xE000 + 0x80)
  41
  42 #define U8500_GPIO2_BASE        (U8500_PER3_BASE + 0xE000)
  43 #define U8500_GPIO3_BASE        (U8500_PER3_BASE + 0xE000 + 0x80)
  44 #define U8500_GPIO4_BASE        (U8500_PER3_BASE + 0xE000 + 0x100)
  45 #define U8500_GPIO5_BASE        (U8500_PER3_BASE + 0xE000 + 0x180)
  46
  47 #define U8500_GPIO6_BASE        (U8500_PER2_BASE + 0xE000)
  48 #define U8500_GPIO7_BASE        (U8500_PER2_BASE + 0xE000 + 0x80)
  49
  50 #define U8500_GPIO8_BASE        (U8500_PER5_BASE + 0x1E000)
  51
  52 /* Per7 */
  53 #define U8500_CLKRST7_BASE      (U8500_PER7_BASE + 0xf000)
  54
  55 /* Per6 */
  56 #define U8500_MTU0_BASE_V1      (U8500_PER6_BASE + 0x6000)
  57 #define U8500_MTU1_BASE_V1      (U8500_PER6_BASE + 0x7000)
  58 #define U8500_CLKRST6_BASE      (U8500_PER6_BASE + 0xf000)
  59
  60 /* Per5 */
  61 #define U8500_CLKRST5_BASE      (U8500_PER5_BASE + 0x1f000)
  62
  63 /* Per4 */
  64 #define U8500_PRCMU_BASE        (U8500_PER4_BASE + 0x07000)
  65 #define U8500_PRCMU_TCDM_BASE   (U8500_PER4_BASE + 0x68000)
  66
  67 /* Per3 */
  68 #define U8500_UART2_BASE        (U8500_PER3_BASE + 0x7000)
  69 #define U8500_CLKRST3_BASE      (U8500_PER3_BASE + 0xf000)
  70
  71 /* Per2 */
  72 #define U8500_CLKRST2_BASE      (U8500_PER2_BASE + 0xf000)
  73
  74 /* Per1 */
  75 #define U8500_UART0_BASE        (U8500_PER1_BASE + 0x0000)
  76 #define U8500_UART1_BASE        (U8500_PER1_BASE + 0x1000)
  77 #define U8500_CLKRST1_BASE      (U8500_PER1_BASE + 0xf000)
  78
  79 /* Last page of Boot ROM */
  80 #define U8500_BOOTROM_BASE      0x9001f000
  81 #define U8500_BOOTROM_ASIC_ID_OFFSET    0x0ff4
  82
  83 /* AB8500 specifics */
  84 #define AB8500_MISC             0x0010
  85 #define AB8500_GPIO_SEL2_REG    0x1001
  86 #define AB8500_GPIO_DIR2_REG    0x1011
  87 #define AB8500_GPIO_DIR4_REG    0x1013
  88 #define AB8500_GPIO_SEL4_REG    0x1003
  89 #define AB8500_GPIO_OUT2_REG    0x1021
  90 #define AB8500_GPIO_OUT4_REG    0x1023
  91
  92 #endif /* __ASM_ARCH_HARDWARE_H */