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1 /*
2 * Copyright 2007 Freescale Semiconductor, Inc.
3 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26 #include <common.h>
27 #include <libfdt.h>
28 #include <fdt_support.h>
29 #include <asm/processor.h>
30
31 extern void ft_qe_setup(void *blob);
32
33 DECLARE_GLOBAL_DATA_PTR;
34
35 #if defined(CONFIG_BOOTCOUNT_LIMIT) && \
36 (defined(CONFIG_QE))
37 #include <asm/immap_qe.h>
38
39 void fdt_fixup_muram (void *blob)
40 {
41 ulong data[2];
42
43 data[0] = 0;
44 data[1] = QE_MURAM_SIZE - 2 * sizeof(unsigned long);
45 do_fixup_by_compat(blob, "fsl,qe-muram-data", "reg",
46 data, sizeof (data), 0);
47 }
48 #endif
49
50 void ft_cpu_setup(void *blob, bd_t *bd)
51 {
52 immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
53 int spridr = immr->sysconf.spridr;
54
55 /*
56 * delete crypto node if not on an E-processor
57 * initial revisions of the MPC834xE/6xE have the original SEC 2.0.
58 * EA revisions got the SEC uprevved to 2.4 but since the default device
59 * tree contains SEC 2.0 properties we uprev them here.
60 */
61 if (!IS_E_PROCESSOR(spridr))
62 fdt_fixup_crypto_node(blob, 0);
63 else if (IS_E_PROCESSOR(spridr) &&
64 (SPR_FAMILY(spridr) == SPR_834X_FAMILY ||
65 SPR_FAMILY(spridr) == SPR_836X_FAMILY) &&
66 REVID_MAJOR(spridr) >= 2)
67 fdt_fixup_crypto_node(blob, 0x0204);
68
69 #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
70 defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) ||\
71 defined(CONFIG_HAS_ETH4) || defined(CONFIG_HAS_ETH5)
72 fdt_fixup_ethernet(blob);
73 #ifdef CONFIG_MPC8313
74 /*
75 * mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1
76 * h/w (see AN3545). The base device tree in use has rev. 1 ID numbers,
77 * so if on Rev. 2 (and higher) h/w, we fix them up here
78 */
79 if (REVID_MAJOR(immr->sysconf.spridr) >= 2) {
80 int nodeoffset, path;
81 const char *prop;
82
83 nodeoffset = fdt_path_offset(blob, "/aliases");
84 if (nodeoffset >= 0) {
85 #if defined(CONFIG_HAS_ETH0)
86 prop = fdt_getprop(blob, nodeoffset, "ethernet0", NULL);
87 if (prop) {
88 u32 tmp[] = { 32, 0x8, 33, 0x8, 34, 0x8 };
89
90 path = fdt_path_offset(blob, prop);
91 prop = fdt_getprop(blob, path, "interrupts",
92 NULL);
93 if (prop)
94 fdt_setprop(blob, path, "interrupts",
95 &tmp, sizeof(tmp));
96 }
97 #endif
98 #if defined(CONFIG_HAS_ETH1)
99 prop = fdt_getprop(blob, nodeoffset, "ethernet1", NULL);
100 if (prop) {
101 u32 tmp[] = { 35, 0x8, 36, 0x8, 37, 0x8 };
102
103 path = fdt_path_offset(blob, prop);
104 prop = fdt_getprop(blob, path, "interrupts",
105 NULL);
106 if (prop)
107 fdt_setprop(blob, path, "interrupts",
108 &tmp, sizeof(tmp));
109 }
110 #endif
111 }
112 }
113 #endif
114 #endif
115
116 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
117 "timebase-frequency", (bd->bi_busfreq / 4), 1);
118 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
119 "bus-frequency", bd->bi_busfreq, 1);
120 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
121 "clock-frequency", gd->arch.core_clk, 1);
122 do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
123 "bus-frequency", bd->bi_busfreq, 1);
124 do_fixup_by_compat_u32(blob, "fsl,soc",
125 "bus-frequency", bd->bi_busfreq, 1);
126 do_fixup_by_compat_u32(blob, "fsl,soc",
127 "clock-frequency", bd->bi_busfreq, 1);
128 do_fixup_by_compat_u32(blob, "fsl,immr",
129 "bus-frequency", bd->bi_busfreq, 1);
130 do_fixup_by_compat_u32(blob, "fsl,immr",
131 "clock-frequency", bd->bi_busfreq, 1);
132 #ifdef CONFIG_QE
133 ft_qe_setup(blob);
134 #endif
135
136 #ifdef CONFIG_SYS_NS16550
137 do_fixup_by_compat_u32(blob, "ns16550",
138 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
139 #endif
140
141 fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
142
143 #if defined(CONFIG_BOOTCOUNT_LIMIT)
144 fdt_fixup_muram (blob);
145 #endif
146 }