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[people/ms/u-boot.git] / arch / powerpc / cpu / mpc8xxx / cpu.c
1 /*
2 * Copyright 2009-2010 Freescale Semiconductor, Inc.
3 *
4 * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and
5 * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains
6 * cpu specific common code for 85xx/86xx processors.
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26 #include <config.h>
27 #include <common.h>
28 #include <command.h>
29 #include <tsec.h>
30 #include <netdev.h>
31 #include <asm/cache.h>
32 #include <asm/io.h>
33
34 DECLARE_GLOBAL_DATA_PTR;
35
36 struct cpu_type cpu_type_list [] = {
37 #if defined(CONFIG_MPC85xx)
38 CPU_TYPE_ENTRY(8533, 8533, 1),
39 CPU_TYPE_ENTRY(8533, 8533_E, 1),
40 CPU_TYPE_ENTRY(8535, 8535, 1),
41 CPU_TYPE_ENTRY(8535, 8535_E, 1),
42 CPU_TYPE_ENTRY(8536, 8536, 1),
43 CPU_TYPE_ENTRY(8536, 8536_E, 1),
44 CPU_TYPE_ENTRY(8540, 8540, 1),
45 CPU_TYPE_ENTRY(8541, 8541, 1),
46 CPU_TYPE_ENTRY(8541, 8541_E, 1),
47 CPU_TYPE_ENTRY(8543, 8543, 1),
48 CPU_TYPE_ENTRY(8543, 8543_E, 1),
49 CPU_TYPE_ENTRY(8544, 8544, 1),
50 CPU_TYPE_ENTRY(8544, 8544_E, 1),
51 CPU_TYPE_ENTRY(8545, 8545, 1),
52 CPU_TYPE_ENTRY(8545, 8545_E, 1),
53 CPU_TYPE_ENTRY(8547, 8547_E, 1),
54 CPU_TYPE_ENTRY(8548, 8548, 1),
55 CPU_TYPE_ENTRY(8548, 8548_E, 1),
56 CPU_TYPE_ENTRY(8555, 8555, 1),
57 CPU_TYPE_ENTRY(8555, 8555_E, 1),
58 CPU_TYPE_ENTRY(8560, 8560, 1),
59 CPU_TYPE_ENTRY(8567, 8567, 1),
60 CPU_TYPE_ENTRY(8567, 8567_E, 1),
61 CPU_TYPE_ENTRY(8568, 8568, 1),
62 CPU_TYPE_ENTRY(8568, 8568_E, 1),
63 CPU_TYPE_ENTRY(8569, 8569, 1),
64 CPU_TYPE_ENTRY(8569, 8569_E, 1),
65 CPU_TYPE_ENTRY(8572, 8572, 2),
66 CPU_TYPE_ENTRY(8572, 8572_E, 2),
67 CPU_TYPE_ENTRY(P1011, P1011, 1),
68 CPU_TYPE_ENTRY(P1011, P1011_E, 1),
69 CPU_TYPE_ENTRY(P1012, P1012, 1),
70 CPU_TYPE_ENTRY(P1012, P1012_E, 1),
71 CPU_TYPE_ENTRY(P1013, P1013, 1),
72 CPU_TYPE_ENTRY(P1013, P1013_E, 1),
73 CPU_TYPE_ENTRY(P1020, P1020, 2),
74 CPU_TYPE_ENTRY(P1020, P1020_E, 2),
75 CPU_TYPE_ENTRY(P1021, P1021, 2),
76 CPU_TYPE_ENTRY(P1021, P1021_E, 2),
77 CPU_TYPE_ENTRY(P1022, P1022, 2),
78 CPU_TYPE_ENTRY(P1022, P1022_E, 2),
79 CPU_TYPE_ENTRY(P2010, P2010, 1),
80 CPU_TYPE_ENTRY(P2010, P2010_E, 1),
81 CPU_TYPE_ENTRY(P2020, P2020, 2),
82 CPU_TYPE_ENTRY(P2020, P2020_E, 2),
83 CPU_TYPE_ENTRY(P3041, P3041, 4),
84 CPU_TYPE_ENTRY(P3041, P3041_E, 4),
85 CPU_TYPE_ENTRY(P4040, P4040, 4),
86 CPU_TYPE_ENTRY(P4040, P4040_E, 4),
87 CPU_TYPE_ENTRY(P4080, P4080, 8),
88 CPU_TYPE_ENTRY(P4080, P4080_E, 8),
89 CPU_TYPE_ENTRY(P5010, P5010, 1),
90 CPU_TYPE_ENTRY(P5010, P5010_E, 1),
91 CPU_TYPE_ENTRY(P5020, P5020, 2),
92 CPU_TYPE_ENTRY(P5020, P5020_E, 2),
93 #elif defined(CONFIG_MPC86xx)
94 CPU_TYPE_ENTRY(8610, 8610, 1),
95 CPU_TYPE_ENTRY(8641, 8641, 2),
96 CPU_TYPE_ENTRY(8641D, 8641D, 2),
97 #endif
98 };
99
100 struct cpu_type cpu_type_unknown = CPU_TYPE_ENTRY(Unknown, Unknown, 1);
101
102 struct cpu_type *identify_cpu(u32 ver)
103 {
104 int i;
105 for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++) {
106 if (cpu_type_list[i].soc_ver == ver)
107 return &cpu_type_list[i];
108 }
109 return &cpu_type_unknown;
110 }
111
112 int cpu_numcores() {
113 ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
114 struct cpu_type *cpu = gd->cpu;
115
116 /* better to query feature reporting register than just assume 1 */
117 #define MPC8xxx_PICFRR_NCPU_MASK 0x00001f00
118 #define MPC8xxx_PICFRR_NCPU_SHIFT 8
119 if (cpu == &cpu_type_unknown)
120 return ((in_be32(&pic->frr) & MPC8xxx_PICFRR_NCPU_MASK) >>
121 MPC8xxx_PICFRR_NCPU_SHIFT) + 1;
122
123 return cpu->num_cores;
124 }
125
126 int probecpu (void)
127 {
128 uint svr;
129 uint ver;
130
131 svr = get_svr();
132 ver = SVR_SOC_VER(svr);
133
134 gd->cpu = identify_cpu(ver);
135
136 return 0;
137 }
138
139 /*
140 * Initializes on-chip ethernet controllers.
141 * to override, implement board_eth_init()
142 */
143 int cpu_eth_init(bd_t *bis)
144 {
145 #if defined(CONFIG_ETHER_ON_FCC)
146 fec_initialize(bis);
147 #endif
148
149 #if defined(CONFIG_UEC_ETH)
150 uec_standard_init(bis);
151 #endif
152
153 #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC)
154 tsec_standard_init(bis);
155 #endif
156
157 return 0;
158 }