arch/powerpc/include/asm/fsl_liodn.h

   1 /*
   2  * Copyright 2009-2011 Freescale Semiconductor, Inc.
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22
  23 #ifndef _FSL_LIODN_H_
  24 #define _FSL_LIODN_H_
  25
  26 #include <asm/types.h>
  27
  28 struct srio_liodn_id_table {
  29         u32 id[2];
  30         unsigned long reg_offset[2];
  31         u8 num_ids;
  32         u8 portid;
  33 };
  34 #define SET_SRIO_LIODN_1(port, idA) \
  35         { .id = { idA }, .num_ids = 1, .portid = port, \
  36           .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
  37                 + CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
  38         }
  39
  40 #define SET_SRIO_LIODN_2(port, idA, idB) \
  41         { .id = { idA, idB }, .num_ids = 2, .portid = port, \
  42           .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
  43                 + CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
  44           .reg_offset[1] = offsetof(ccsr_gur_t, rio##port##maintliodnr) \
  45                 + CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
  46         }
  47
  48 struct liodn_id_table {
  49         const char * compat;
  50         u32 id[2];
  51         u8 num_ids;
  52         phys_addr_t compat_offset;
  53         unsigned long reg_offset;
  54 };
  55
  56 extern u32 get_ppid_liodn(int ppid_tbl_idx, int ppid);
  57 extern void set_liodns(void);
  58 extern void fdt_fixup_liodn(void *blob);
  59
  60 #define SET_LIODN_BASE_1(idA) \
  61         { .id = { idA }, .num_ids = 1, }
  62
  63 #define SET_LIODN_BASE_2(idA, idB) \
  64         { .id = { idA, idB }, .num_ids = 2 }
  65
  66 #define SET_LIODN_ENTRY_1(name, idA, off, compatoff) \
  67         { .compat = name, \
  68           .id = { idA }, .num_ids = 1, \
  69           .reg_offset = off + CONFIG_SYS_CCSRBAR, \
  70           .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
  71         }
  72
  73 #define SET_LIODN_ENTRY_2(name, idA, idB, off, compatoff) \
  74         { .compat = name, \
  75           .id = { idA, idB }, .num_ids = 2, \
  76           .reg_offset = off + CONFIG_SYS_CCSRBAR, \
  77           .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
  78         }
  79
  80 #define SET_GUTS_LIODN(compat, liodn, name, compatoff) \
  81         SET_LIODN_ENTRY_1(compat, liodn, \
  82                 offsetof(ccsr_gur_t, name) + CONFIG_SYS_MPC85xx_GUTS_OFFSET, \
  83                 compatoff)
  84
  85 #define SET_USB_LIODN(usbNum, compat, liodn) \
  86         SET_GUTS_LIODN(compat, liodn, usb##usbNum##liodnr,\
  87                 CONFIG_SYS_MPC85xx_USB##usbNum##_OFFSET)
  88
  89 #define SET_SATA_LIODN(sataNum, liodn) \
  90         SET_GUTS_LIODN("fsl,pq-sata-v2", liodn, sata##sataNum##liodnr,\
  91                 CONFIG_SYS_MPC85xx_SATA##sataNum##_OFFSET)
  92
  93 #define SET_PCI_LIODN(compat, pciNum, liodn) \
  94         SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\
  95                 CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
  96
  97 #define SET_PCI_LIODN_BASE(compat, pciNum, liodn) \
  98         SET_LIODN_ENTRY_1(compat, liodn,\
  99                 offsetof(ccsr_pcix_t, liodn_base) + CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET,\
 100                 CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
 101
 102 /* reg nodes for DMA start @ 0x300 */
 103 #define SET_DMA_LIODN(dmaNum, liodn) \
 104         SET_GUTS_LIODN("fsl,eloplus-dma", liodn, dma##dmaNum##liodnr,\
 105                 CONFIG_SYS_MPC85xx_DMA##dmaNum##_OFFSET + 0x300)
 106
 107 #define SET_SDHC_LIODN(sdhcNum, liodn) \
 108         SET_GUTS_LIODN("fsl,esdhc", liodn, sdmmc##sdhcNum##liodnr,\
 109                 CONFIG_SYS_MPC85xx_ESDHC_OFFSET)
 110
 111 #define SET_QMAN_LIODN(liodn) \
 112         SET_LIODN_ENTRY_1("fsl,qman", liodn, offsetof(ccsr_qman_t, liodnr) + \
 113                 CONFIG_SYS_FSL_QMAN_OFFSET, \
 114                 CONFIG_SYS_FSL_QMAN_OFFSET)
 115
 116 #define SET_BMAN_LIODN(liodn) \
 117         SET_LIODN_ENTRY_1("fsl,bman", liodn, offsetof(ccsr_bman_t, liodnr) + \
 118                 CONFIG_SYS_FSL_BMAN_OFFSET, \
 119                 CONFIG_SYS_FSL_BMAN_OFFSET)
 120
 121 #define SET_PME_LIODN(liodn) \
 122         SET_LIODN_ENTRY_1("fsl,pme", liodn, offsetof(ccsr_pme_t, liodnr) + \
 123                 CONFIG_SYS_FSL_CORENET_PME_OFFSET, \
 124                 CONFIG_SYS_FSL_CORENET_PME_OFFSET)
 125
 126 #define SET_PMAN_LIODN(num, liodn) \
 127         SET_LIODN_ENTRY_2("fsl,pman", liodn, 0, \
 128                 offsetof(struct ccsr_pman, ppa1) + \
 129                 CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET, \
 130                 CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET)
 131
 132 /* -1 from portID due to how immap has the registers */
 133 #define FM_PPID_RX_PORT_OFFSET(fmNum, portID) \
 134         CONFIG_SYS_FSL_FM##fmNum##_OFFSET + \
 135         offsetof(struct ccsr_fman, fm_bmi_common.fmbm_ppid[portID - 1])
 136
 137 /* enetNum is 0, 1, 2... so we + 8 for 1g to get to HW Port ID */
 138 #define SET_FMAN_RX_1G_LIODN(fmNum, enetNum, liodn) \
 139         SET_LIODN_ENTRY_1("fsl,fman-port-1g-rx", liodn, \
 140                 FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
 141                 CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET) \
 142
 143 /* enetNum is 0, 1, 2... so we + 16 for 10g to get to HW Port ID */
 144 #define SET_FMAN_RX_10G_LIODN(fmNum, enetNum, liodn) \
 145         SET_LIODN_ENTRY_1("fsl,fman-port-10g-rx", liodn, \
 146                 FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \
 147                 CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_10G_OFFSET) \
 148
 149 /*
 150  * handle both old and new versioned SEC properties:
 151  * "fsl,secX.Y" became "fsl,sec-vX.Y" during development
 152  */
 153 #define SET_SEC_JR_LIODN_ENTRY(jrNum, liodnA, liodnB) \
 154         SET_LIODN_ENTRY_2("fsl,sec4.0-job-ring", liodnA, liodnB,\
 155                 offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \
 156                 CONFIG_SYS_FSL_SEC_OFFSET, \
 157                 CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum), \
 158         SET_LIODN_ENTRY_2("fsl,sec-v4.0-job-ring", liodnA, liodnB,\
 159                 offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \
 160                 CONFIG_SYS_FSL_SEC_OFFSET, \
 161                 CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum)
 162
 163 /* This is a bit evil since we treat rtic param as both a string & hex value */
 164 #define SET_SEC_RTIC_LIODN_ENTRY(rtic, liodnA) \
 165         SET_LIODN_ENTRY_1("fsl,sec4.0-rtic-memory", \
 166                 liodnA, \
 167                 offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
 168                 CONFIG_SYS_FSL_SEC_OFFSET, \
 169                 CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)), \
 170         SET_LIODN_ENTRY_1("fsl,sec-v4.0-rtic-memory", \
 171                 liodnA, \
 172                 offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
 173                 CONFIG_SYS_FSL_SEC_OFFSET, \
 174                 CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa))
 175
 176 #define SET_SEC_DECO_LIODN_ENTRY(num, liodnA, liodnB) \
 177         SET_LIODN_ENTRY_2(NULL, liodnA, liodnB, \
 178                 offsetof(ccsr_sec_t, decoliodnr[num].ls) + \
 179                 CONFIG_SYS_FSL_SEC_OFFSET, 0)
 180
 181 #define SET_RAID_ENGINE_JQ_LIODN_ENTRY(jqNum, rNum, liodnA) \
 182         SET_LIODN_ENTRY_1("fsl,raideng-v1.0-job-ring", \
 183         liodnA, \
 184         offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg1) + \
 185         CONFIG_SYS_FSL_RAID_ENGINE_OFFSET, \
 186         offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg0) + \
 187         CONFIG_SYS_FSL_RAID_ENGINE_OFFSET)
 188
 189 #define SET_RMAN_LIODN(ibNum, liodn) \
 190         SET_LIODN_ENTRY_1("fsl,rman-inbound-block", liodn, \
 191                 offsetof(struct ccsr_rman, mmitdr) + \
 192                 CONFIG_SYS_FSL_CORENET_RMAN_OFFSET, \
 193                 CONFIG_SYS_FSL_CORENET_RMAN_OFFSET + ibNum * 0x1000)
 194
 195 extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[];
 196 extern struct liodn_id_table raide_liodn_tbl[];
 197 extern struct liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[];
 198 #ifdef CONFIG_SYS_SRIO
 199 extern struct srio_liodn_id_table srio_liodn_tbl[];
 200 extern int srio_liodn_tbl_sz;
 201 #endif
 202 extern struct liodn_id_table rman_liodn_tbl[];
 203 extern int liodn_tbl_sz, sec_liodn_tbl_sz, raide_liodn_tbl_sz;
 204 extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz;
 205 extern int rman_liodn_tbl_sz;
 206
 207 #endif