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git.ipfire.org Git - people/ms/u-boot.git/blob - board/BuS/eb_cpu5282/eb_cpu5282.c
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2 * (C) Copyright 2005-2009
3 * BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
5 * (C) Copyright 2000-2003
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include "asm/m5282.h"
30 #include <bmp_layout.h>
31 #include <status_led.h>
34 /*---------------------------------------------------------------------------*/
36 DECLARE_GLOBAL_DATA_PTR
;
39 unsigned long display_width
;
40 unsigned long display_height
;
43 /*---------------------------------------------------------------------------*/
47 puts("Board: EB+CPU5282 (BuS Elektronik GmbH & Co. KG)\n");
48 #if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
49 puts(" Boot from Internal FLASH\n");
54 phys_size_t
initdram (int board_type
)
59 MCFSDRAMC_DCR
= MCFSDRAMC_DCR_RTIM_6
|
60 MCFSDRAMC_DCR_RC((15 * CONFIG_SYS_CLK
/ 1000000) >> 4);
62 #ifdef CONFIG_SYS_SDRAM_BASE0
63 MCFSDRAMC_DACR0
= MCFSDRAMC_DACR_BASE(CONFIG_SYS_SDRAM_BASE0
)|
64 MCFSDRAMC_DACR_CASL(1) | MCFSDRAMC_DACR_CBM(3) |
68 MCFSDRAMC_DMR0
= MCFSDRAMC_DMR_BAM_16M
| MCFSDRAMC_DMR_V
;
71 MCFSDRAMC_DACR0
|= MCFSDRAMC_DACR_IP
;
73 for (i
= 0; i
< 10; i
++)
76 *(unsigned long *)(CONFIG_SYS_SDRAM_BASE0
) = 0xA5A5A5A5;
78 MCFSDRAMC_DACR0
|= MCFSDRAMC_DACR_RE
;
81 for (i
= 0; i
< 2000; i
++)
84 MCFSDRAMC_DACR0
|= MCFSDRAMC_DACR_IMRS
;
86 /* write SDRAM mode register */
87 *(unsigned long *)(CONFIG_SYS_SDRAM_BASE0
+ 0x80440) = 0xA5A5A5A5;
89 size
+= CONFIG_SYS_SDRAM_SIZE0
* 1024 * 1024;
91 #ifdef CONFIG_SYS_SDRAM_BASE1xx
92 MCFSDRAMC_DACR1
= MCFSDRAMC_DACR_BASE (CONFIG_SYS_SDRAM_BASE1
)
93 | MCFSDRAMC_DACR_CASL (1)
94 | MCFSDRAMC_DACR_CBM (3)
95 | MCFSDRAMC_DACR_PS_16
;
97 MCFSDRAMC_DMR1
= MCFSDRAMC_DMR_BAM_16M
| MCFSDRAMC_DMR_V
;
99 MCFSDRAMC_DACR1
|= MCFSDRAMC_DACR_IP
;
101 *(unsigned short *) (CONFIG_SYS_SDRAM_BASE1
) = 0xA5A5;
102 MCFSDRAMC_DACR1
|= MCFSDRAMC_DACR_RE
;
104 for (i
= 0; i
< 2000; i
++)
107 MCFSDRAMC_DACR1
|= MCFSDRAMC_DACR_IMRS
;
108 *(unsigned int *) (CONFIG_SYS_SDRAM_BASE1
+ 0x220) = 0xA5A5;
109 size
+= CONFIG_SYS_SDRAM_SIZE1
* 1024 * 1024;
114 #if defined(CONFIG_SYS_DRAM_TEST)
117 uint
*pstart
= (uint
*) CONFIG_SYS_MEMTEST_START
;
118 uint
*pend
= (uint
*) CONFIG_SYS_MEMTEST_END
;
121 printf("SDRAM test phase 1:\n");
122 for (p
= pstart
; p
< pend
; p
++)
125 for (p
= pstart
; p
< pend
; p
++) {
126 if (*p
!= 0xaaaaaaaa) {
127 printf ("SDRAM test fails at: %08x\n", (uint
) p
);
132 printf("SDRAM test phase 2:\n");
133 for (p
= pstart
; p
< pend
; p
++)
136 for (p
= pstart
; p
< pend
; p
++) {
137 if (*p
!= 0x55555555) {
138 printf ("SDRAM test fails at: %08x\n", (uint
) p
);
143 printf("SDRAM test passed.\n");
148 #if defined(CONFIG_HW_WATCHDOG)
150 void hw_watchdog_init(void)
156 s
= getenv("watchdog");
158 if ((strncmp(s
, "off", 3) == 0) || (strncmp(s
, "0", 1) == 0))
161 MCFGPTA_GPTDDR
|= (1<<2);
163 MCFGPTA_GPTDDR
&= ~(1<<2);
166 void hw_watchdog_reset(void)
168 MCFGPTA_GPTPORT
^= (1<<2);
172 int misc_init_r(void)
174 #ifdef CONFIG_HW_WATCHDOG
180 void __led_toggle(led_id_t mask
)
182 MCFGPTA_GPTPORT
^= (1 << 3);
185 void __led_init(led_id_t mask
, int state
)
187 __led_set(mask
, state
);
188 MCFGPTA_GPTDDR
|= (1 << 3);
191 void __led_set(led_id_t mask
, int state
)
193 if (state
== STATUS_LED_ON
)
194 MCFGPTA_GPTPORT
|= (1 << 3);
196 MCFGPTA_GPTPORT
&= ~(1 << 3);
199 #if defined(CONFIG_VIDEO)
201 int drv_video_init(void)
204 #ifdef CONFIG_SPLASH_SCREEN
205 unsigned long splash
;
207 printf("Init Video as ");
208 s
= getenv("displaywidth");
210 display_width
= simple_strtoul(s
, NULL
, 10);
214 s
= getenv("displayheight");
216 display_height
= simple_strtoul(s
, NULL
, 10);
218 display_height
= 256;
220 printf("%lu x %lu pixel matrix\n", display_width
, display_height
);
222 MCFCCM_CCR
&= ~MCFCCM_CCR_SZEN
;
223 MCFGPIO_PEPAR
&= ~MCFGPIO_PEPAR_PEPA2
;
225 vcxk_init(display_width
, display_height
);
227 #ifdef CONFIG_SPLASH_SCREEN
228 s
= getenv("splashimage");
230 splash
= simple_strtoul(s
, NULL
, 16);
231 vcxk_acknowledge_wait();
232 video_display_bitmap(splash
, 0, 0);
239 /*---------------------------------------------------------------------------*/
242 int do_brightness(cmd_tbl_t
*cmdtp
, int flag
, int argc
, char * const argv
[])
250 side
= simple_strtoul(argv
[1], NULL
, 10);
251 bright
= simple_strtoul(argv
[2], NULL
, 10);
252 if ((side
>= 0) && (side
<= 3) &&
253 (bright
>= 0) && (bright
<= 1000)) {
254 vcxk_setbrightness(side
, bright
);
257 printf("parameters out of range\n");
258 printf("Usage:\n%s\n", cmdtp
->usage
);
263 printf("Usage:\n%s\n", cmdtp
->usage
);
270 /*---------------------------------------------------------------------------*/
273 bright
, 3, 0, do_brightness
,
274 "sets the display brightness\n",
275 " <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n"
280 /* EOF EB+MCF-EV123.c */