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[people/ms/u-boot.git] / board / atmel / atstk1000 / atstk1000.c
1 /*
2 * Copyright (C) 2005-2006 Atmel Corporation
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22 #include <common.h>
23
24 #include <asm/io.h>
25 #include <asm/sdram.h>
26 #include <asm/arch/clk.h>
27 #include <asm/arch/gpio.h>
28 #include <asm/arch/hmatrix.h>
29 #include <netdev.h>
30
31 DECLARE_GLOBAL_DATA_PTR;
32
33 static const struct sdram_config sdram_config = {
34 #if defined(CONFIG_ATSTK1006)
35 /* Dual MT48LC16M16A2-7E (64 MB) on daughterboard */
36 .data_bits = SDRAM_DATA_32BIT,
37 .row_bits = 13,
38 .col_bits = 9,
39 .bank_bits = 2,
40 .cas = 2,
41 .twr = 2,
42 .trc = 7,
43 .trp = 2,
44 .trcd = 2,
45 .tras = 4,
46 .txsr = 7,
47 /* 7.81 us */
48 .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
49 #else
50 /* MT48LC2M32B2P-5 (8 MB) on motherboard */
51 #ifdef CONFIG_ATSTK1004
52 .data_bits = SDRAM_DATA_16BIT,
53 #else
54 .data_bits = SDRAM_DATA_32BIT,
55 #endif
56 #ifdef CONFIG_ATSTK1000_16MB_SDRAM
57 /* MT48LC4M32B2P-6 (16 MB) on mod'ed motherboard */
58 .row_bits = 12,
59 #else
60 .row_bits = 11,
61 #endif
62 .col_bits = 8,
63 .bank_bits = 2,
64 .cas = 3,
65 .twr = 2,
66 .trc = 7,
67 .trp = 2,
68 .trcd = 2,
69 .tras = 5,
70 .txsr = 5,
71 /* 15.6 us */
72 .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000,
73 #endif
74 };
75
76 int board_early_init_f(void)
77 {
78 /* Enable SDRAM in the EBI mux */
79 hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
80
81 gpio_enable_ebi();
82 gpio_enable_usart1();
83 #if defined(CONFIG_MACB)
84 gpio_enable_macb0();
85 gpio_enable_macb1();
86 #endif
87 #if defined(CONFIG_MMC)
88 gpio_enable_mmci();
89 #endif
90
91 return 0;
92 }
93
94 phys_size_t initdram(int board_type)
95 {
96 unsigned long expected_size;
97 unsigned long actual_size;
98 void *sdram_base;
99
100 sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
101
102 expected_size = sdram_init(sdram_base, &sdram_config);
103 actual_size = get_ram_size(sdram_base, expected_size);
104
105 unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
106
107 if (expected_size != actual_size)
108 printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
109 actual_size >> 20, expected_size >> 20);
110
111 return actual_size;
112 }
113
114 void board_init_info(void)
115 {
116 gd->bd->bi_phy_id[0] = 0x10;
117 gd->bd->bi_phy_id[1] = 0x11;
118 }
119
120 #ifdef CONFIG_CMD_NET
121 int board_eth_init(bd_t *bi)
122 {
123 macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
124 macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
125 return 0;
126 }
127 #endif