board/atmel/atstk1000/atstk1000.c

   1 /*
   2  * Copyright (C) 2005-2006 Atmel Corporation
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22 #include <common.h>
  23
  24 #include <asm/io.h>
  25 #include <asm/sdram.h>
  26 #include <asm/arch/clk.h>
  27 #include <asm/arch/hmatrix.h>
  28 #include <asm/arch/mmu.h>
  29 #include <asm/arch/portmux.h>
  30 #include <netdev.h>
  31
  32 DECLARE_GLOBAL_DATA_PTR;
  33
  34 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
  35         {
  36                 .virt_pgno      = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
  37                 .nr_pages       = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
  38                 .phys           = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
  39                                         | MMU_VMR_CACHE_NONE,
  40         }, {
  41                 .virt_pgno      = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
  42                 .nr_pages       = EBI_SDRAM_SIZE >> PAGE_SHIFT,
  43                 .phys           = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
  44                                         | MMU_VMR_CACHE_WRBACK,
  45         },
  46 };
  47
  48 static const struct sdram_config sdram_config = {
  49 #if defined(CONFIG_ATSTK1006)
  50         /* Dual MT48LC16M16A2-7E (64 MB) on daughterboard */
  51         .data_bits      = SDRAM_DATA_32BIT,
  52         .row_bits       = 13,
  53         .col_bits       = 9,
  54         .bank_bits      = 2,
  55         .cas            = 2,
  56         .twr            = 2,
  57         .trc            = 7,
  58         .trp            = 2,
  59         .trcd           = 2,
  60         .tras           = 4,
  61         .txsr           = 7,
  62         /* 7.81 us */
  63         .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
  64 #else
  65         /* MT48LC2M32B2P-5 (8 MB) on motherboard */
  66 #ifdef CONFIG_ATSTK1004
  67         .data_bits      = SDRAM_DATA_16BIT,
  68 #else
  69         .data_bits      = SDRAM_DATA_32BIT,
  70 #endif
  71 #ifdef CONFIG_ATSTK1000_16MB_SDRAM
  72         /* MT48LC4M32B2P-6 (16 MB) on mod'ed motherboard */
  73         .row_bits       = 12,
  74 #else
  75         .row_bits       = 11,
  76 #endif
  77         .col_bits       = 8,
  78         .bank_bits      = 2,
  79         .cas            = 3,
  80         .twr            = 2,
  81         .trc            = 7,
  82         .trp            = 2,
  83         .trcd           = 2,
  84         .tras           = 5,
  85         .txsr           = 5,
  86         /* 15.6 us */
  87         .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000,
  88 #endif
  89 };
  90
  91 int board_early_init_f(void)
  92 {
  93         /* Enable SDRAM in the EBI mux */
  94         hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
  95
  96         portmux_enable_ebi(sdram_config.data_bits, 23, 0, PORTMUX_DRIVE_HIGH);
  97         portmux_enable_usart1(PORTMUX_DRIVE_MIN);
  98 #if defined(CONFIG_MACB)
  99         portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
 100         portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
 101 #endif
 102 #if defined(CONFIG_MMC)
 103         portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
 104 #endif
 105
 106         return 0;
 107 }
 108
 109 phys_size_t initdram(int board_type)
 110 {
 111         unsigned long expected_size;
 112         unsigned long actual_size;
 113         void *sdram_base;
 114
 115         sdram_base = uncached(EBI_SDRAM_BASE);
 116
 117         expected_size = sdram_init(sdram_base, &sdram_config);
 118         actual_size = get_ram_size(sdram_base, expected_size);
 119
 120         if (expected_size != actual_size)
 121                 printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
 122                                 actual_size >> 20, expected_size >> 20);
 123
 124         return actual_size;
 125 }
 126
 127 int board_early_init_r(void)
 128 {
 129         gd->bd->bi_phy_id[0] = 0x10;
 130         gd->bd->bi_phy_id[1] = 0x11;
 131         return 0;
 132 }
 133
 134 #ifdef CONFIG_CMD_NET
 135 int board_eth_init(bd_t *bi)
 136 {
 137         macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
 138         macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
 139         return 0;
 140 }
 141 #endif