]>
git.ipfire.org Git - people/ms/u-boot.git/blob - board/bf533-ezkit/bf533-ezkit.c
4 * Copyright (c) 2005 blackfin.uclinux.org
6 * (C) Copyright 2000-2004
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #if defined(CONFIG_MISC_INIT_R)
35 #if (BFIN_CPU == ADSP_BF531)
36 printf("CPU: ADSP BF531 Rev.: 0.%d\n", *pCHIPID
>> 28);
37 #elif (BFIN_CPU == ADSP_BF532)
38 printf("CPU: ADSP BF532 Rev.: 0.%d\n", *pCHIPID
>> 28);
40 printf("CPU: ADSP BF533 Rev.: 0.%d\n", *pCHIPID
>> 28);
42 printf("Board: ADI BF533 EZ-Kit Lite board\n");
43 printf(" Support: http://blackfin.uclinux.org/\n");
47 long int initdram(int board_type
)
49 DECLARE_GLOBAL_DATA_PTR
;
52 char *tmp
= getenv("baudrate");
53 brate
= simple_strtoul(tmp
, NULL
, 16);
54 printf("Serial Port initialized with Baud rate = %x\n", brate
);
55 printf("SDRAM attributes:\n");
56 printf("tRCD %d SCLK Cycles,tRP %d SCLK Cycles,tRAS %d SCLK Cycles"
57 "tWR %d SCLK Cycles,CAS Latency %d SCLK cycles \n",
59 printf("SDRAM Begin: 0x%x\n", CFG_SDRAM_BASE
);
60 printf("Bank size = %d MB\n", CFG_MAX_RAM_SIZE
>> 20);
62 gd
->bd
->bi_memstart
= CFG_SDRAM_BASE
;
63 gd
->bd
->bi_memsize
= CFG_MAX_RAM_SIZE
;
64 return CFG_MAX_RAM_SIZE
;
67 #if defined(CONFIG_MISC_INIT_R)
68 /* miscellaneous platform dependent initialisations */
71 /* Set direction bits for Video en/decoder reset as output */
72 *(volatile unsigned char *)(CFG_FLASH1_BASE
+ PSD_PORTA_DIR
) =
73 PSDA_VDEC_RST
| PSDA_VENC_RST
;
74 /* Deactivate Video en/decoder reset lines */
75 *(volatile unsigned char *)(CFG_FLASH1_BASE
+ PSD_PORTA_DOUT
) =
76 PSDA_VDEC_RST
| PSDA_VENC_RST
;