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git.ipfire.org Git - people/ms/u-boot.git/blob - board/esd/hub405/hub405.c
d17c4150369d23a2ba80779137c70b53e8376965
2 * (C) Copyright 2001-2003
3 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/processor.h>
30 DECLARE_GLOBAL_DATA_PTR
;
32 extern void lxt971_no_sleep(void);
34 int board_revision(void)
36 unsigned long osrl_reg
;
37 unsigned long isr1l_reg
;
38 unsigned long tcr_reg
;
42 * Get version of HUB405 board from GPIO's
46 * Setup GPIO pin(s) (IRQ6/GPIO23)
48 osrl_reg
= in_be32((void *)GPIO0_OSRH
);
49 isr1l_reg
= in_be32((void *)GPIO0_ISR1H
);
50 tcr_reg
= in_be32((void *)GPIO0_TCR
);
51 out_be32((void *)GPIO0_OSRH
, osrl_reg
& ~0x00030000); /* output select */
52 out_be32((void *)GPIO0_ISR1H
, isr1l_reg
| 0x00030000); /* input select */
53 out_be32((void *)GPIO0_TCR
, tcr_reg
& ~0x00000100); /* select input */
55 udelay(1000); /* wait some time before reading input */
56 value
= in_be32((void *)GPIO0_IR
) & 0x00000100; /* get config bits */
59 * Restore GPIO settings
61 out_be32((void *)GPIO0_OSRH
, osrl_reg
); /* output select */
62 out_be32((void *)GPIO0_ISR1H
, isr1l_reg
); /* input select */
63 out_be32((void *)GPIO0_TCR
, tcr_reg
); /* enable output driver for outputs */
65 if (value
& 0x00000100) {
66 /* Revision 1.1 or 1.2 detected */
75 int board_early_init_f (void)
78 * IRQ 0-15 405GP internally generated; active high; level sensitive
79 * IRQ 16 405GP internally generated; active low; level sensitive
81 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
82 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
83 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
84 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
85 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
86 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
87 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
89 mtdcr(UIC0SR
, 0xFFFFFFFF); /* clear all ints */
90 mtdcr(UIC0ER
, 0x00000000); /* disable all ints */
91 mtdcr(UIC0CR
, 0x00000000); /* set all to be non-critical*/
92 mtdcr(UIC0PR
, 0xFFFFFF9F); /* set int polarities */
93 mtdcr(UIC0TR
, 0x10000000); /* set int trigger levels */
94 mtdcr(UIC0VCR
, 0x00000001); /* set vect base=0,INT0 highest priority*/
95 mtdcr(UIC0SR
, 0xFFFFFFFF); /* clear all ints */
98 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
100 mtebc (EBC0_CFG
, 0xa8400000); /* ebc always driven */
105 #define LED_REG (DUART0_BA + 0x20)
106 int misc_init_r (void)
114 * Enable interrupts in exar duart mcr[3]
116 out_8((void *)(DUART0_BA
+ 4), 0x08);
117 out_8((void *)(DUART1_BA
+ 4), 0x08);
118 out_8((void *)(DUART2_BA
+ 4), 0x08);
119 out_8((void *)(DUART3_BA
+ 4), 0x08);
122 * Set RS232/RS422 control (RS232 = high on GPIO)
124 val
= in_be32((void *)GPIO0_OR
);
125 val
&= ~(CONFIG_SYS_UART2_RS232
| CONFIG_SYS_UART3_RS232
|
126 CONFIG_SYS_UART4_RS232
| CONFIG_SYS_UART5_RS232
);
128 str
= getenv("phys0");
129 if (!str
|| (str
&& (str
[0] == '0')))
130 val
|= CONFIG_SYS_UART2_RS232
;
132 str
= getenv("phys1");
133 if (!str
|| (str
&& (str
[0] == '0')))
134 val
|= CONFIG_SYS_UART3_RS232
;
136 str
= getenv("phys2");
137 if (!str
|| (str
&& (str
[0] == '0')))
138 val
|= CONFIG_SYS_UART4_RS232
;
140 str
= getenv("phys3");
141 if (!str
|| (str
&& (str
[0] == '0')))
142 val
|= CONFIG_SYS_UART5_RS232
;
144 out_be32((void *)GPIO0_OR
, val
);
147 * check board type and setup AP power
149 str
= getenv("bd_type"); /* this is only set on non prototype hardware */
151 if ((strcmp(str
, "swch405") == 0) || ((!strcmp(str
, "hub405") && (gd
->board_type
>= 1)))) {
152 unsigned char led_reg_default
= 0;
153 str
= getenv("ap_pwr");
154 if (!str
|| (str
&& (str
[0] == '1')))
155 led_reg_default
= 0x04 | 0x02 ; /* U2_LED | AP_PWR */
160 for (flashcnt
= 0; flashcnt
< 3; flashcnt
++) {
162 out_8((void *)LED_REG
, led_reg_default
);
163 for (delay
= 0; delay
< 100; delay
++)
166 out_8((void *)LED_REG
, led_reg_default
| 0xf0);
167 for (delay
= 0; delay
< 50; delay
++)
170 out_8((void *)LED_REG
, led_reg_default
);
175 * Reset external DUARTs
177 out_be32((void *)GPIO0_OR
,
178 in_be32((void *)GPIO0_OR
) | CONFIG_SYS_DUART_RST
); /* set reset to high */
179 udelay(10); /* wait 10us */
180 out_be32((void *)GPIO0_OR
,
181 in_be32((void *)GPIO0_OR
) & ~CONFIG_SYS_DUART_RST
); /* set reset to low */
182 udelay(1000); /* wait 1ms */
185 * Store hardware revision in environment for further processing
187 sprintf(hw_rev
, "1.%ld", gd
->board_type
);
188 setenv("hw_rev", hw_rev
);
194 * Check Board Identity:
196 int checkboard (void)
199 int i
= getenv_f("serial#", str
, sizeof(str
));
204 puts ("### No HW ID - assuming HUB405");
209 if (getenv_f("bd_type", str
, sizeof(str
)) != -1) {
212 puts(" (Missing bd_type!");
215 gd
->board_type
= board_revision();
216 printf(", Rev 1.%ld)\n", gd
->board_type
);
219 * Disable sleep mode in LXT971