board/mimc/mimc200/mimc200.c

   1 /*
   2  * Copyright (C) 2006 Atmel Corporation
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22 #include <common.h>
  23 #include <netdev.h>
  24
  25 #include <asm/io.h>
  26 #include <asm/sdram.h>
  27 #include <asm/arch/clk.h>
  28 #include <asm/arch/gpio.h>
  29 #include <asm/arch/hmatrix.h>
  30 #include <asm/arch/portmux.h>
  31 #include <lcd.h>
  32
  33 #define SM_PM_GCCTRL                            0x0060
  34
  35 DECLARE_GLOBAL_DATA_PTR;
  36
  37 static const struct sdram_config sdram_config = {
  38         .data_bits      = SDRAM_DATA_16BIT,
  39         .row_bits       = 13,
  40         .col_bits       = 9,
  41         .bank_bits      = 2,
  42         .cas            = 3,
  43         .twr            = 2,
  44         .trc            = 6,
  45         .trp            = 2,
  46         .trcd           = 2,
  47         .tras           = 6,
  48         .txsr           = 6,
  49         /* 15.6 us */
  50         .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000,
  51 };
  52
  53 int board_early_init_f(void)
  54 {
  55         /* Enable SDRAM in the EBI mux */
  56         hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
  57
  58         /* Enable 26 address bits and NCS2 */
  59         portmux_enable_ebi(16, 26, PORTMUX_EBI_CS(2), PORTMUX_DRIVE_HIGH);
  60         portmux_enable_usart1(PORTMUX_DRIVE_MIN);
  61
  62         /* de-assert "force sys reset" pin */
  63         portmux_select_gpio(PORTMUX_PORT_D, 1 << 15,
  64                         PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH);
  65
  66         /* init custom i/o */
  67         /* cpu type inputs */
  68         portmux_select_gpio(PORTMUX_PORT_E, (1 << 19) | (1 << 20) | (1 << 23),
  69                         PORTMUX_DIR_INPUT);
  70         /* main board type inputs */
  71         portmux_select_gpio(PORTMUX_PORT_B, (1 << 19) | (1 << 29),
  72                         PORTMUX_DIR_INPUT);
  73         /* DEBUG input (use weak pullup) */
  74         portmux_select_gpio(PORTMUX_PORT_E, 1 << 21,
  75                         PORTMUX_DIR_INPUT | PORTMUX_PULL_UP);
  76
  77         /* are we suppressing the console ? */
  78         if (gpio_get_value(GPIO_PIN_PE(21)) == 1)
  79                 gd->flags |= GD_FLG_SILENT;
  80
  81         /* reset phys */
  82         portmux_select_gpio(PORTMUX_PORT_E, 1 << 24, PORTMUX_DIR_INPUT);
  83         portmux_select_gpio(PORTMUX_PORT_C, 1 << 18,
  84                         PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH);
  85
  86         /* GCLK0 - 10MHz clock */
  87         writel(0x00000004, (void *)SM_BASE + SM_PM_GCCTRL);
  88         portmux_select_peripheral(PORTMUX_PORT_A, 1 << 30, PORTMUX_FUNC_A, 0);
  89
  90         udelay(5000);
  91
  92         /* release phys reset */
  93         gpio_set_value(GPIO_PIN_PC(18), 0);     /* PHY RESET (Release)  */
  94
  95 #if defined(CONFIG_MACB)
  96         /* init macb0 pins */
  97         portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
  98         portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
  99 #endif
 100
 101 #if defined(CONFIG_MMC)
 102         portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
 103 #endif
 104
 105         return 0;
 106 }
 107
 108 phys_size_t initdram(int board_type)
 109 {
 110         unsigned long expected_size;
 111         unsigned long actual_size;
 112         void *sdram_base;
 113
 114         sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
 115
 116         expected_size = sdram_init(sdram_base, &sdram_config);
 117         actual_size = get_ram_size(sdram_base, expected_size);
 118
 119         unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
 120
 121         if (expected_size != actual_size)
 122                 printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
 123                                 actual_size >> 20, expected_size >> 20);
 124
 125         return actual_size;
 126 }
 127
 128 int board_early_init_r(void)
 129 {
 130         gd->bd->bi_phy_id[0] = 0x01;
 131         gd->bd->bi_phy_id[1] = 0x03;
 132         return 0;
 133 }
 134
 135 /* SPI chip select control */
 136 #ifdef CONFIG_ATMEL_SPI
 137 #include <spi.h>
 138
 139 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 140 {
 141         return (bus == 0) && (cs == 0);
 142 }
 143
 144 void spi_cs_activate(struct spi_slave *slave)
 145 {
 146 }
 147
 148 void spi_cs_deactivate(struct spi_slave *slave)
 149 {
 150 }
 151 #endif /* CONFIG_ATMEL_SPI */
 152
 153 #ifdef CONFIG_CMD_NET
 154 int board_eth_init(bd_t *bi)
 155 {
 156         macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
 157         macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
 158
 159         return 0;
 160 }
 161 #endif