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rename CFG_ macros to CONFIG_SYS
[people/ms/u-boot.git] / board / netstal / hcu4 / hcu4.c
1 /*
2 *(C) Copyright 2005-2008 Netstal Maschinen AG
3 * Niklaus Giger (Niklaus.Giger@netstal.com)
4 *
5 * This source code is free software; you can redistribute it
6 * and/or modify it in source code form under the terms of the GNU
7 * General Public License as published by the Free Software
8 * Foundation; either version 2 of the License, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
19 */
20
21 #include <common.h>
22 #include <ppc4xx.h>
23 #include <asm/processor.h>
24 #include <asm/io.h>
25 #include <asm-ppc/u-boot.h>
26 #include "../common/nm.h"
27
28 DECLARE_GLOBAL_DATA_PTR;
29
30 #define HCU_MACH_VERSIONS_REGISTER (0x7C000000 + 0xF00000)
31 #define HCU_SLOT_ADDRESS (0x7C000000 + 0x400000)
32 #define HCU_DIGITAL_IO_REGISTER (0x7C000000 + 0x500000)
33 #define HCU_SW_INSTALL_REQUESTED 0x10
34
35 /*
36 * This function is run very early, out of flash, and before devices are
37 * initialized. It is called by lib_ppc/board.c:board_init_f by virtue
38 * of being in the init_sequence array.
39 *
40 * The SDRAM has been initialized already -- start.S:start called
41 * init.S:init_sdram early on -- but it is not yet being used for
42 * anything, not even stack. So be careful.
43 */
44
45 /* Attention: If you want 1 microsecs times from the external oscillator
46 * 0x00004051 is okay for u-boot/linux, but different from old vxworks values
47 * 0x00804051 causes problems with u-boot and linux!
48 */
49 #define CPC0_CR0_VALUE 0x0030103c
50 #define CPC0_CR1_VALUE 0x00004051
51
52 int board_early_init_f (void)
53 {
54 /*
55 * Interrupt controller setup for the HCU4 board.
56 * Note: IRQ 0-15 405GP internally generated; high; level sensitive
57 * IRQ 16 405GP internally generated; low; level sensitive
58 * IRQ 17-24 RESERVED/UNUSED
59 * IRQ 31 (EXT IRQ 6) (unused)
60 */
61 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
62 mtdcr(uicer, 0x00000000); /* disable all ints */
63 mtdcr(uiccr, 0x00000000); /* set all to be non-critical */
64 mtdcr(uicpr, 0xFFFFE000); /* set int polarities */
65 mtdcr(uictr, 0x00000000); /* set int trigger levels */
66 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
67
68 mtdcr(CPC0_CR1, CPC0_CR1_VALUE);
69 mtdcr(CPC0_ECR, 0x60606000);
70 mtdcr(CPC0_EIRR, 0x7C000000);
71
72 return 0;
73 }
74
75 #ifdef CONFIG_BOARD_PRE_INIT
76 int board_pre_init (void)
77 {
78 return board_early_init_f ();
79 }
80 #endif
81
82 int sys_install_requested(void)
83 {
84 u16 ioValue = in_be16((u16 *)HCU_DIGITAL_IO_REGISTER);
85 return (ioValue & HCU_SW_INSTALL_REQUESTED) != 0;
86 }
87
88 int checkboard (void)
89 {
90 u16 boardVersReg = in_be16((u16 *)HCU_MACH_VERSIONS_REGISTER);
91 u16 generation = boardVersReg & 0xf0;
92 u16 index = boardVersReg & 0x0f;
93
94 /* Cannot be done in board_early_init */
95 mtdcr(cntrl0, CPC0_CR0_VALUE);
96
97 /* Force /RTS to active. The board it not wired quite
98 * correctly to use cts/rtc flow control, so just force the
99 * /RST active and forget about it.
100 */
101 writeb (readb (0xef600404) | 0x03, 0xef600404);
102 nm_show_print(generation, index, 0);
103
104 return 0;
105 }
106
107 u32 hcu_led_get(void)
108 {
109 return (~(in_be32((u32 *)GPIO0_OR)) >> 23) & 0xff;
110 }
111
112 /*
113 * hcu_led_set value to be placed into the LEDs (max 6 bit)
114 */
115 void hcu_led_set(u32 value)
116 {
117 u32 tmp = ~value;
118
119 tmp = (tmp << 23) | 0x7FFFFF;
120 out_be32((u32 *)GPIO0_OR, tmp);
121 }
122
123 /*
124 * hcu_get_slot
125 */
126 u32 hcu_get_slot(void)
127 {
128 u16 slot = in_be16((u16 *)HCU_SLOT_ADDRESS);
129 return slot & 0x7f;
130 }
131
132 /*
133 * get_serial_number
134 */
135 u32 get_serial_number(void)
136 {
137 u32 serial = in_be32((u32 *)CONFIG_SYS_FLASH_BASE);
138
139 if (serial == 0xffffffff)
140 return 0;
141
142 return serial;
143 }
144
145
146 /*
147 * misc_init_r.
148 */
149
150 int misc_init_r(void)
151 {
152 common_misc_init_r();
153 set_params_for_sw_install( sys_install_requested(), "hcu4" );
154 return 0;
155 }
156
157 phys_size_t initdram(int board_type)
158 {
159 long dram_size = 0;
160 u16 boardVersReg = in_be16((u16 *)HCU_MACH_VERSIONS_REGISTER);
161 u16 generation = boardVersReg & 0xf0;
162 u16 index = boardVersReg & 0x0f;
163
164 if (generation == HW_GENERATION_HCU3 && index < 0xf)
165 dram_size = 32 << 20; /* 32 MB - RAM */
166 else
167 dram_size = 64 << 20; /* 64 MB - RAM */
168 init_ppc405_sdram(dram_size);
169
170 #ifdef DEBUG
171 show_sdram_registers();
172 #endif
173
174 return dram_size;
175 }
176
177 #if defined(CONFIG_POST)
178 /*
179 * Returns 1 if keys pressed to start the power-on long-running tests
180 * Called from board_init_f().
181 */
182 int post_hotkeys_pressed(void)
183 {
184 return 0; /* No hotkeys supported */
185 }
186 #endif /* CONFIG_POST */
187
188 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
189 void ft_board_setup(void *blob, bd_t *bd)
190 {
191 ft_cpu_setup(blob, bd);
192
193 }
194 #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
195
196 /*
197 * Hardcoded flash setup:
198 * Flash 0 is a non-CFI AMD AM29F040 flash, 8 bit flash / 8 bit bus.
199 */
200 ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
201 {
202 if (banknum == 0) { /* non-CFI boot flash */
203 info->portwidth = 1;
204 info->chipwidth = 1;
205 info->interface = FLASH_CFI_X8;
206 return 1;
207 } else
208 return 0;
209 }