board/nvidia/common/board.c

   1 /*
   2  *  (C) Copyright 2010,2011
   3  *  NVIDIA Corporation <www.nvidia.com>
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <ns16550.h>
  26 #include <linux/compiler.h>
  27 #include <asm/io.h>
  28 #include <asm/arch/clock.h>
  29 #ifdef CONFIG_LCD
  30 #include <asm/arch/display.h>
  31 #endif
  32 #include <asm/arch/funcmux.h>
  33 #include <asm/arch/pinmux.h>
  34 #include <asm/arch/pmu.h>
  35 #ifdef CONFIG_PWM_TEGRA
  36 #include <asm/arch/pwm.h>
  37 #endif
  38 #include <asm/arch/tegra.h>
  39 #include <asm/arch-tegra/board.h>
  40 #include <asm/arch-tegra/clk_rst.h>
  41 #include <asm/arch-tegra/pmc.h>
  42 #include <asm/arch-tegra/sys_proto.h>
  43 #include <asm/arch-tegra/uart.h>
  44 #include <asm/arch-tegra/warmboot.h>
  45 #ifdef CONFIG_TEGRA_CLOCK_SCALING
  46 #include <asm/arch/emc.h>
  47 #endif
  48 #ifdef CONFIG_USB_EHCI_TEGRA
  49 #include <asm/arch-tegra/usb.h>
  50 #include <asm/arch/usb.h>
  51 #endif
  52 #ifdef CONFIG_TEGRA_MMC
  53 #include <asm/arch-tegra/tegra_mmc.h>
  54 #include <asm/arch-tegra/mmc.h>
  55 #endif
  56 #include <i2c.h>
  57 #include <spi.h>
  58 #include "emc.h"
  59
  60 DECLARE_GLOBAL_DATA_PTR;
  61
  62 const struct tegra_sysinfo sysinfo = {
  63         CONFIG_TEGRA_BOARD_STRING
  64 };
  65
  66 #ifndef CONFIG_SPL_BUILD
  67 /*
  68  * Routine: timer_init
  69  * Description: init the timestamp and lastinc value
  70  */
  71 int timer_init(void)
  72 {
  73         return 0;
  74 }
  75 #endif
  76
  77 void __pin_mux_usb(void)
  78 {
  79 }
  80
  81 void pin_mux_usb(void) __attribute__((weak, alias("__pin_mux_usb")));
  82
  83 void __pin_mux_spi(void)
  84 {
  85 }
  86
  87 void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi")));
  88
  89 void __gpio_early_init_uart(void)
  90 {
  91 }
  92
  93 void gpio_early_init_uart(void)
  94 __attribute__((weak, alias("__gpio_early_init_uart")));
  95
  96 void __pin_mux_nand(void)
  97 {
  98         funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
  99 }
 100
 101 void pin_mux_nand(void) __attribute__((weak, alias("__pin_mux_nand")));
 102
 103 void __pin_mux_display(void)
 104 {
 105 }
 106
 107 void pin_mux_display(void) __attribute__((weak, alias("__pin_mux_display")));
 108
 109 /*
 110  * Routine: power_det_init
 111  * Description: turn off power detects
 112  */
 113 static void power_det_init(void)
 114 {
 115 #if defined(CONFIG_TEGRA20)
 116         struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
 117
 118         /* turn off power detects */
 119         writel(0, &pmc->pmc_pwr_det_latch);
 120         writel(0, &pmc->pmc_pwr_det);
 121 #endif
 122 }
 123
 124 /*
 125  * Routine: board_init
 126  * Description: Early hardware init.
 127  */
 128 int board_init(void)
 129 {
 130         __maybe_unused int err;
 131
 132         /* Do clocks and UART first so that printf() works */
 133         clock_init();
 134         clock_verify();
 135
 136 #ifdef CONFIG_FDT_SPI
 137         pin_mux_spi();
 138         spi_init();
 139 #endif
 140
 141 #ifdef CONFIG_PWM_TEGRA
 142         if (pwm_init(gd->fdt_blob))
 143                 debug("%s: Failed to init pwm\n", __func__);
 144 #endif
 145 #ifdef CONFIG_LCD
 146         pin_mux_display();
 147         tegra_lcd_check_next_stage(gd->fdt_blob, 0);
 148 #endif
 149         /* boot param addr */
 150         gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
 151
 152         power_det_init();
 153
 154 #ifdef CONFIG_TEGRA_I2C
 155 #ifndef CONFIG_SYS_I2C_INIT_BOARD
 156 #error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards"
 157 #endif
 158         i2c_init_board();
 159 # ifdef CONFIG_TEGRA_PMU
 160         if (pmu_set_nominal())
 161                 debug("Failed to select nominal voltages\n");
 162 #  ifdef CONFIG_TEGRA_CLOCK_SCALING
 163         err = board_emc_init();
 164         if (err)
 165                 debug("Memory controller init failed: %d\n", err);
 166 #  endif
 167 # endif /* CONFIG_TEGRA_PMU */
 168 #endif /* CONFIG_TEGRA_I2C */
 169
 170 #ifdef CONFIG_USB_EHCI_TEGRA
 171         pin_mux_usb();
 172         board_usb_init(gd->fdt_blob);
 173 #endif
 174 #ifdef CONFIG_LCD
 175         tegra_lcd_check_next_stage(gd->fdt_blob, 0);
 176 #endif
 177
 178 #ifdef CONFIG_TEGRA_NAND
 179         pin_mux_nand();
 180 #endif
 181
 182 #ifdef CONFIG_TEGRA_LP0
 183         /* save Sdram params to PMC 2, 4, and 24 for WB0 */
 184         warmboot_save_sdram_params();
 185
 186         /* prepare the WB code to LP0 location */
 187         warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
 188 #endif
 189
 190         return 0;
 191 }
 192
 193 #ifdef CONFIG_BOARD_EARLY_INIT_F
 194 static void __gpio_early_init(void)
 195 {
 196 }
 197
 198 void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
 199
 200 int board_early_init_f(void)
 201 {
 202 #if !defined(CONFIG_TEGRA20)
 203         pinmux_init();
 204 #endif
 205         board_init_uart_f();
 206
 207         /* Initialize periph GPIOs */
 208         gpio_early_init();
 209         gpio_early_init_uart();
 210 #ifdef CONFIG_LCD
 211         tegra_lcd_early_init(gd->fdt_blob);
 212 #endif
 213
 214         return 0;
 215 }
 216 #endif  /* EARLY_INIT */
 217
 218 int board_late_init(void)
 219 {
 220 #ifdef CONFIG_LCD
 221         /* Make sure we finish initing the LCD */
 222         tegra_lcd_check_next_stage(gd->fdt_blob, 1);
 223 #endif
 224         return 0;
 225 }
 226
 227 #if defined(CONFIG_TEGRA_MMC)
 228 void __pin_mux_mmc(void)
 229 {
 230 }
 231
 232 void pin_mux_mmc(void) __attribute__((weak, alias("__pin_mux_mmc")));
 233
 234 /* this is a weak define that we are overriding */
 235 int board_mmc_init(bd_t *bd)
 236 {
 237         debug("%s called\n", __func__);
 238
 239         /* Enable muxes, etc. for SDMMC controllers */
 240         pin_mux_mmc();
 241
 242         debug("%s: init MMC\n", __func__);
 243         tegra_mmc_init();
 244
 245         return 0;
 246 }
 247
 248 void pad_init_mmc(struct mmc_host *host)
 249 {
 250 #if defined(CONFIG_TEGRA30)
 251         enum periph_id id = host->mmc_id;
 252         u32 val;
 253
 254         debug("%s: sdmmc address = %08x, id = %d\n", __func__,
 255                 (unsigned int)host->reg, id);
 256
 257         /* Set the pad drive strength for SDMMC1 or 3 only */
 258         if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
 259                 debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
 260                         __func__);
 261                 return;
 262         }
 263
 264         val = readl(&host->reg->sdmemcmppadctl);
 265         val &= 0xFFFFFFF0;
 266         val |= MEMCOMP_PADCTRL_VREF;
 267         writel(val, &host->reg->sdmemcmppadctl);
 268
 269         val = readl(&host->reg->autocalcfg);
 270         val &= 0xFFFF0000;
 271         val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
 272         writel(val, &host->reg->autocalcfg);
 273 #endif  /* T30 */
 274 }
 275 #endif  /* MMC */