drivers/mtd/nand/mpc5121_nfc.c

   1 /*
   2  * Copyright 2004-2008 Freescale Semiconductor, Inc.
   3  * Copyright 2009 Semihalf.
   4  * (C) Copyright 2009 Stefan Roese <sr@denx.de>
   5  *
   6  * Based on original driver from Freescale Semiconductor
   7  * written by John Rigby <jrigby@freescale.com> on basis
   8  * of drivers/mtd/nand/mxc_nand.c. Reworked and extended
   9  * Piotr Ziecik <kosmo@semihalf.com>.
  10  *
  11  * SPDX-License-Identifier:     GPL-2.0+
  12  */
  13
  14 #include <common.h>
  15 #include <malloc.h>
  16
  17 #include <linux/mtd/mtd.h>
  18 #include <linux/mtd/nand.h>
  19 #include <linux/mtd/nand_ecc.h>
  20 #include <linux/compat.h>
  21
  22 #include <asm/errno.h>
  23 #include <asm/io.h>
  24 #include <asm/processor.h>
  25 #include <nand.h>
  26
  27 #define DRV_NAME                "mpc5121_nfc"
  28
  29 /* Timeouts */
  30 #define NFC_RESET_TIMEOUT       1000    /* 1 ms */
  31 #define NFC_TIMEOUT             2000    /* 2000 us */
  32
  33 /* Addresses for NFC MAIN RAM BUFFER areas */
  34 #define NFC_MAIN_AREA(n)        ((n) *  0x200)
  35
  36 /* Addresses for NFC SPARE BUFFER areas */
  37 #define NFC_SPARE_BUFFERS       8
  38 #define NFC_SPARE_LEN           0x40
  39 #define NFC_SPARE_AREA(n)       (0x1000 + ((n) * NFC_SPARE_LEN))
  40
  41 /* MPC5121 NFC registers */
  42 #define NFC_BUF_ADDR            0x1E04
  43 #define NFC_FLASH_ADDR          0x1E06
  44 #define NFC_FLASH_CMD           0x1E08
  45 #define NFC_CONFIG              0x1E0A
  46 #define NFC_ECC_STATUS1         0x1E0C
  47 #define NFC_ECC_STATUS2         0x1E0E
  48 #define NFC_SPAS                0x1E10
  49 #define NFC_WRPROT              0x1E12
  50 #define NFC_NF_WRPRST           0x1E18
  51 #define NFC_CONFIG1             0x1E1A
  52 #define NFC_CONFIG2             0x1E1C
  53 #define NFC_UNLOCKSTART_BLK0    0x1E20
  54 #define NFC_UNLOCKEND_BLK0      0x1E22
  55 #define NFC_UNLOCKSTART_BLK1    0x1E24
  56 #define NFC_UNLOCKEND_BLK1      0x1E26
  57 #define NFC_UNLOCKSTART_BLK2    0x1E28
  58 #define NFC_UNLOCKEND_BLK2      0x1E2A
  59 #define NFC_UNLOCKSTART_BLK3    0x1E2C
  60 #define NFC_UNLOCKEND_BLK3      0x1E2E
  61
  62 /* Bit Definitions: NFC_BUF_ADDR */
  63 #define NFC_RBA_MASK            (7 << 0)
  64 #define NFC_ACTIVE_CS_SHIFT     5
  65 #define NFC_ACTIVE_CS_MASK      (3 << NFC_ACTIVE_CS_SHIFT)
  66
  67 /* Bit Definitions: NFC_CONFIG */
  68 #define NFC_BLS_UNLOCKED        (1 << 1)
  69
  70 /* Bit Definitions: NFC_CONFIG1 */
  71 #define NFC_ECC_4BIT            (1 << 0)
  72 #define NFC_FULL_PAGE_DMA       (1 << 1)
  73 #define NFC_SPARE_ONLY          (1 << 2)
  74 #define NFC_ECC_ENABLE          (1 << 3)
  75 #define NFC_INT_MASK            (1 << 4)
  76 #define NFC_BIG_ENDIAN          (1 << 5)
  77 #define NFC_RESET               (1 << 6)
  78 #define NFC_CE                  (1 << 7)
  79 #define NFC_ONE_CYCLE           (1 << 8)
  80 #define NFC_PPB_32              (0 << 9)
  81 #define NFC_PPB_64              (1 << 9)
  82 #define NFC_PPB_128             (2 << 9)
  83 #define NFC_PPB_256             (3 << 9)
  84 #define NFC_PPB_MASK            (3 << 9)
  85 #define NFC_FULL_PAGE_INT       (1 << 11)
  86
  87 /* Bit Definitions: NFC_CONFIG2 */
  88 #define NFC_COMMAND             (1 << 0)
  89 #define NFC_ADDRESS             (1 << 1)
  90 #define NFC_INPUT               (1 << 2)
  91 #define NFC_OUTPUT              (1 << 3)
  92 #define NFC_ID                  (1 << 4)
  93 #define NFC_STATUS              (1 << 5)
  94 #define NFC_CMD_FAIL            (1 << 15)
  95 #define NFC_INT                 (1 << 15)
  96
  97 /* Bit Definitions: NFC_WRPROT */
  98 #define NFC_WPC_LOCK_TIGHT      (1 << 0)
  99 #define NFC_WPC_LOCK            (1 << 1)
 100 #define NFC_WPC_UNLOCK          (1 << 2)
 101
 102 struct mpc5121_nfc_prv {
 103         struct mtd_info mtd;
 104         struct nand_chip chip;
 105         int irq;
 106         void __iomem *regs;
 107         struct clk *clk;
 108         uint column;
 109         int spareonly;
 110         int chipsel;
 111 };
 112
 113 int mpc5121_nfc_chip = 0;
 114
 115 static void mpc5121_nfc_done(struct mtd_info *mtd);
 116
 117 /* Read NFC register */
 118 static inline u16 nfc_read(struct mtd_info *mtd, uint reg)
 119 {
 120         struct nand_chip *chip = mtd->priv;
 121         struct mpc5121_nfc_prv *prv = chip->priv;
 122
 123         return in_be16(prv->regs + reg);
 124 }
 125
 126 /* Write NFC register */
 127 static inline void nfc_write(struct mtd_info *mtd, uint reg, u16 val)
 128 {
 129         struct nand_chip *chip = mtd->priv;
 130         struct mpc5121_nfc_prv *prv = chip->priv;
 131
 132         out_be16(prv->regs + reg, val);
 133 }
 134
 135 /* Set bits in NFC register */
 136 static inline void nfc_set(struct mtd_info *mtd, uint reg, u16 bits)
 137 {
 138         nfc_write(mtd, reg, nfc_read(mtd, reg) | bits);
 139 }
 140
 141 /* Clear bits in NFC register */
 142 static inline void nfc_clear(struct mtd_info *mtd, uint reg, u16 bits)
 143 {
 144         nfc_write(mtd, reg, nfc_read(mtd, reg) & ~bits);
 145 }
 146
 147 /* Invoke address cycle */
 148 static inline void mpc5121_nfc_send_addr(struct mtd_info *mtd, u16 addr)
 149 {
 150         nfc_write(mtd, NFC_FLASH_ADDR, addr);
 151         nfc_write(mtd, NFC_CONFIG2, NFC_ADDRESS);
 152         mpc5121_nfc_done(mtd);
 153 }
 154
 155 /* Invoke command cycle */
 156 static inline void mpc5121_nfc_send_cmd(struct mtd_info *mtd, u16 cmd)
 157 {
 158         nfc_write(mtd, NFC_FLASH_CMD, cmd);
 159         nfc_write(mtd, NFC_CONFIG2, NFC_COMMAND);
 160         mpc5121_nfc_done(mtd);
 161 }
 162
 163 /* Send data from NFC buffers to NAND flash */
 164 static inline void mpc5121_nfc_send_prog_page(struct mtd_info *mtd)
 165 {
 166         nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
 167         nfc_write(mtd, NFC_CONFIG2, NFC_INPUT);
 168         mpc5121_nfc_done(mtd);
 169 }
 170
 171 /* Receive data from NAND flash */
 172 static inline void mpc5121_nfc_send_read_page(struct mtd_info *mtd)
 173 {
 174         nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
 175         nfc_write(mtd, NFC_CONFIG2, NFC_OUTPUT);
 176         mpc5121_nfc_done(mtd);
 177 }
 178
 179 /* Receive ID from NAND flash */
 180 static inline void mpc5121_nfc_send_read_id(struct mtd_info *mtd)
 181 {
 182         nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
 183         nfc_write(mtd, NFC_CONFIG2, NFC_ID);
 184         mpc5121_nfc_done(mtd);
 185 }
 186
 187 /* Receive status from NAND flash */
 188 static inline void mpc5121_nfc_send_read_status(struct mtd_info *mtd)
 189 {
 190         nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
 191         nfc_write(mtd, NFC_CONFIG2, NFC_STATUS);
 192         mpc5121_nfc_done(mtd);
 193 }
 194
 195 static void mpc5121_nfc_done(struct mtd_info *mtd)
 196 {
 197         int max_retries = NFC_TIMEOUT;
 198
 199         while (1) {
 200                 max_retries--;
 201                 if (nfc_read(mtd, NFC_CONFIG2) & NFC_INT)
 202                         break;
 203                 udelay(1);
 204         }
 205
 206         if (max_retries <= 0)
 207                 printk(KERN_WARNING DRV_NAME
 208                        ": Timeout while waiting for completion.\n");
 209 }
 210
 211 /* Do address cycle(s) */
 212 static void mpc5121_nfc_addr_cycle(struct mtd_info *mtd, int column, int page)
 213 {
 214         struct nand_chip *chip = mtd->priv;
 215         u32 pagemask = chip->pagemask;
 216
 217         if (column != -1) {
 218                 mpc5121_nfc_send_addr(mtd, column);
 219                 if (mtd->writesize > 512)
 220                         mpc5121_nfc_send_addr(mtd, column >> 8);
 221         }
 222
 223         if (page != -1) {
 224                 do {
 225                         mpc5121_nfc_send_addr(mtd, page & 0xFF);
 226                         page >>= 8;
 227                         pagemask >>= 8;
 228                 } while (pagemask);
 229         }
 230 }
 231
 232 /* Control chip select signals */
 233
 234 /*
 235  * Selecting the active device:
 236  *
 237  * This is different than the linux version. Switching between chips
 238  * is done via board_nand_select_device(). The Linux select_chip
 239  * function used here in U-Boot has only 2 valid chip numbers:
 240  *      0 select
 241  *      -1 deselect
 242  */
 243
 244 /*
 245  * Implement it as a weak default, so that boards with a specific
 246  * chip-select routine can use their own function.
 247  */
 248 void __mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip)
 249 {
 250         if (chip < 0) {
 251                 nfc_clear(mtd, NFC_CONFIG1, NFC_CE);
 252                 return;
 253         }
 254
 255         nfc_clear(mtd, NFC_BUF_ADDR, NFC_ACTIVE_CS_MASK);
 256         nfc_set(mtd, NFC_BUF_ADDR, (chip << NFC_ACTIVE_CS_SHIFT) &
 257                 NFC_ACTIVE_CS_MASK);
 258         nfc_set(mtd, NFC_CONFIG1, NFC_CE);
 259 }
 260 void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip)
 261         __attribute__((weak, alias("__mpc5121_nfc_select_chip")));
 262
 263 void board_nand_select_device(struct nand_chip *nand, int chip)
 264 {
 265         /*
 266          * Only save this chip number in global variable here. This
 267          * will be used later in mpc5121_nfc_select_chip().
 268          */
 269         mpc5121_nfc_chip = chip;
 270 }
 271
 272 /* Read NAND Ready/Busy signal */
 273 static int mpc5121_nfc_dev_ready(struct mtd_info *mtd)
 274 {
 275         /*
 276          * NFC handles ready/busy signal internally. Therefore, this function
 277          * always returns status as ready.
 278          */
 279         return 1;
 280 }
 281
 282 /* Write command to NAND flash */
 283 static void mpc5121_nfc_command(struct mtd_info *mtd, unsigned command,
 284                                 int column, int page)
 285 {
 286         struct nand_chip *chip = mtd->priv;
 287         struct mpc5121_nfc_prv *prv = chip->priv;
 288
 289         prv->column = (column >= 0) ? column : 0;
 290         prv->spareonly = 0;
 291
 292         switch (command) {
 293         case NAND_CMD_PAGEPROG:
 294                 mpc5121_nfc_send_prog_page(mtd);
 295                 break;
 296                 /*
 297                  * NFC does not support sub-page reads and writes,
 298                  * so emulate them using full page transfers.
 299                  */
 300         case NAND_CMD_READ0:
 301                 column = 0;
 302                 break;
 303
 304         case NAND_CMD_READ1:
 305                 prv->column += 256;
 306                 command = NAND_CMD_READ0;
 307                 column = 0;
 308                 break;
 309
 310         case NAND_CMD_READOOB:
 311                 prv->spareonly = 1;
 312                 command = NAND_CMD_READ0;
 313                 column = 0;
 314                 break;
 315
 316         case NAND_CMD_SEQIN:
 317                 mpc5121_nfc_command(mtd, NAND_CMD_READ0, column, page);
 318                 column = 0;
 319                 break;
 320
 321         case NAND_CMD_ERASE1:
 322         case NAND_CMD_ERASE2:
 323         case NAND_CMD_READID:
 324         case NAND_CMD_STATUS:
 325         case NAND_CMD_RESET:
 326                 break;
 327
 328         default:
 329                 return;
 330         }
 331
 332         mpc5121_nfc_send_cmd(mtd, command);
 333         mpc5121_nfc_addr_cycle(mtd, column, page);
 334
 335         switch (command) {
 336         case NAND_CMD_READ0:
 337                 if (mtd->writesize > 512)
 338                         mpc5121_nfc_send_cmd(mtd, NAND_CMD_READSTART);
 339                 mpc5121_nfc_send_read_page(mtd);
 340                 break;
 341
 342         case NAND_CMD_READID:
 343                 mpc5121_nfc_send_read_id(mtd);
 344                 break;
 345
 346         case NAND_CMD_STATUS:
 347                 mpc5121_nfc_send_read_status(mtd);
 348                 if (chip->options & NAND_BUSWIDTH_16)
 349                         prv->column = 1;
 350                 else
 351                         prv->column = 0;
 352                 break;
 353         }
 354 }
 355
 356 /* Copy data from/to NFC spare buffers. */
 357 static void mpc5121_nfc_copy_spare(struct mtd_info *mtd, uint offset,
 358                                    u8 * buffer, uint size, int wr)
 359 {
 360         struct nand_chip *nand = mtd->priv;
 361         struct mpc5121_nfc_prv *prv = nand->priv;
 362         uint o, s, sbsize, blksize;
 363
 364         /*
 365          * NAND spare area is available through NFC spare buffers.
 366          * The NFC divides spare area into (page_size / 512) chunks.
 367          * Each chunk is placed into separate spare memory area, using
 368          * first (spare_size / num_of_chunks) bytes of the buffer.
 369          *
 370          * For NAND device in which the spare area is not divided fully
 371          * by the number of chunks, number of used bytes in each spare
 372          * buffer is rounded down to the nearest even number of bytes,
 373          * and all remaining bytes are added to the last used spare area.
 374          *
 375          * For more information read section 26.6.10 of MPC5121e
 376          * Microcontroller Reference Manual, Rev. 3.
 377          */
 378
 379         /* Calculate number of valid bytes in each spare buffer */
 380         sbsize = (mtd->oobsize / (mtd->writesize / 512)) & ~1;
 381
 382         while (size) {
 383                 /* Calculate spare buffer number */
 384                 s = offset / sbsize;
 385                 if (s > NFC_SPARE_BUFFERS - 1)
 386                         s = NFC_SPARE_BUFFERS - 1;
 387
 388                 /*
 389                  * Calculate offset to requested data block in selected spare
 390                  * buffer and its size.
 391                  */
 392                 o = offset - (s * sbsize);
 393                 blksize = min(sbsize - o, size);
 394
 395                 if (wr)
 396                         memcpy_toio(prv->regs + NFC_SPARE_AREA(s) + o,
 397                                     buffer, blksize);
 398                 else
 399                         memcpy_fromio(buffer,
 400                                       prv->regs + NFC_SPARE_AREA(s) + o,
 401                                       blksize);
 402
 403                 buffer += blksize;
 404                 offset += blksize;
 405                 size -= blksize;
 406         };
 407 }
 408
 409 /* Copy data from/to NFC main and spare buffers */
 410 static void mpc5121_nfc_buf_copy(struct mtd_info *mtd, u_char * buf, int len,
 411                                  int wr)
 412 {
 413         struct nand_chip *chip = mtd->priv;
 414         struct mpc5121_nfc_prv *prv = chip->priv;
 415         uint c = prv->column;
 416         uint l;
 417
 418         /* Handle spare area access */
 419         if (prv->spareonly || c >= mtd->writesize) {
 420                 /* Calculate offset from beginning of spare area */
 421                 if (c >= mtd->writesize)
 422                         c -= mtd->writesize;
 423
 424                 prv->column += len;
 425                 mpc5121_nfc_copy_spare(mtd, c, buf, len, wr);
 426                 return;
 427         }
 428
 429         /*
 430          * Handle main area access - limit copy length to prevent
 431          * crossing main/spare boundary.
 432          */
 433         l = min((uint) len, mtd->writesize - c);
 434         prv->column += l;
 435
 436         if (wr)
 437                 memcpy_toio(prv->regs + NFC_MAIN_AREA(0) + c, buf, l);
 438         else
 439                 memcpy_fromio(buf, prv->regs + NFC_MAIN_AREA(0) + c, l);
 440
 441         /* Handle crossing main/spare boundary */
 442         if (l != len) {
 443                 buf += l;
 444                 len -= l;
 445                 mpc5121_nfc_buf_copy(mtd, buf, len, wr);
 446         }
 447 }
 448
 449 /* Read data from NFC buffers */
 450 static void mpc5121_nfc_read_buf(struct mtd_info *mtd, u_char * buf, int len)
 451 {
 452         mpc5121_nfc_buf_copy(mtd, buf, len, 0);
 453 }
 454
 455 /* Write data to NFC buffers */
 456 static void mpc5121_nfc_write_buf(struct mtd_info *mtd,
 457                                   const u_char * buf, int len)
 458 {
 459         mpc5121_nfc_buf_copy(mtd, (u_char *) buf, len, 1);
 460 }
 461
 462 /* Compare buffer with NAND flash */
 463 static int mpc5121_nfc_verify_buf(struct mtd_info *mtd,
 464                                   const u_char * buf, int len)
 465 {
 466         u_char tmp[256];
 467         uint bsize;
 468
 469         while (len) {
 470                 bsize = min(len, 256);
 471                 mpc5121_nfc_read_buf(mtd, tmp, bsize);
 472
 473                 if (memcmp(buf, tmp, bsize))
 474                         return 1;
 475
 476                 buf += bsize;
 477                 len -= bsize;
 478         }
 479
 480         return 0;
 481 }
 482
 483 /* Read byte from NFC buffers */
 484 static u8 mpc5121_nfc_read_byte(struct mtd_info *mtd)
 485 {
 486         u8 tmp;
 487
 488         mpc5121_nfc_read_buf(mtd, &tmp, sizeof(tmp));
 489
 490         return tmp;
 491 }
 492
 493 /* Read word from NFC buffers */
 494 static u16 mpc5121_nfc_read_word(struct mtd_info *mtd)
 495 {
 496         u16 tmp;
 497
 498         mpc5121_nfc_read_buf(mtd, (u_char *) & tmp, sizeof(tmp));
 499
 500         return tmp;
 501 }
 502
 503 /*
 504  * Read NFC configuration from Reset Config Word
 505  *
 506  * NFC is configured during reset in basis of information stored
 507  * in Reset Config Word. There is no other way to set NAND block
 508  * size, spare size and bus width.
 509  */
 510 static int mpc5121_nfc_read_hw_config(struct mtd_info *mtd)
 511 {
 512         immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
 513         struct nand_chip *chip = mtd->priv;
 514         uint rcw_pagesize = 0;
 515         uint rcw_sparesize = 0;
 516         uint rcw_width;
 517         uint rcwh;
 518         uint romloc, ps;
 519
 520         rcwh = in_be32(&(im->reset.rcwh));
 521
 522         /* Bit 6: NFC bus width */
 523         rcw_width = ((rcwh >> 6) & 0x1) ? 2 : 1;
 524
 525         /* Bit 7: NFC Page/Spare size */
 526         ps = (rcwh >> 7) & 0x1;
 527
 528         /* Bits [22:21]: ROM Location */
 529         romloc = (rcwh >> 21) & 0x3;
 530
 531         /* Decode RCW bits */
 532         switch ((ps << 2) | romloc) {
 533         case 0x00:
 534         case 0x01:
 535                 rcw_pagesize = 512;
 536                 rcw_sparesize = 16;
 537                 break;
 538         case 0x02:
 539         case 0x03:
 540                 rcw_pagesize = 4096;
 541                 rcw_sparesize = 128;
 542                 break;
 543         case 0x04:
 544         case 0x05:
 545                 rcw_pagesize = 2048;
 546                 rcw_sparesize = 64;
 547                 break;
 548         case 0x06:
 549         case 0x07:
 550                 rcw_pagesize = 4096;
 551                 rcw_sparesize = 218;
 552                 break;
 553         }
 554
 555         mtd->writesize = rcw_pagesize;
 556         mtd->oobsize = rcw_sparesize;
 557         if (rcw_width == 2)
 558                 chip->options |= NAND_BUSWIDTH_16;
 559
 560         debug(KERN_NOTICE DRV_NAME ": Configured for "
 561               "%u-bit NAND, page size %u with %u spare.\n",
 562               rcw_width * 8, rcw_pagesize, rcw_sparesize);
 563         return 0;
 564 }
 565
 566 int board_nand_init(struct nand_chip *chip)
 567 {
 568         struct mpc5121_nfc_prv *prv;
 569         struct mtd_info *mtd;
 570         int resettime = 0;
 571         int retval = 0;
 572         int rev;
 573         static int chip_nr = 0;
 574
 575         /*
 576          * Check SoC revision. This driver supports only NFC
 577          * in MPC5121 revision 2.
 578          */
 579         rev = (mfspr(SPRN_SVR) >> 4) & 0xF;
 580         if (rev != 2) {
 581                 printk(KERN_ERR DRV_NAME
 582                        ": SoC revision %u is not supported!\n", rev);
 583                 return -ENXIO;
 584         }
 585
 586         prv = malloc(sizeof(*prv));
 587         if (!prv) {
 588                 printk(KERN_ERR DRV_NAME ": Memory exhausted!\n");
 589                 return -ENOMEM;
 590         }
 591
 592         mtd = &nand_info[chip_nr++];
 593         mtd->priv = chip;
 594         chip->priv = prv;
 595
 596         /* Read NFC configuration from Reset Config Word */
 597         retval = mpc5121_nfc_read_hw_config(mtd);
 598         if (retval) {
 599                 printk(KERN_ERR DRV_NAME ": Unable to read NFC config!\n");
 600                 return retval;
 601         }
 602
 603         prv->regs = (void __iomem *)CONFIG_SYS_NAND_BASE;
 604         chip->dev_ready = mpc5121_nfc_dev_ready;
 605         chip->cmdfunc = mpc5121_nfc_command;
 606         chip->read_byte = mpc5121_nfc_read_byte;
 607         chip->read_word = mpc5121_nfc_read_word;
 608         chip->read_buf = mpc5121_nfc_read_buf;
 609         chip->write_buf = mpc5121_nfc_write_buf;
 610         chip->verify_buf = mpc5121_nfc_verify_buf;
 611         chip->select_chip = mpc5121_nfc_select_chip;
 612         chip->bbt_options = NAND_BBT_USE_FLASH;
 613         chip->ecc.mode = NAND_ECC_SOFT;
 614
 615         /* Reset NAND Flash controller */
 616         nfc_set(mtd, NFC_CONFIG1, NFC_RESET);
 617         while (nfc_read(mtd, NFC_CONFIG1) & NFC_RESET) {
 618                 if (resettime++ >= NFC_RESET_TIMEOUT) {
 619                         printk(KERN_ERR DRV_NAME
 620                                ": Timeout while resetting NFC!\n");
 621                         retval = -EINVAL;
 622                         goto error;
 623                 }
 624
 625                 udelay(1);
 626         }
 627
 628         /* Enable write to NFC memory */
 629         nfc_write(mtd, NFC_CONFIG, NFC_BLS_UNLOCKED);
 630
 631         /* Enable write to all NAND pages */
 632         nfc_write(mtd, NFC_UNLOCKSTART_BLK0, 0x0000);
 633         nfc_write(mtd, NFC_UNLOCKEND_BLK0, 0xFFFF);
 634         nfc_write(mtd, NFC_WRPROT, NFC_WPC_UNLOCK);
 635
 636         /*
 637          * Setup NFC:
 638          *      - Big Endian transfers,
 639          *      - Interrupt after full page read/write.
 640          */
 641         nfc_write(mtd, NFC_CONFIG1, NFC_BIG_ENDIAN | NFC_INT_MASK |
 642                   NFC_FULL_PAGE_INT);
 643
 644         /* Set spare area size */
 645         nfc_write(mtd, NFC_SPAS, mtd->oobsize >> 1);
 646
 647         /* Detect NAND chips */
 648         if (nand_scan(mtd, 1)) {
 649                 printk(KERN_ERR DRV_NAME ": NAND Flash not found !\n");
 650                 retval = -ENXIO;
 651                 goto error;
 652         }
 653
 654         /* Set erase block size */
 655         switch (mtd->erasesize / mtd->writesize) {
 656         case 32:
 657                 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_32);
 658                 break;
 659
 660         case 64:
 661                 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_64);
 662                 break;
 663
 664         case 128:
 665                 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_128);
 666                 break;
 667
 668         case 256:
 669                 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_256);
 670                 break;
 671
 672         default:
 673                 printk(KERN_ERR DRV_NAME ": Unsupported NAND flash!\n");
 674                 retval = -ENXIO;
 675                 goto error;
 676         }
 677
 678         return 0;
 679 error:
 680         return retval;
 681 }