2 * (C) Copyright 2001-2008
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 * Keith Outwater, keith_outwater@mvis.com`
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
27 * DS1337 Real Time Clock (RTC).
35 #if defined(CONFIG_CMD_DATE)
38 * RTC register addresses
40 #if defined CONFIG_RTC_DS1337
41 #define RTC_SEC_REG_ADDR 0x0
42 #define RTC_MIN_REG_ADDR 0x1
43 #define RTC_HR_REG_ADDR 0x2
44 #define RTC_DAY_REG_ADDR 0x3
45 #define RTC_DATE_REG_ADDR 0x4
46 #define RTC_MON_REG_ADDR 0x5
47 #define RTC_YR_REG_ADDR 0x6
48 #define RTC_CTL_REG_ADDR 0x0e
49 #define RTC_STAT_REG_ADDR 0x0f
50 #define RTC_TC_REG_ADDR 0x10
51 #elif defined CONFIG_RTC_DS1388
52 #define RTC_SEC_REG_ADDR 0x1
53 #define RTC_MIN_REG_ADDR 0x2
54 #define RTC_HR_REG_ADDR 0x3
55 #define RTC_DAY_REG_ADDR 0x4
56 #define RTC_DATE_REG_ADDR 0x5
57 #define RTC_MON_REG_ADDR 0x6
58 #define RTC_YR_REG_ADDR 0x7
59 #define RTC_CTL_REG_ADDR 0x0c
60 #define RTC_STAT_REG_ADDR 0x0b
61 #define RTC_TC_REG_ADDR 0x0a
65 * RTC control register bits
67 #define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */
68 #define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */
69 #define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */
70 #define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */
71 #define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */
72 #define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */
75 * RTC status register bits
77 #define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */
78 #define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */
79 #define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */
82 static uchar
rtc_read (uchar reg
);
83 static void rtc_write (uchar reg
, uchar val
);
86 * Get the current time from the RTC
88 int rtc_get (struct rtc_time
*tmp
)
91 uchar sec
, min
, hour
, mday
, wday
, mon_cent
, year
, control
, status
;
93 control
= rtc_read (RTC_CTL_REG_ADDR
);
94 status
= rtc_read (RTC_STAT_REG_ADDR
);
95 sec
= rtc_read (RTC_SEC_REG_ADDR
);
96 min
= rtc_read (RTC_MIN_REG_ADDR
);
97 hour
= rtc_read (RTC_HR_REG_ADDR
);
98 wday
= rtc_read (RTC_DAY_REG_ADDR
);
99 mday
= rtc_read (RTC_DATE_REG_ADDR
);
100 mon_cent
= rtc_read (RTC_MON_REG_ADDR
);
101 year
= rtc_read (RTC_YR_REG_ADDR
);
103 /* No century bit, assume year 2000 */
104 #ifdef CONFIG_RTC_DS1388
108 debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
109 "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
110 year
, mon_cent
, mday
, wday
, hour
, min
, sec
, control
, status
);
112 if (status
& RTC_STAT_BIT_OSF
) {
113 printf ("### Warning: RTC oscillator has stopped\n");
114 /* clear the OSF flag */
115 rtc_write (RTC_STAT_REG_ADDR
,
116 rtc_read (RTC_STAT_REG_ADDR
) & ~RTC_STAT_BIT_OSF
);
120 tmp
->tm_sec
= bcd2bin (sec
& 0x7F);
121 tmp
->tm_min
= bcd2bin (min
& 0x7F);
122 tmp
->tm_hour
= bcd2bin (hour
& 0x3F);
123 tmp
->tm_mday
= bcd2bin (mday
& 0x3F);
124 tmp
->tm_mon
= bcd2bin (mon_cent
& 0x1F);
125 tmp
->tm_year
= bcd2bin (year
) + ((mon_cent
& 0x80) ? 2000 : 1900);
126 tmp
->tm_wday
= bcd2bin ((wday
- 1) & 0x07);
130 debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
131 tmp
->tm_year
, tmp
->tm_mon
, tmp
->tm_mday
, tmp
->tm_wday
,
132 tmp
->tm_hour
, tmp
->tm_min
, tmp
->tm_sec
);
141 int rtc_set (struct rtc_time
*tmp
)
145 debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
146 tmp
->tm_year
, tmp
->tm_mon
, tmp
->tm_mday
, tmp
->tm_wday
,
147 tmp
->tm_hour
, tmp
->tm_min
, tmp
->tm_sec
);
149 rtc_write (RTC_YR_REG_ADDR
, bin2bcd (tmp
->tm_year
% 100));
151 century
= (tmp
->tm_year
>= 2000) ? 0x80 : 0;
152 rtc_write (RTC_MON_REG_ADDR
, bin2bcd (tmp
->tm_mon
) | century
);
154 rtc_write (RTC_DAY_REG_ADDR
, bin2bcd (tmp
->tm_wday
+ 1));
155 rtc_write (RTC_DATE_REG_ADDR
, bin2bcd (tmp
->tm_mday
));
156 rtc_write (RTC_HR_REG_ADDR
, bin2bcd (tmp
->tm_hour
));
157 rtc_write (RTC_MIN_REG_ADDR
, bin2bcd (tmp
->tm_min
));
158 rtc_write (RTC_SEC_REG_ADDR
, bin2bcd (tmp
->tm_sec
));
165 * Reset the RTC. We also enable the oscillator output on the
166 * SQW/INTB* pin and program it for 32,768 Hz output. Note that
167 * according to the datasheet, turning on the square wave output
168 * increases the current drain on the backup battery from about
169 * 600 nA to 2uA. Define CONFIG_SYS_RTC_DS1337_NOOSC if you wish to turn
170 * off the OSC output.
173 #ifdef CONFIG_SYS_RTC_DS1337_NOOSC
174 #define RTC_DS1337_RESET_VAL \
175 (RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
177 #define RTC_DS1337_RESET_VAL (RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
179 void rtc_reset (void)
181 #ifdef CONFIG_SYS_RTC_DS1337
182 rtc_write (RTC_CTL_REG_ADDR
, RTC_DS1337_RESET_VAL
);
183 #elif defined CONFIG_SYS_RTC_DS1388
184 rtc_write(RTC_CTL_REG_ADDR
, 0x0); /* hw default */
186 #ifdef CONFIG_SYS_DS1339_TCR_VAL
187 rtc_write (RTC_TC_REG_ADDR
, CONFIG_SYS_DS1339_TCR_VAL
);
189 #ifdef CONFIG_SYS_DS1388_TCR_VAL
190 rtc_write(RTC_TC_REG_ADDR
, CONFIG_SYS_DS1388_TCR_VAL
);
200 uchar
rtc_read (uchar reg
)
202 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR
, reg
));
206 static void rtc_write (uchar reg
, uchar val
)
208 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR
, reg
, val
);