drivers/spi/mvebu_a3700_spi.c

   1 /*
   2  * Copyright (C) 2015 Marvell International Ltd.
   3  *
   4  * Copyright (C) 2016 Stefan Roese <sr@denx.de>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #include <common.h>
  10 #include <dm.h>
  11 #include <malloc.h>
  12 #include <spi.h>
  13 #include <wait_bit.h>
  14 #include <asm/io.h>
  15
  16 DECLARE_GLOBAL_DATA_PTR;
  17
  18 #define MVEBU_SPI_A3700_XFER_RDY                BIT(1)
  19 #define MVEBU_SPI_A3700_FIFO_FLUSH              BIT(9)
  20 #define MVEBU_SPI_A3700_BYTE_LEN                BIT(5)
  21 #define MVEBU_SPI_A3700_CLK_PHA                 BIT(6)
  22 #define MVEBU_SPI_A3700_CLK_POL                 BIT(7)
  23 #define MVEBU_SPI_A3700_FIFO_EN                 BIT(17)
  24 #define MVEBU_SPI_A3700_SPI_EN_0                BIT(16)
  25 #define MVEBU_SPI_A3700_CLK_PRESCALE_BIT        0
  26 #define MVEBU_SPI_A3700_CLK_PRESCALE_MASK       \
  27         (0x1f << MVEBU_SPI_A3700_CLK_PRESCALE_BIT)
  28
  29 /* SPI registers */
  30 struct spi_reg {
  31         u32 ctrl;       /* 0x10600 */
  32         u32 cfg;        /* 0x10604 */
  33         u32 dout;       /* 0x10608 */
  34         u32 din;        /* 0x1060c */
  35 };
  36
  37 struct mvebu_spi_platdata {
  38         struct spi_reg *spireg;
  39         unsigned int frequency;
  40         unsigned int clock;
  41 };
  42
  43 static void spi_cs_activate(struct spi_reg *reg, int cs)
  44 {
  45         setbits_le32(&reg->ctrl, MVEBU_SPI_A3700_SPI_EN_0 << cs);
  46 }
  47
  48 static void spi_cs_deactivate(struct spi_reg *reg, int cs)
  49 {
  50         clrbits_le32(&reg->ctrl, MVEBU_SPI_A3700_SPI_EN_0 << cs);
  51 }
  52
  53 /**
  54  * spi_legacy_shift_byte() - triggers the real SPI transfer
  55  * @bytelen:    Indicate how many bytes to transfer.
  56  * @dout:       Buffer address of what to send.
  57  * @din:        Buffer address of where to receive.
  58  *
  59  * This function triggers the real SPI transfer in legacy mode. It
  60  * will shift out char buffer from @dout, and shift in char buffer to
  61  * @din, if necessary.
  62  *
  63  * This function assumes that only one byte is shifted at one time.
  64  * However, it is not its responisbility to set the transfer type to
  65  * one-byte. Also, it does not guarantee that it will work if transfer
  66  * type becomes two-byte. See spi_set_legacy() for details.
  67  *
  68  * In legacy mode, simply write to the SPI_DOUT register will trigger
  69  * the transfer.
  70  *
  71  * If @dout == NULL, which means no actual data needs to be sent out,
  72  * then the function will shift out 0x00 in order to shift in data.
  73  * The XFER_RDY flag is checked every time before accessing SPI_DOUT
  74  * and SPI_DIN register.
  75  *
  76  * The number of transfers to be triggerred is decided by @bytelen.
  77  *
  78  * Return:      0 - cool
  79  *              -ETIMEDOUT - XFER_RDY flag timeout
  80  */
  81 static int spi_legacy_shift_byte(struct spi_reg *reg, unsigned int bytelen,
  82                                  const void *dout, void *din)
  83 {
  84         const u8 *dout_8;
  85         u8 *din_8;
  86         int ret;
  87
  88         /* Use 0x00 as dummy dout */
  89         const u8 dummy_dout = 0x0;
  90         u32 pending_dout = 0x0;
  91
  92         /* dout_8: pointer of current dout */
  93         dout_8 = dout;
  94         /* din_8: pointer of current din */
  95         din_8 = din;
  96
  97         while (bytelen) {
  98                 ret = wait_for_bit(__func__, &reg->ctrl,
  99                                    MVEBU_SPI_A3700_XFER_RDY, true, 100, false);
 100                 if (ret)
 101                         return ret;
 102
 103                 if (dout)
 104                         pending_dout = (u32)*dout_8;
 105                 else
 106                         pending_dout = (u32)dummy_dout;
 107
 108                 /* Trigger the xfer */
 109                 writel(pending_dout, &reg->dout);
 110
 111                 if (din) {
 112                         ret = wait_for_bit(__func__, &reg->ctrl,
 113                                            MVEBU_SPI_A3700_XFER_RDY,
 114                                            true, 100, false);
 115                         if (ret)
 116                                 return ret;
 117
 118                         /* Read what is transferred in */
 119                         *din_8 = (u8)readl(&reg->din);
 120                 }
 121
 122                 /* Don't increment the current pointer if NULL */
 123                 if (dout)
 124                         dout_8++;
 125                 if (din)
 126                         din_8++;
 127
 128                 bytelen--;
 129         }
 130
 131         return 0;
 132 }
 133
 134 static int mvebu_spi_xfer(struct udevice *dev, unsigned int bitlen,
 135                           const void *dout, void *din, unsigned long flags)
 136 {
 137         struct udevice *bus = dev->parent;
 138         struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
 139         struct spi_reg *reg = plat->spireg;
 140         unsigned int bytelen;
 141         int ret;
 142
 143         bytelen = bitlen / 8;
 144
 145         if (dout && din)
 146                 debug("This is a duplex transfer.\n");
 147
 148         /* Activate CS */
 149         if (flags & SPI_XFER_BEGIN) {
 150                 debug("SPI: activate cs.\n");
 151                 spi_cs_activate(reg, spi_chip_select(dev));
 152         }
 153
 154         /* Send and/or receive */
 155         if (dout || din) {
 156                 ret = spi_legacy_shift_byte(reg, bytelen, dout, din);
 157                 if (ret)
 158                         return ret;
 159         }
 160
 161         /* Deactivate CS */
 162         if (flags & SPI_XFER_END) {
 163                 ret = wait_for_bit(__func__, &reg->ctrl,
 164                                    MVEBU_SPI_A3700_XFER_RDY, true, 100, false);
 165                 if (ret)
 166                         return ret;
 167
 168                 debug("SPI: deactivate cs.\n");
 169                 spi_cs_deactivate(reg, spi_chip_select(dev));
 170         }
 171
 172         return 0;
 173 }
 174
 175 static int mvebu_spi_set_speed(struct udevice *bus, uint hz)
 176 {
 177         struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
 178         struct spi_reg *reg = plat->spireg;
 179         u32 data;
 180
 181         data = readl(&reg->cfg);
 182
 183         /* Set Prescaler */
 184         data &= ~MVEBU_SPI_A3700_CLK_PRESCALE_MASK;
 185
 186         /* Calculate Prescaler = (spi_input_freq / spi_max_freq) */
 187         if (hz > plat->frequency)
 188                 hz = plat->frequency;
 189         data |= plat->clock / hz;
 190
 191         writel(data, &reg->cfg);
 192
 193         return 0;
 194 }
 195
 196 static int mvebu_spi_set_mode(struct udevice *bus, uint mode)
 197 {
 198         struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
 199         struct spi_reg *reg = plat->spireg;
 200
 201         /*
 202          * Set SPI polarity
 203          * 0: Serial interface clock is low when inactive
 204          * 1: Serial interface clock is high when inactive
 205          */
 206         if (mode & SPI_CPOL)
 207                 setbits_le32(&reg->cfg, MVEBU_SPI_A3700_CLK_POL);
 208         else
 209                 clrbits_le32(&reg->cfg, MVEBU_SPI_A3700_CLK_POL);
 210         if (mode & SPI_CPHA)
 211                 setbits_le32(&reg->cfg, MVEBU_SPI_A3700_CLK_PHA);
 212         else
 213                 clrbits_le32(&reg->cfg, MVEBU_SPI_A3700_CLK_PHA);
 214
 215         return 0;
 216 }
 217
 218 static int mvebu_spi_probe(struct udevice *bus)
 219 {
 220         struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
 221         struct spi_reg *reg = plat->spireg;
 222         u32 data;
 223         int ret;
 224
 225         /*
 226          * Settings SPI controller to be working in legacy mode, which
 227          * means use only DO pin (I/O 1) for Data Out, and DI pin (I/O 0)
 228          * for Data In.
 229          */
 230
 231         /* Flush read/write FIFO */
 232         data = readl(&reg->cfg);
 233         writel(data | MVEBU_SPI_A3700_FIFO_FLUSH, &reg->cfg);
 234         ret = wait_for_bit(__func__, &reg->cfg, MVEBU_SPI_A3700_FIFO_FLUSH,
 235                            false, 1000, false);
 236         if (ret)
 237                 return ret;
 238
 239         /* Disable FIFO mode */
 240         data &= ~MVEBU_SPI_A3700_FIFO_EN;
 241
 242         /* Always shift 1 byte at a time */
 243         data &= ~MVEBU_SPI_A3700_BYTE_LEN;
 244
 245         writel(data, &reg->cfg);
 246
 247         return 0;
 248 }
 249
 250 static int mvebu_spi_ofdata_to_platdata(struct udevice *bus)
 251 {
 252         struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
 253
 254         plat->spireg = (struct spi_reg *)dev_get_addr(bus);
 255
 256         /*
 257          * FIXME
 258          * Right now, mvebu does not have a clock infrastructure in U-Boot
 259          * which should be used to query the input clock to the SPI
 260          * controller. Once this clock driver is integrated into U-Boot
 261          * it should be used to read the input clock and the DT property
 262          * can be removed.
 263          */
 264         plat->clock = fdtdec_get_int(gd->fdt_blob, bus->of_offset,
 265                                      "clock-frequency", 160000);
 266         plat->frequency = fdtdec_get_int(gd->fdt_blob, bus->of_offset,
 267                                          "spi-max-frequency", 40000);
 268
 269         return 0;
 270 }
 271
 272 static const struct dm_spi_ops mvebu_spi_ops = {
 273         .xfer           = mvebu_spi_xfer,
 274         .set_speed      = mvebu_spi_set_speed,
 275         .set_mode       = mvebu_spi_set_mode,
 276         /*
 277          * cs_info is not needed, since we require all chip selects to be
 278          * in the device tree explicitly
 279          */
 280 };
 281
 282 static const struct udevice_id mvebu_spi_ids[] = {
 283         { .compatible = "marvell,armada-3700-spi" },
 284         { }
 285 };
 286
 287 U_BOOT_DRIVER(mvebu_spi) = {
 288         .name = "mvebu_spi",
 289         .id = UCLASS_SPI,
 290         .of_match = mvebu_spi_ids,
 291         .ops = &mvebu_spi_ops,
 292         .ofdata_to_platdata = mvebu_spi_ofdata_to_platdata,
 293         .platdata_auto_alloc_size = sizeof(struct mvebu_spi_platdata),
 294         .probe = mvebu_spi_probe,
 295 };