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1 /*
2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * Based on davinci_dvevm.h. Original Copyrights follow:
5 *
6 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23 #ifndef __CONFIG_H
24 #define __CONFIG_H
25
26 /*
27 * Board
28 */
29 #define CONFIG_SYS_USE_NAND 1
30
31 /*
32 * SoC Configuration
33 */
34 #define CONFIG_MACH_DAVINCI_HAWK
35 #define CONFIG_ARM926EJS /* arm926ejs CPU core */
36 #define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
37 #define CONFIG_SOC_DA850 /* TI DA850 SoC */
38 #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
39 #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
40 #define CONFIG_SYS_OSCIN_FREQ 24000000
41 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
42 #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
43 #define CONFIG_SYS_HZ 1000
44 #define CONFIG_SKIP_LOWLEVEL_INIT
45 #define CONFIG_BOARD_EARLY_INIT_F
46 #define CONFIG_AIS_CONFIG_FILE "board/$(BOARDDIR)/hawkboard-ais-nand.cfg"
47
48 #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \
49 DAVINCI_SYSCFG_SUSPSRC_EMAC | \
50 DAVINCI_SYSCFG_SUSPSRC_I2C | \
51 DAVINCI_SYSCFG_SUSPSRC_SPI1 | \
52 DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \
53 DAVINCI_SYSCFG_SUSPSRC_UART2)
54
55 #if defined(CONFIG_UART_U_BOOT)
56 #define CONFIG_SYS_TEXT_BASE 0xc1080000
57 #elif !defined(CONFIG_SPL_BUILD)
58 #define CONFIG_SYS_TEXT_BASE 0xc1180000
59 #endif
60
61 /* Spl */
62 #define CONFIG_SPL
63 #define CONFIG_SPL_FRAMEWORK
64 #define CONFIG_SPL_BOARD_INIT
65 #define CONFIG_SPL_NAND_SUPPORT
66 #define CONFIG_SPL_NAND_BASE
67 #define CONFIG_SPL_NAND_DRIVERS
68 #define CONFIG_SPL_NAND_ECC
69 #define CONFIG_SPL_NAND_SIMPLE
70 #define CONFIG_SPL_LIBGENERIC_SUPPORT /* for udelay and __div64_32 for NAND */
71 #define CONFIG_SPL_SERIAL_SUPPORT
72 #define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-hawk.lds"
73 #define CONFIG_SPL_TEXT_BASE 0xc1080000
74 #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
75
76 /*
77 * Memory Info
78 */
79 #define CONFIG_SYS_MALLOC_LEN (1*1024*1024) /* malloc() len */
80 #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE
81 #define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */
82 #define CONFIG_SYS_SDRAM_BASE 0xc0000000
83 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20)
84 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 -\
85 GENERATED_GBL_DATA_SIZE)
86 #define CONFIG_SYS_MONITOR_LEN 0x60000
87
88 /* memtest start addr */
89 #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1)
90
91 /* memtest will be run on 16MB */
92 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024)
93
94 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
95
96 /*
97 * Serial Driver info
98 */
99 #define CONFIG_SYS_NS16550
100 #define CONFIG_SYS_NS16550_SERIAL
101 #define CONFIG_SYS_NS16550_REG_SIZE -4
102 #define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE
103 #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
104 #define CONFIG_CONS_INDEX 1
105 #define CONFIG_BAUDRATE 115200
106
107 /*
108 * Network & Ethernet Configuration
109 */
110 #define CONFIG_DRIVER_TI_EMAC
111 #define CONFIG_MII
112 #define CONFIG_BOOTP_DEFAULT
113 #define CONFIG_BOOTP_DNS
114 #define CONFIG_BOOTP_DNS2
115 #define CONFIG_BOOTP_SEND_HOSTNAME
116 #define CONFIG_NET_RETRY_COUNT 10
117
118 /*
119 * Nand Flash
120 */
121 #ifdef CONFIG_SYS_USE_NAND
122 #define CONFIG_SYS_NO_FLASH
123 #define CONFIG_ENV_IS_IN_NAND
124 #define CONFIG_ENV_SIZE (128 << 10)
125 #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
126 #define CONFIG_CLE_MASK 0x10
127 #define CONFIG_ALE_MASK 0x8
128 #define CONFIG_SYS_NAND_USE_FLASH_BBT
129 #define CONFIG_NAND_DAVINCI
130 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
131 #define CONFIG_SYS_NAND_HW_ECC_OOBFIRST /* SPL nand driver configuration */
132 #define CFG_DAVINCI_STD_NAND_LAYOUT
133 #define CONFIG_SYS_NAND_CS 3
134 #define CONFIG_SYS_NAND_PAGE_2K
135 /* Max number of NAND devices */
136 #define CONFIG_SYS_MAX_NAND_DEVICE 1
137 #define CONFIG_SYS_NAND_BASE_LIST { 0x62000000, }
138 /* Block 0--not used by bootcode */
139 #define CONFIG_ENV_OFFSET 0x0
140
141 #define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10)
142 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
143 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0xe0000
144 #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1180000
145 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
146 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \
147 CONFIG_SYS_NAND_U_BOOT_SIZE - \
148 CONFIG_SYS_MALLOC_LEN - \
149 GENERATED_GBL_DATA_SIZE)
150 #define CONFIG_SYS_NAND_ECCPOS { \
151 24, 25, 26, 27, 28, \
152 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \
153 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \
154 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \
155 59, 60, 61, 62, 63 }
156 #define CONFIG_SYS_NAND_PAGE_COUNT 64
157 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
158 #define CONFIG_SYS_NAND_ECCSIZE 512
159 #define CONFIG_SYS_NAND_ECCBYTES 10
160 #define CONFIG_SYS_NAND_OOBSIZE 64
161
162 #endif /* CONFIG_SYS_USE_NAND */
163
164 /* USB Configs */
165 #define CONFIG_SYS_USB_OHCI_CPU_INIT
166 #define CONFIG_USB_OHCI_NEW
167 #define CONFIG_USB_OHCI_DA8XX
168 #define CONFIG_USB_STORAGE
169 #define CONFIG_DOS_PARTITION
170 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x01E25000
171 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
172 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "hawkboard"
173
174 /*
175 * U-Boot general configuration
176 */
177 #define CONFIG_MISC_INIT_R
178 #define CONFIG_BOOTFILE "uImage" /* Boot file name */
179 #define CONFIG_SYS_PROMPT "hawkboard > " /* Command Prompt */
180 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
181 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
182 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
183 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
184 #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
185 #define CONFIG_VERSION_VARIABLE
186 #define CONFIG_AUTO_COMPLETE
187 #define CONFIG_SYS_HUSH_PARSER
188 #define CONFIG_CMDLINE_EDITING
189 #define CONFIG_SYS_LONGHELP
190 #define CONFIG_CRC32_VERIFY
191 #define CONFIG_MX_CYCLIC
192
193 /*
194 * Linux Information
195 */
196 #define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100)
197 #define CONFIG_CMDLINE_TAG
198 #define CONFIG_SETUP_MEMORY_TAGS
199 #define CONFIG_BOOTARGS \
200 "mem=128M console=ttyS2,115200n8 root=/dev/ram0 rw initrd=0xc1180000,"\
201 "4M ip=static"
202 #define CONFIG_BOOTDELAY 3
203
204 /*
205 * U-Boot commands
206 */
207 #include <config_cmd_default.h>
208 #define CONFIG_CMD_ENV
209 #define CONFIG_CMD_ASKENV
210 #define CONFIG_CMD_DHCP
211 #define CONFIG_CMD_DIAG
212 #define CONFIG_CMD_MII
213 #define CONFIG_CMD_PING
214 #define CONFIG_CMD_SAVES
215 #define CONFIG_CMD_MEMORY
216 #define CONFIG_CMD_USB
217 #define CONFIG_CMD_EXT2
218
219 #ifdef CONFIG_CMD_BDI
220 #define CONFIG_CLOCKS
221 #endif
222
223 #ifdef CONFIG_SYS_USE_NAND
224 #undef CONFIG_CMD_FLASH
225 #undef CONFIG_CMD_IMLS
226 #define CONFIG_CMD_NAND
227 #endif
228
229 #ifndef CONFIG_DRIVER_TI_EMAC
230 #undef CONFIG_CMD_NET
231 #undef CONFIG_CMD_DHCP
232 #undef CONFIG_CMD_MII
233 #undef CONFIG_CMD_PING
234 #endif
235
236 #endif /* __CONFIG_H */