include/configs/kzm9g.h

   1 /*
   2  * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
   3  * Copyright (C) 2012 Renesas Solutions Corp.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __KZM9G_H
   9 #define __KZM9G_H
  10
  11 #undef DEBUG
  12
  13 #define CONFIG_SH73A0
  14 #define CONFIG_KZM_A9_GT
  15 #define CONFIG_ARCH_RMOBILE_BOARD_STRING        "KMC KZM-A9-GT"
  16 #define CONFIG_MACH_TYPE MACH_TYPE_KZM9G
  17
  18 #include <asm/arch/rmobile.h>
  19
  20 #define CONFIG_ARCH_CPU_INIT
  21
  22 #define CONFIG_CMDLINE_TAG
  23 #define CONFIG_SETUP_MEMORY_TAGS
  24 #define CONFIG_INITRD_TAG
  25
  26 #undef  CONFIG_SHOW_BOOT_PROGRESS
  27
  28 /* MEMORY */
  29 #define KZM_SDRAM_BASE  (0x40000000)
  30 #define PHYS_SDRAM              KZM_SDRAM_BASE
  31 #define PHYS_SDRAM_SIZE         (512 * 1024 * 1024)
  32 #define CONFIG_NR_DRAM_BANKS    (1)
  33
  34 /* NOR Flash */
  35 #define KZM_FLASH_BASE  (0x00000000)
  36 #define CONFIG_SYS_FLASH_BASE           (KZM_FLASH_BASE)
  37 #define CONFIG_SYS_FLASH_CFI_WIDTH      (FLASH_CFI_16BIT)
  38 #define CONFIG_SYS_MAX_FLASH_BANKS      (1)
  39 #define CONFIG_SYS_MAX_FLASH_SECT       (512)
  40
  41 /* prompt */
  42 #define CONFIG_SYS_LONGHELP
  43 #define CONFIG_SYS_PBSIZE               256
  44 #define CONFIG_SYS_MAXARGS              16
  45 #define CONFIG_SYS_BARGSIZE             512
  46 #define CONFIG_SYS_BAUDRATE_TABLE       { 115200 }
  47
  48 /* SCIF */
  49 #define CONFIG_CONS_SCIF4
  50
  51 #define CONFIG_SYS_MEMTEST_START        (KZM_SDRAM_BASE)
  52 #define CONFIG_SYS_MEMTEST_END \
  53         (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
  54 #undef  CONFIG_SYS_ALT_MEMTEST
  55 #undef  CONFIG_SYS_MEMTEST_SCRATCH
  56 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
  57
  58 #define CONFIG_SYS_INIT_RAM_ADDR        (0xE5600000) /* on MERAM */
  59 #define CONFIG_SYS_INIT_RAM_SIZE        (0x10000)
  60 #define LOW_LEVEL_MERAM_STACK           (CONFIG_SYS_INIT_RAM_ADDR - 4)
  61 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
  62                                          CONFIG_SYS_INIT_RAM_SIZE - \
  63                                          GENERATED_GBL_DATA_SIZE)
  64 #define CONFIG_SDRAM_OFFSET_FOR_RT      (16 * 1024 * 1024)
  65 #define CONFIG_SYS_SDRAM_BASE   (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT)
  66 #define CONFIG_SYS_SDRAM_SIZE   (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT)
  67 #define CONFIG_SYS_LOAD_ADDR    (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
  68
  69 #define CONFIG_SYS_MONITOR_BASE (KZM_FLASH_BASE)
  70 #define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + 128 * 1024)
  71 #define CONFIG_SYS_BOOTMAPSZ    (8 * 1024 * 1024)
  72
  73 #define CONFIG_SYS_TEXT_BASE            0x00000000
  74 #define CONFIG_STANDALONE_LOAD_ADDR     0x41000000
  75
  76 /* FLASH */
  77 #define CONFIG_FLASH_CFI_DRIVER
  78 #define CONFIG_SYS_FLASH_CFI
  79 #undef  CONFIG_SYS_FLASH_QUIET_TEST
  80 #define CONFIG_SYS_FLASH_EMPTY_INFO
  81 #define FLASH_SECTOR_SIZE       (256 * 1024)    /* 256 KB sectors */
  82 #define CONFIG_ENV_SIZE         FLASH_SECTOR_SIZE
  83 #define CONFIG_ENV_OFFSET       FLASH_SECTOR_SIZE
  84 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
  85
  86 /* Timeout for Flash erase operations (in ms) */
  87 #define CONFIG_SYS_FLASH_ERASE_TOUT     (3 * 1000)
  88 /* Timeout for Flash write operations (in ms) */
  89 #define CONFIG_SYS_FLASH_WRITE_TOUT     (3 * 1000)
  90 /* Timeout for Flash set sector lock bit operations (in ms) */
  91 #define CONFIG_SYS_FLASH_LOCK_TOUT              (3 * 1000)
  92 /* Timeout for Flash clear lock bit operations (in ms) */
  93 #define CONFIG_SYS_FLASH_UNLOCK_TOUT    (3 * 1000)
  94
  95 #undef  CONFIG_SYS_FLASH_PROTECTION
  96 #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
  97
  98 /* GPIO / PFC */
  99 #define CONFIG_SH_GPIO_PFC
 100
 101 /* Clock */
 102 #define CONFIG_GLOBAL_TIMER
 103 #define CONFIG_SYS_CLK_FREQ     (48000000)
 104 #define CONFIG_SYS_CPU_CLK      (1196000000)
 105 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 106 #define TMU_CLK_DIVIDER         (4)     /* 4 (default), 16, 64, 256 or 1024 */
 107
 108 /* Ether */
 109 #define CONFIG_SMC911X
 110 #define CONFIG_SMC911X_BASE     (0x10000000)
 111 #define CONFIG_SMC911X_32_BIT
 112 #define CONFIG_NFS_TIMEOUT 10000UL
 113
 114 /* I2C */
 115 #define CONFIG_SYS_I2C
 116 #define CONFIG_SYS_I2C_SH
 117 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
 118 #define CONFIG_SYS_I2C_SH_BASE0 0xE6820000
 119 #define CONFIG_SYS_I2C_SH_SPEED0        100000
 120 #define CONFIG_SYS_I2C_SH_BASE1 0xE6822000
 121 #define CONFIG_SYS_I2C_SH_SPEED1        100000
 122 #define CONFIG_SYS_I2C_SH_BASE2 0xE6824000
 123 #define CONFIG_SYS_I2C_SH_SPEED2        100000
 124 #define CONFIG_SYS_I2C_SH_BASE3 0xE6826000
 125 #define CONFIG_SYS_I2C_SH_SPEED3        100000
 126 #define CONFIG_SYS_I2C_SH_BASE4 0xE6828000
 127 #define CONFIG_SYS_I2C_SH_SPEED4        100000
 128 #define CONFIG_SH_I2C_8BIT
 129 #define CONFIG_SH_I2C_DATA_HIGH 4
 130 #define CONFIG_SH_I2C_DATA_LOW  5
 131 #define CONFIG_SH_I2C_CLOCK     104000000 /* 104 MHz */
 132
 133 #endif /* __KZM9G_H */