include/configs/omap730p2.h

   1 /*
   2  * (C) Copyright 2003-2004
   3  * MPC Data Limited (http://www.mpc-data.co.uk)
   4  * Dave Peverley <dpeverley at mpc-data.co.uk>
   5  *
   6  * Configuation settings for the TI OMAP Perseus 2 board.
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #ifndef __CONFIG_H
  28 #define __CONFIG_H
  29
  30 /* allow to overwrite serial and ethaddr */
  31 #define CONFIG_ENV_OVERWRITE
  32
  33 /*
  34  * High Level Configuration Options
  35  * (easy to change)
  36  */
  37
  38 #define CONFIG_ARM926EJS           1         /* This is an arm926ejs CPU core  */
  39 #define CONFIG_OMAP                1         /* in a TI OMAP core    */
  40 #define CONFIG_OMAP730             1         /* which is in a 730  */
  41 #define CONFIG_P2_OMAP730          1         /*  a Perseus 2 Board  */
  42
  43 /*
  44  * Input clock of PLL
  45  * The OMAP730 Perseus 2 has 13MHz input clock
  46  */
  47
  48 #define CONFIG_SYS_CLK_FREQ        13000000
  49
  50 #define CONFIG_CMDLINE_TAG         1         /* enable passing of ATAGs  */
  51 #define CONFIG_SETUP_MEMORY_TAGS   1
  52
  53 /*
  54  * Size of malloc() pool
  55  */
  56
  57 #define CONFIG_SYS_MALLOC_LEN              (CONFIG_ENV_SIZE + 128*1024)
  58
  59 /*
  60  * Hardware drivers
  61  */
  62
  63 #define CONFIG_LAN91C96
  64 #define CONFIG_LAN91C96_BASE       0x04000300
  65 #define CONFIG_LAN91C96_EXT_PHY
  66
  67 /*
  68  * NS16550 Configuration
  69  */
  70
  71 #define CONFIG_SYS_NS16550
  72 #define CONFIG_SYS_NS16550_SERIAL
  73 #define CONFIG_SYS_NS16550_REG_SIZE        (1)
  74 #define CONFIG_SYS_NS16550_CLK             (48000000)     /* can be 12M/32Khz or 48Mhz */
  75 #define CONFIG_SYS_NS16550_COM1    0xfffb0000     /* uart1, bluetooth uart
  76                                                    * on perseus */
  77
  78 /*
  79  * select serial console configuration
  80  */
  81
  82 #define CONFIG_SERIAL1             1         /* we use SERIAL 1 on OMAP730 Perseus 2 */
  83
  84 #define CONFIG_CONS_INDEX          1
  85 #define CONFIG_BAUDRATE            115200
  86
  87 /*
  88  * Command line configuration.
  89  */
  90 #include <config_cmd_default.h>
  91
  92 #define CONFIG_CMD_DHCP
  93
  94
  95 /*
  96  * BOOTP options
  97  */
  98 #define CONFIG_BOOTP_SUBNETMASK
  99 #define CONFIG_BOOTP_GATEWAY
 100 #define CONFIG_BOOTP_HOSTNAME
 101 #define CONFIG_BOOTP_BOOTPATH
 102
 103
 104 #include <configs/omap730.h>
 105 #include <configs/h2_p2_dbg_board.h>
 106
 107 #define CONFIG_BOOTDELAY           3
 108 #define CONFIG_BOOTARGS            "mem=32M console=ttyS0,115200n8 noinitrd root=/dev/nfs rw ip=bootp"
 109
 110 #define CONFIG_LOADADDR            0x10000000
 111
 112 #define CONFIG_ETHADDR
 113 #define CONFIG_NETMASK             255.255.255.0
 114 #define CONFIG_IPADDR              192.168.0.23
 115 #define CONFIG_SERVERIP            192.150.0.100
 116 #define CONFIG_BOOTFILE            "uImage"  /* File to load */
 117
 118 #if defined(CONFIG_CMD_KGDB)
 119 #define CONFIG_KGDB_BAUDRATE       115200    /* Speed to run kgdb serial port */
 120 #define CONFIG_KGDB_SER_INDEX      1         /* Which serial port to use */
 121 #endif
 122
 123 /*
 124  * Miscellaneous configurable options
 125  */
 126
 127 #define CONFIG_SYS_LONGHELP                                    /* undef to save memory     */
 128 #define CONFIG_SYS_PROMPT                  "OMAP730 P2 # "     /* Monitor Command Prompt   */
 129 #define CONFIG_SYS_CBSIZE                  256                 /* Console I/O Buffer Size  */
 130 /* Print Buffer Size */
 131 #define CONFIG_SYS_PBSIZE                  (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 132 #define CONFIG_SYS_MAXARGS                 16                  /* max number of command args   */
 133 #define CONFIG_SYS_BARGSIZE                CONFIG_SYS_CBSIZE           /* Boot Argument Buffer Size    */
 134
 135 #define CONFIG_SYS_MEMTEST_START           0x10000000          /* memtest works on */
 136 #define CONFIG_SYS_MEMTEST_END             0x12000000          /* 32 MB in DRAM    */
 137
 138 #define CONFIG_SYS_LOAD_ADDR               0x10000000          /* default load address */
 139
 140 /* The OMAP730 has 3 general purpose MPU timers, they can be driven by
 141  * the RefClk (12Mhz) or by DPLL1. This time is further subdivided by a
 142  * local divisor.
 143  */
 144 #define CONFIG_SYS_TIMERBASE            0xFFFEC500      /* use timer 1 */
 145 #define CONFIG_SYS_PTV                  7       /* 2^(PTV+1), divide by 256 */
 146 #define CONFIG_SYS_HZ                   ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
 147
 148 /*-----------------------------------------------------------------------
 149  * Physical Memory Map
 150  */
 151
 152 #define CONFIG_NR_DRAM_BANKS       1              /* we have 1 bank of DRAM */
 153 #define PHYS_SDRAM_1               0x10000000     /* SDRAM Bank #1 */
 154 #define PHYS_SDRAM_1_SIZE          0x02000000     /* 32 MB */
 155
 156 #if defined(CONFIG_CS0_BOOT)
 157 #define PHYS_FLASH_1               0x0C000000
 158 #elif defined(CONFIG_CS3_BOOT)
 159 #define PHYS_FLASH_1               0x00000000
 160 #else
 161 #error Unknown Boot Chip-Select number
 162 #endif
 163
 164 #define PHYS_SRAM               0x20000000
 165
 166 #define CONFIG_SYS_FLASH_BASE              PHYS_FLASH_1
 167
 168 /*-----------------------------------------------------------------------
 169  * FLASH and environment organization
 170  */
 171
 172 #define CONFIG_SYS_MAX_FLASH_BANKS         1              /* max number of memory banks */
 173 #define PHYS_FLASH_SIZE            0x02000000     /* 32MB */
 174 #define CONFIG_SYS_MAX_FLASH_SECT          (259)          /* max number of sectors on one chip */
 175 /* addr of environment */
 176 #define CONFIG_ENV_ADDR            (CONFIG_SYS_FLASH_BASE + 0x020000)
 177
 178 /* timeout values are in ticks */
 179 #define CONFIG_SYS_FLASH_ERASE_TOUT         (20*CONFIG_SYS_HZ)    /* Timeout for Flash Erase */
 180 #define CONFIG_SYS_FLASH_WRITE_TOUT         (20*CONFIG_SYS_HZ)    /* Timeout for Flash Write */
 181
 182 #define CONFIG_ENV_IS_IN_FLASH     1
 183 #define CONFIG_ENV_SIZE            0x20000        /* Total Size of Environment Sector */
 184 #define CONFIG_ENV_OFFSET                  0x20000        /* environment starts here  */
 185
 186 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 187 #define CONFIG_SYS_INIT_SP_ADDR         PHYS_SRAM
 188
 189 #endif    /* ! __CONFIG_H */