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1 /*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the phytec PCM-052 SoM.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 #include <asm/arch/imx-regs.h>
13
14 #define CONFIG_SKIP_LOWLEVEL_INIT
15
16 /* Enable passing of ATAGs */
17 #define CONFIG_CMDLINE_TAG
18
19 /* Size of malloc() pool */
20 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
21
22 /* Allow to overwrite serial and ethaddr */
23 #define CONFIG_ENV_OVERWRITE
24
25 /* NAND support */
26 #define CONFIG_SYS_NAND_ONFI_DETECTION
27
28 #ifdef CONFIG_CMD_NAND
29 #define CONFIG_SYS_MAX_NAND_DEVICE 1
30 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
31
32 #define CONFIG_JFFS2_NAND
33
34 /* Dynamic MTD partition support */
35 #define CONFIG_MTD_PARTITIONS
36 #define CONFIG_MTD_DEVICE
37
38 #ifndef MTDIDS_DEFAULT
39 #define MTDIDS_DEFAULT "nand0=NAND"
40 #endif
41
42 #ifndef MTDPARTS_DEFAULT
43 #define MTDPARTS_DEFAULT "mtdparts=NAND:640k(bootloader)"\
44 ",128k(env1)"\
45 ",128k(env2)"\
46 ",128k(dtb)"\
47 ",6144k(kernel)"\
48 ",-(root)"
49 #endif
50
51 #endif
52
53 #define CONFIG_FSL_ESDHC
54 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
55 #define CONFIG_SYS_FSL_ESDHC_NUM 1
56
57 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
58
59 #define CONFIG_FEC_MXC
60 #define CONFIG_MII
61 #define IMX_FEC_BASE ENET_BASE_ADDR
62 #define CONFIG_FEC_XCV_TYPE RMII
63 #define CONFIG_FEC_MXC_PHYADDR 0
64 #define CONFIG_PHYLIB
65 #define CONFIG_PHY_MICREL
66
67 /* QSPI Configs*/
68
69 #ifdef CONFIG_FSL_QSPI
70 #define FSL_QSPI_FLASH_SIZE (1 << 24)
71 #define FSL_QSPI_FLASH_NUM 2
72 #define CONFIG_SYS_FSL_QSPI_LE
73 #endif
74
75 /* I2C Configs */
76 #define CONFIG_SYS_I2C
77 #define CONFIG_SYS_I2C_MXC_I2C3
78 #define CONFIG_SYS_I2C_MXC
79
80 /* RTC (actually an RV-4162 but M41T62-compatible) */
81 #define CONFIG_RTC_M41T62
82 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
83 #define CONFIG_SYS_RTC_BUS_NUM 2
84
85 /* EEPROM (24FC256) */
86 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
87 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
88 #define CONFIG_SYS_I2C_EEPROM_BUS 2
89
90
91 #define CONFIG_LOADADDR 0x82000000
92
93 /* We boot from the gfxRAM area of the OCRAM. */
94 #define CONFIG_SYS_TEXT_BASE 0x3f408000
95 #define CONFIG_BOARD_SIZE_LIMIT 524288
96
97 /* if no target-specific extra environment settings were defined by the
98 target, define an empty one */
99 #ifndef PCM052_EXTRA_ENV_SETTINGS
100 #define PCM052_EXTRA_ENV_SETTINGS
101 #endif
102
103 /* if no target-specific boot command was defined by the target,
104 define an empty one */
105 #ifndef PCM052_BOOTCOMMAND
106 #define PCM052_BOOTCOMMAND
107 #endif
108
109 /* if no target-specific extra environment settings were defined by the
110 target, define an empty one */
111 #ifndef PCM052_NET_INIT
112 #define PCM052_NET_INIT
113 #endif
114
115 /* boot command, including the target-defined one if any */
116 #define CONFIG_BOOTCOMMAND PCM052_BOOTCOMMAND "run bootcmd_nand"
117
118 /* Extra env settings (including the target-defined ones if any) */
119 #define CONFIG_EXTRA_ENV_SETTINGS \
120 PCM052_EXTRA_ENV_SETTINGS \
121 "autoload=no\0" \
122 "fdt_high=0xffffffff\0" \
123 "initrd_high=0xffffffff\0" \
124 "blimg_file=u-boot.vyb\0" \
125 "blimg_addr=0x81000000\0" \
126 "kernel_file=zImage\0" \
127 "kernel_addr=0x82000000\0" \
128 "fdt_file=zImage.dtb\0" \
129 "fdt_addr=0x81000000\0" \
130 "ram_file=uRamdisk\0" \
131 "ram_addr=0x83000000\0" \
132 "filesys=rootfs.ubifs\0" \
133 "sys_addr=0x81000000\0" \
134 "tftploc=/path/to/tftp/directory/\0" \
135 "nfs_root=/path/to/nfs/root\0" \
136 "tftptimeout=1000\0" \
137 "tftptimeoutcountmax=1000000\0" \
138 "mtdparts=" MTDPARTS_DEFAULT "\0" \
139 "bootargs_base=setenv bootargs rw " \
140 " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
141 "console=ttyLP1,115200n8\0" \
142 "bootargs_sd=setenv bootargs ${bootargs} " \
143 "root=/dev/mmcblk0p2 rootwait\0" \
144 "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
145 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
146 "bootargs_nand=setenv bootargs ${bootargs} " \
147 "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
148 "bootargs_ram=setenv bootargs ${bootargs} " \
149 "root=/dev/ram rw initrd=${ram_addr}\0" \
150 "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
151 "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
152 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
153 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
154 "bootz ${kernel_addr} - ${fdt_addr}\0" \
155 "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
156 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
157 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
158 "bootz ${kernel_addr} - ${fdt_addr}\0" \
159 "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
160 "nand read ${fdt_addr} dtb; " \
161 "nand read ${kernel_addr} kernel; " \
162 "bootz ${kernel_addr} - ${fdt_addr}\0" \
163 "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
164 "nand read ${fdt_addr} dtb; " \
165 "nand read ${kernel_addr} kernel; " \
166 "nand read ${ram_addr} root; " \
167 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
168 "update_bootloader_from_tftp=" PCM052_NET_INIT \
169 "if tftp ${blimg_addr} "\
170 "${tftpdir}${blimg_file}; then " \
171 "mtdparts default; " \
172 "nand erase.part bootloader; " \
173 "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
174 "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
175 "${kernel_file}; " \
176 "then mtdparts default; " \
177 "nand erase.part kernel; " \
178 "nand write ${kernel_addr} kernel ${filesize}; " \
179 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
180 "nand erase.part dtb; " \
181 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \
182 "update_kernel_from_tftp=" PCM052_NET_INIT \
183 "if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
184 "then setenv fdtsize ${filesize}; " \
185 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
186 "mtdparts default; " \
187 "nand erase.part dtb; " \
188 "nand write ${fdt_addr} dtb ${fdtsize}; " \
189 "nand erase.part kernel; " \
190 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
191 "update_rootfs_from_tftp=" PCM052_NET_INIT \
192 "if tftp ${sys_addr} ${tftpdir}${filesys}; " \
193 "then mtdparts default; " \
194 "nand erase.part root; " \
195 "ubi part root; " \
196 "ubi create rootfs; " \
197 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
198 "update_ramdisk_from_tftp=" PCM052_NET_INIT \
199 "if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
200 "then mtdparts default; " \
201 "nand erase.part root; " \
202 "nand write ${ram_addr} root ${filesize}; fi\0"
203
204 /* Miscellaneous configurable options */
205 #define CONFIG_SYS_LONGHELP /* undef to save memory */
206 #define CONFIG_AUTO_COMPLETE
207 #define CONFIG_CMDLINE_EDITING
208 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
209 #define CONFIG_SYS_PBSIZE \
210 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
211 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
212 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
213
214 #define CONFIG_SYS_MEMTEST_START 0x80010000
215 #define CONFIG_SYS_MEMTEST_END 0x87C00000
216
217 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
218
219 /* Physical memory map */
220 #define CONFIG_NR_DRAM_BANKS 1
221 #define PHYS_SDRAM (0x80000000)
222 #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024)
223
224 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
225 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
226 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
227
228 #define CONFIG_SYS_INIT_SP_OFFSET \
229 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
230 #define CONFIG_SYS_INIT_SP_ADDR \
231 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
232
233 /* environment organization */
234 #ifdef CONFIG_ENV_IS_IN_MMC
235 #define CONFIG_ENV_SIZE (8 * 1024)
236
237 #define CONFIG_ENV_OFFSET (12 * 64 * 1024)
238 #define CONFIG_SYS_MMC_ENV_DEV 0
239 #endif
240
241 #ifdef CONFIG_ENV_IS_IN_NAND
242 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
243 #define CONFIG_ENV_SIZE (8 * 1024)
244 #define CONFIG_ENV_OFFSET 0xA0000
245 #define CONFIG_ENV_SIZE_REDUND (8 * 1024)
246 #define CONFIG_ENV_OFFSET_REDUND 0xC0000
247 #endif
248
249 #endif