include/configs/sh7752evb.h

   1 /*
   2  * Configuation settings for the sh7752evb board
   3  *
   4  * Copyright (C) 2012 Renesas Solutions Corp.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __SH7752EVB_H
  10 #define __SH7752EVB_H
  11
  12 #define CONFIG_CPU_SH7752       1
  13 #define CONFIG_SH7752EVB        1
  14
  15 #define CONFIG_SYS_TEXT_BASE    0x5ff80000
  16
  17 #define CONFIG_DISPLAY_BOARDINFO
  18 #undef  CONFIG_SHOW_BOOT_PROGRESS
  19 #define CONFIG_CMDLINE_EDITING
  20 #define CONFIG_AUTO_COMPLETE
  21
  22 /* MEMORY */
  23 #define SH7752EVB_SDRAM_BASE            (0x40000000)
  24 #define SH7752EVB_SDRAM_SIZE            (512 * 1024 * 1024)
  25
  26 #define CONFIG_SYS_LONGHELP
  27 #define CONFIG_SYS_PBSIZE               256
  28 #define CONFIG_SYS_MAXARGS              16
  29 #define CONFIG_SYS_BARGSIZE             512
  30 #define CONFIG_SYS_BAUDRATE_TABLE       { 115200 }
  31
  32 /* SCIF */
  33 #define CONFIG_CONS_SCIF2       1
  34
  35 #define CONFIG_SYS_MEMTEST_START        (SH7752EVB_SDRAM_BASE)
  36 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + \
  37                                          480 * 1024 * 1024)
  38 #undef  CONFIG_SYS_ALT_MEMTEST
  39 #undef  CONFIG_SYS_MEMTEST_SCRATCH
  40 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
  41
  42 #define CONFIG_SYS_SDRAM_BASE           (SH7752EVB_SDRAM_BASE)
  43 #define CONFIG_SYS_SDRAM_SIZE           (SH7752EVB_SDRAM_SIZE)
  44 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + \
  45                                          128 * 1024 * 1024)
  46
  47 #define CONFIG_SYS_MONITOR_BASE         0x00000000
  48 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
  49 #define CONFIG_SYS_MALLOC_LEN           (4 * 1024 * 1024)
  50 #define CONFIG_SYS_BOOTMAPSZ            (8 * 1024 * 1024)
  51
  52 /* Ether */
  53 #define CONFIG_SH_ETHER                 1
  54 #define CONFIG_SH_ETHER_USE_PORT        0
  55 #define CONFIG_SH_ETHER_PHY_ADDR        18
  56 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
  57 #define CONFIG_SH_ETHER_USE_GETHER      1
  58 #define CONFIG_BITBANGMII
  59 #define CONFIG_BITBANGMII_MULTI
  60 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
  61 #define CONFIG_PHY_VITESSE
  62
  63 #define SH7752EVB_ETHERNET_MAC_BASE_SPI 0x00090000
  64 #define SH7752EVB_SPI_SECTOR_SIZE       (64 * 1024)
  65 #define SH7752EVB_ETHERNET_MAC_BASE     SH7752EVB_ETHERNET_MAC_BASE_SPI
  66 #define SH7752EVB_ETHERNET_MAC_SIZE     17
  67 #define SH7752EVB_ETHERNET_NUM_CH       2
  68
  69 /* SPI */
  70 #define CONFIG_SH_SPI                   1
  71 #define CONFIG_SH_SPI_BASE              0xfe002000
  72
  73 /* MMCIF */
  74 #define CONFIG_SH_MMCIF                 1
  75 #define CONFIG_SH_MMCIF_ADDR            0xffcb0000
  76 #define CONFIG_SH_MMCIF_CLK             48000000
  77
  78 /* ENV setting */
  79 #define CONFIG_ENV_IS_EMBEDDED
  80 #define CONFIG_ENV_SECT_SIZE    (64 * 1024)
  81 #define CONFIG_ENV_ADDR         (0x00080000)
  82 #define CONFIG_ENV_OFFSET       (CONFIG_ENV_ADDR)
  83 #define CONFIG_ENV_OVERWRITE    1
  84 #define CONFIG_ENV_SIZE         (CONFIG_ENV_SECT_SIZE)
  85 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SECT_SIZE)
  86 #define CONFIG_EXTRA_ENV_SETTINGS                               \
  87                 "netboot=bootp; bootm\0"
  88
  89 /* Board Clock */
  90 #define CONFIG_SYS_CLK_FREQ     48000000
  91 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
  92 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
  93 #define CONFIG_SYS_TMU_CLK_DIV  4
  94 #endif  /* __SH7752EVB_H */