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1 /*
2 * (C) Copyright 2009
3 * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #ifndef _SPEAR_COMMON_H
9 #define _SPEAR_COMMON_H
10 /*
11 * Common configurations used for both spear3xx as well as spear6xx
12 */
13
14
15 /* U-boot Load Address */
16 #define CONFIG_SYS_TEXT_BASE 0x00700000
17
18 /* Ethernet driver configuration */
19 #define CONFIG_MII
20 #define CONFIG_PHYLIB
21 #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
22 #define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
23
24 /* USBD driver configuration */
25 #if defined(CONFIG_SPEAR_USBTTY)
26 #define CONFIG_DW_UDC
27 #define CONFIG_USB_DEVICE
28 #define CONFIG_USBD_HS
29 #define CONFIG_USB_TTY
30
31 #define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC"
32 #define CONFIG_USBD_MANUFACTURER "ST Microelectronics"
33
34 #endif
35
36 #define CONFIG_EXTRA_ENV_USBTTY "usbtty=cdc_acm\0"
37
38 /* I2C driver configuration */
39 #define CONFIG_SYS_I2C
40 #define CONFIG_SYS_I2C_DW
41 #if defined(CONFIG_SPEAR600)
42 #define CONFIG_SYS_I2C_BASE 0xD0200000
43 #elif defined(CONFIG_SPEAR300)
44 #define CONFIG_SYS_I2C_BASE 0xD0180000
45 #elif defined(CONFIG_SPEAR310)
46 #define CONFIG_SYS_I2C_BASE 0xD0180000
47 #elif defined(CONFIG_SPEAR320)
48 #define CONFIG_SYS_I2C_BASE 0xD0180000
49 #endif
50 #define CONFIG_SYS_I2C_SPEED 400000
51 #define CONFIG_SYS_I2C_SLAVE 0x02
52
53 #define CONFIG_I2C_CHIPADDRESS 0x50
54
55 /* Timer, HZ specific defines */
56
57 /* Flash configuration */
58 #if defined(CONFIG_FLASH_PNOR)
59 #define CONFIG_SPEAR_EMI
60 #else
61 #define CONFIG_ST_SMI
62 #endif
63
64 #if defined(CONFIG_ST_SMI)
65
66 #define CONFIG_SYS_MAX_FLASH_BANKS 2
67 #define CONFIG_SYS_FLASH_BASE 0xF8000000
68 #define CONFIG_SYS_CS1_FLASH_BASE 0xF9000000
69 #define CONFIG_SYS_FLASH_BANK_SIZE 0x01000000
70 #define CONFIG_SYS_FLASH_ADDR_BASE {CONFIG_SYS_FLASH_BASE, \
71 CONFIG_SYS_CS1_FLASH_BASE}
72 #define CONFIG_SYS_MAX_FLASH_SECT 128
73
74 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * CONFIG_SYS_HZ)
75 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * CONFIG_SYS_HZ)
76
77 #endif
78
79 /*
80 * Serial Configuration (PL011)
81 * CONFIG_PL01x_PORTS is defined in specific files
82 */
83 #define CONFIG_PL011_SERIAL
84 #define CONFIG_PL011_CLOCK (48 * 1000 * 1000)
85 #define CONFIG_CONS_INDEX 0
86 #define CONFIG_BAUDRATE 115200
87 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \
88 57600, 115200 }
89
90 #define CONFIG_SYS_LOADS_BAUD_CHANGE
91
92 /* NAND FLASH Configuration */
93 #define CONFIG_SYS_NAND_SELF_INIT
94 #define CONFIG_MTD_DEVICE
95 #define CONFIG_MTD_PARTITIONS
96 #define CONFIG_NAND_FSMC
97 #define CONFIG_SYS_MAX_NAND_DEVICE 1
98 #define CONFIG_SYS_NAND_ONFI_DETECTION
99
100 /*
101 * Command support defines
102 */
103 #define CONFIG_CMD_I2C
104 #define CONFIG_CMD_NAND
105 #define CONFIG_CMD_ENV
106 #define CONFIG_CMD_SAVES
107 #define CONFIG_CMD_MII
108 #define CONFIG_CMD_PING
109 #define CONFIG_CMD_DHCP
110
111 /*
112 * Default Environment Varible definitions
113 */
114 #if defined(CONFIG_SPEAR_USBTTY)
115 #define CONFIG_BOOTDELAY -1
116 #else
117 #define CONFIG_BOOTDELAY 1
118 #endif
119
120 #define CONFIG_ENV_OVERWRITE
121
122 /*
123 * U-Boot Environment placing definitions.
124 */
125 #if defined(CONFIG_ENV_IS_IN_FLASH)
126 #ifdef CONFIG_ST_SMI
127 /*
128 * Environment is in serial NOR flash
129 */
130 #define CONFIG_SYS_MONITOR_LEN 0x00040000
131 #define CONFIG_ENV_SECT_SIZE 0x00010000
132 #define CONFIG_FSMTDBLK "/dev/mtdblock3 "
133
134 #define CONFIG_BOOTCOMMAND "bootm 0xf8050000"
135
136 #elif defined(CONFIG_SPEAR_EMI)
137 /*
138 * Environment is in parallel NOR flash
139 */
140 #define CONFIG_SYS_MONITOR_LEN 0x00060000
141 #define CONFIG_ENV_SECT_SIZE 0x00020000
142 #define CONFIG_FSMTDBLK "/dev/mtdblock3 "
143
144 #define CONFIG_BOOTCOMMAND "cp.b 0x50080000 0x1600000 " \
145 "0x4C0000; bootm 0x1600000"
146 #endif
147
148 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \
149 CONFIG_SYS_MONITOR_LEN)
150 #elif defined(CONFIG_ENV_IS_IN_NAND)
151 /*
152 * Environment is in NAND
153 */
154
155 #define CONFIG_ENV_OFFSET 0x60000
156 #define CONFIG_ENV_RANGE 0x10000
157 #define CONFIG_FSMTDBLK "/dev/mtdblock7 "
158
159 #define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \
160 "0x80000 0x4C0000; " \
161 "bootm 0x1600000"
162 #endif
163
164 #define CONFIG_BOOTARGS "console=ttyAMA0,115200 " \
165 "mem=128M " \
166 "root="CONFIG_FSMTDBLK \
167 "rootfstype=jffs2"
168
169 #define CONFIG_NFSBOOTCOMMAND \
170 "bootp; " \
171 "setenv bootargs root=/dev/nfs rw " \
172 "nfsroot=$(serverip):$(rootpath) " \
173 "ip=$(ipaddr):$(serverip):$(gatewayip):" \
174 "$(netmask):$(hostname):$(netdev):off " \
175 "console=ttyAMA0,115200 $(othbootargs);" \
176 "bootm; "
177
178 #define CONFIG_RAMBOOTCOMMAND \
179 "setenv bootargs root=/dev/ram rw " \
180 "console=ttyAMA0,115200 $(othbootargs);" \
181 CONFIG_BOOTCOMMAND
182
183
184 #define CONFIG_ENV_SIZE 0x02000
185 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
186
187 /* Miscellaneous configurable options */
188 #define CONFIG_ARCH_CPU_INIT
189 #define CONFIG_BOARD_EARLY_INIT_F
190 #define CONFIG_DISPLAY_CPUINFO
191 #define CONFIG_BOOT_PARAMS_ADDR 0x00000100
192 #define CONFIG_CMDLINE_TAG
193 #define CONFIG_SETUP_MEMORY_TAGS
194 #define CONFIG_MISC_INIT_R
195 #define CONFIG_ZERO_BOOTDELAY_CHECK
196
197 #define CONFIG_SYS_MEMTEST_START 0x00800000
198 #define CONFIG_SYS_MEMTEST_END 0x04000000
199 #define CONFIG_SYS_MALLOC_LEN (1024*1024)
200 #define CONFIG_IDENT_STRING "-SPEAr"
201 #define CONFIG_SYS_LONGHELP
202 #define CONFIG_CMDLINE_EDITING
203 #define CONFIG_SYS_CBSIZE 256
204 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
205 sizeof(CONFIG_SYS_PROMPT) + 16)
206 #define CONFIG_SYS_MAXARGS 16
207 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
208 #define CONFIG_SYS_LOAD_ADDR 0x00800000
209 #define CONFIG_SYS_CONSOLE_INFO_QUIET
210
211 #define CONFIG_SYS_FLASH_EMPTY_INFO
212
213 /* Physical Memory Map */
214 #define CONFIG_NR_DRAM_BANKS 1
215 #define PHYS_SDRAM_1 0x00000000
216 #define PHYS_SDRAM_1_MAXSIZE 0x40000000
217
218 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
219 #define CONFIG_SYS_INIT_RAM_ADDR 0xD2800000
220 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000
221
222 #define CONFIG_SYS_INIT_SP_OFFSET \
223 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
224
225 #define CONFIG_SYS_INIT_SP_ADDR \
226 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
227
228 #endif